From d8e4421fc6d3b037672e347fe09b0e419ccd3c2a Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 25 May 2021 04:17:24 +0200 Subject: [PATCH] Add stm32-metapac crate, with codegen in rust --- .gitmodules | 6 +- Cargo.example.toml | 1 + embassy-stm32-examples/Cargo.toml | 2 +- embassy-stm32-examples/memory.x | 4 +- embassy-stm32-examples/src/bin/usart_dma.rs | 2 +- embassy-stm32/Cargo.toml | 1059 +- embassy-stm32/build.rs | 38 +- embassy-stm32/gen.py | 416 +- embassy-stm32/gen_features.py | 36 + embassy-stm32/src/clock.rs | 6 +- embassy-stm32/src/dma/mod.rs | 7 +- embassy-stm32/src/dma/v2.rs | 64 +- embassy-stm32/src/exti.rs | 2 + embassy-stm32/src/gpio.rs | 11 +- embassy-stm32/src/i2c/mod.rs | 4 +- embassy-stm32/src/interrupt.rs | 13 + embassy-stm32/src/lib.rs | 73 +- embassy-stm32/src/pac/mod.rs | 507 - embassy-stm32/src/pac/regs.rs | 26994 ------------------ embassy-stm32/src/pac/stm32f401cb.rs | 554 - embassy-stm32/src/pac/stm32f401cc.rs | 554 - embassy-stm32/src/pac/stm32f401cd.rs | 554 - embassy-stm32/src/pac/stm32f401ce.rs | 554 - embassy-stm32/src/pac/stm32f401rb.rs | 554 - embassy-stm32/src/pac/stm32f401rc.rs | 554 - embassy-stm32/src/pac/stm32f401rd.rs | 554 - embassy-stm32/src/pac/stm32f401re.rs | 554 - embassy-stm32/src/pac/stm32f401vb.rs | 562 - embassy-stm32/src/pac/stm32f401vc.rs | 562 - embassy-stm32/src/pac/stm32f401vd.rs | 562 - embassy-stm32/src/pac/stm32f401ve.rs | 562 - embassy-stm32/src/pac/stm32f405oe.rs | 711 - embassy-stm32/src/pac/stm32f405og.rs | 711 - embassy-stm32/src/pac/stm32f405rg.rs | 711 - embassy-stm32/src/pac/stm32f405vg.rs | 711 - embassy-stm32/src/pac/stm32f405zg.rs | 711 - embassy-stm32/src/pac/stm32f407ie.rs | 720 - embassy-stm32/src/pac/stm32f407ig.rs | 720 - embassy-stm32/src/pac/stm32f407ve.rs | 720 - embassy-stm32/src/pac/stm32f407vg.rs | 720 - embassy-stm32/src/pac/stm32f407ze.rs | 720 - embassy-stm32/src/pac/stm32f407zg.rs | 720 - embassy-stm32/src/pac/stm32f410c8.rs | 488 - embassy-stm32/src/pac/stm32f410cb.rs | 488 - embassy-stm32/src/pac/stm32f410r8.rs | 488 - embassy-stm32/src/pac/stm32f410rb.rs | 488 - embassy-stm32/src/pac/stm32f410t8.rs | 472 - embassy-stm32/src/pac/stm32f410tb.rs | 472 - embassy-stm32/src/pac/stm32f411cc.rs | 587 - embassy-stm32/src/pac/stm32f411ce.rs | 587 - embassy-stm32/src/pac/stm32f411rc.rs | 587 - embassy-stm32/src/pac/stm32f411re.rs | 587 - embassy-stm32/src/pac/stm32f411vc.rs | 587 - embassy-stm32/src/pac/stm32f411ve.rs | 587 - embassy-stm32/src/pac/stm32f412ce.rs | 631 - embassy-stm32/src/pac/stm32f412cg.rs | 631 - embassy-stm32/src/pac/stm32f412re.rs | 664 - embassy-stm32/src/pac/stm32f412rg.rs | 664 - embassy-stm32/src/pac/stm32f412ve.rs | 739 - embassy-stm32/src/pac/stm32f412vg.rs | 739 - embassy-stm32/src/pac/stm32f412ze.rs | 739 - embassy-stm32/src/pac/stm32f412zg.rs | 739 - embassy-stm32/src/pac/stm32f413cg.rs | 787 - embassy-stm32/src/pac/stm32f413ch.rs | 787 - embassy-stm32/src/pac/stm32f413mg.rs | 803 - embassy-stm32/src/pac/stm32f413mh.rs | 803 - embassy-stm32/src/pac/stm32f413rg.rs | 803 - embassy-stm32/src/pac/stm32f413rh.rs | 803 - embassy-stm32/src/pac/stm32f413vg.rs | 803 - embassy-stm32/src/pac/stm32f413vh.rs | 803 - embassy-stm32/src/pac/stm32f413zg.rs | 803 - embassy-stm32/src/pac/stm32f413zh.rs | 803 - embassy-stm32/src/pac/stm32f415og.rs | 714 - embassy-stm32/src/pac/stm32f415rg.rs | 714 - embassy-stm32/src/pac/stm32f415vg.rs | 714 - embassy-stm32/src/pac/stm32f415zg.rs | 714 - embassy-stm32/src/pac/stm32f417ie.rs | 723 - embassy-stm32/src/pac/stm32f417ig.rs | 723 - embassy-stm32/src/pac/stm32f417ve.rs | 723 - embassy-stm32/src/pac/stm32f417vg.rs | 723 - embassy-stm32/src/pac/stm32f417ze.rs | 723 - embassy-stm32/src/pac/stm32f417zg.rs | 723 - embassy-stm32/src/pac/stm32f423ch.rs | 790 - embassy-stm32/src/pac/stm32f423mh.rs | 806 - embassy-stm32/src/pac/stm32f423rh.rs | 806 - embassy-stm32/src/pac/stm32f423vh.rs | 806 - embassy-stm32/src/pac/stm32f423zh.rs | 806 - embassy-stm32/src/pac/stm32f427ag.rs | 804 - embassy-stm32/src/pac/stm32f427ai.rs | 804 - embassy-stm32/src/pac/stm32f427ig.rs | 809 - embassy-stm32/src/pac/stm32f427ii.rs | 809 - embassy-stm32/src/pac/stm32f427vg.rs | 795 - embassy-stm32/src/pac/stm32f427vi.rs | 795 - embassy-stm32/src/pac/stm32f427zg.rs | 809 - embassy-stm32/src/pac/stm32f427zi.rs | 809 - embassy-stm32/src/pac/stm32f429ag.rs | 810 - embassy-stm32/src/pac/stm32f429ai.rs | 810 - embassy-stm32/src/pac/stm32f429be.rs | 815 - embassy-stm32/src/pac/stm32f429bg.rs | 815 - embassy-stm32/src/pac/stm32f429bi.rs | 815 - embassy-stm32/src/pac/stm32f429ie.rs | 815 - embassy-stm32/src/pac/stm32f429ig.rs | 815 - embassy-stm32/src/pac/stm32f429ii.rs | 815 - embassy-stm32/src/pac/stm32f429ne.rs | 815 - embassy-stm32/src/pac/stm32f429ng.rs | 815 - embassy-stm32/src/pac/stm32f429ni.rs | 815 - embassy-stm32/src/pac/stm32f429ve.rs | 801 - embassy-stm32/src/pac/stm32f429vg.rs | 801 - embassy-stm32/src/pac/stm32f429vi.rs | 801 - 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embassy-stm32/src/pwr/mod.rs | 8 +- embassy-stm32/src/rcc/mod.rs | 4 +- embassy-stm32/src/rng.rs | 2 +- embassy-stm32/src/sdmmc/mod.rs | 4 +- embassy-stm32/src/spi/mod.rs | 6 +- embassy-stm32/src/usart/mod.rs | 4 +- embassy-stm32/src/usart/v1.rs | 2 +- stm32-data | 1 + stm32-metapac/Cargo.toml | 1227 + stm32-metapac/build.rs | 294 + stm32-metapac/gen_features.py | 37 + stm32-metapac/src/lib.rs | 6 + 534 files changed, 2386 insertions(+), 376357 deletions(-) create mode 100644 embassy-stm32/gen_features.py create mode 100644 embassy-stm32/src/interrupt.rs delete mode 100644 embassy-stm32/src/pac/mod.rs delete mode 100644 embassy-stm32/src/pac/regs.rs delete mode 100644 embassy-stm32/src/pac/stm32f401cb.rs delete mode 100644 embassy-stm32/src/pac/stm32f401cc.rs delete mode 100644 embassy-stm32/src/pac/stm32f401cd.rs delete mode 100644 embassy-stm32/src/pac/stm32f401ce.rs delete mode 100644 embassy-stm32/src/pac/stm32f401rb.rs delete mode 100644 embassy-stm32/src/pac/stm32f401rc.rs delete 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delete mode 100644 embassy-stm32/src/pac/stm32l4s9vi.rs delete mode 100644 embassy-stm32/src/pac/stm32l4s9zi.rs create mode 160000 stm32-data create mode 100644 stm32-metapac/Cargo.toml create mode 100644 stm32-metapac/build.rs create mode 100644 stm32-metapac/gen_features.py create mode 100644 stm32-metapac/src/lib.rs diff --git a/.gitmodules b/.gitmodules index 55150179..8157e36e 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,3 +1,3 @@ -[submodule "embassy-stm32/stm32-data"] - path = embassy-stm32/stm32-data - url = https://github.com/Dirbaio/stm32-data.git +[submodule "stm32-data"] + path = stm32-data + url = https://github.com/embassy-rs/stm32-data.git diff --git a/Cargo.example.toml b/Cargo.example.toml index 39685b1a..010487b5 100644 --- a/Cargo.example.toml +++ b/Cargo.example.toml @@ -30,6 +30,7 @@ members = [ # stm32 #"embassy-stm32", #"embassy-stm32-examples", + #"stm32-metapac", # rp2040 #"embassy-rp", diff --git a/embassy-stm32-examples/Cargo.toml b/embassy-stm32-examples/Cargo.toml index 8d1361cf..fe02d19a 100644 --- a/embassy-stm32-examples/Cargo.toml +++ b/embassy-stm32-examples/Cargo.toml @@ -26,7 +26,7 @@ defmt = "0.2.0" defmt-rtt = "0.2.0" cortex-m = "0.7.1" -cortex-m-rt = "0.6.13" +cortex-m-rt = "0.6.14" embedded-hal = { version = "0.2.4" } panic-probe = { version = "0.2.0", features= ["print-defmt"] } futures = { version = "0.3.8", default-features = false, features = ["async-await"] } diff --git a/embassy-stm32-examples/memory.x b/embassy-stm32-examples/memory.x index b359d3d7..f21e3257 100644 --- a/embassy-stm32-examples/memory.x +++ b/embassy-stm32-examples/memory.x @@ -2,6 +2,6 @@ MEMORY { /* NOTE 1 K = 1 KiBi = 1024 bytes */ /* These values correspond to the STM32F429ZI */ - FLASH : ORIGIN = 0x08000000, LENGTH = 1024K - RAM : ORIGIN = 0x20000000, LENGTH = 256K + FLASH : ORIGIN = 0x08000000, LENGTH = 2048K + RAM : ORIGIN = 0x20000000, LENGTH = 192K } diff --git a/embassy-stm32-examples/src/bin/usart_dma.rs b/embassy-stm32-examples/src/bin/usart_dma.rs index dc065e04..fae05b60 100644 --- a/embassy-stm32-examples/src/bin/usart_dma.rs +++ b/embassy-stm32-examples/src/bin/usart_dma.rs @@ -25,7 +25,7 @@ async fn main_task() { let config = Config::default(); let mut usart = Uart::new(p.USART3, p.PD9, p.PD8, config, 16_000_000); - for n in 0.. { + for n in 0u32.. { let mut s: String<128> = String::new(); core::write!(&mut s, "Hello DMA World {}!\r\n", n).unwrap(); diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 5331043e..fc9c327f 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -16,17 +16,18 @@ cortex-m-rt = { version = "0.6.13", features = ["device"] } cortex-m = "0.7.1" embedded-hal = { version = "0.2.4" } futures = { version = "0.3.5", default-features = false, features = ["async-await"] } -rand_core = { version = "0.6.2", optional = true } -sdio-host = { version = "0.5.0", optional = true } +rand_core = { version = "0.6.2" } +sdio-host = { version = "0.5.0" } embedded-sdmmc = { git = "https://github.com/thalesfragoso/embedded-sdmmc-rs", branch = "async", optional = true } critical-section = "0.2.1" bare-metal = "1.0.0" atomic-polyfill = "0.1.2" - +stm32-metapac = { version = "0.1.0", path = "../stm32-metapac", features = ["rt"] } cfg-if = "1.0.0" [build-dependencies] -regex = "1.4.6" +serde = { version = "1.0.123", features = [ "derive" ]} +serde_yaml = "0.8.15" [features] defmt-trace = [ ] @@ -35,552 +36,510 @@ defmt-info = [ ] defmt-warn = [ ] defmt-error = [ ] sdmmc-rs = ["embedded-sdmmc"] -# Unstable feature to give access to the pac used in embassy-stm32, changes with this feature don't -# follow semver -pac = [] # BEGIN GENERATED FEATURES -stm32f401cb = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401cc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401cd = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401ce = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401rb = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401rc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401rd = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401re = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401vb = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401vc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401vd = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f401ve = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f405oe = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f405og = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f405rg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f405vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f405zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f407ie = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f407ig = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f407ve = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f407vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f407ze = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f407zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f410c8 = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f410cb = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f410r8 = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f410rb = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f410t8 = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f410tb = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f411cc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f411ce = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f411rc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f411re = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f411vc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f411ve = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f412ce = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f412cg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f412re = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f412rg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f412ve = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f412vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f412ze = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f412zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413cg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413ch = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413mg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413mh = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413rg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413rh = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413vh = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f413zh = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f415og = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f415rg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f415vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f415zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f417ie = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f417ig = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f417ve = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f417vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f417ze = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f417zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f423ch = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f423mh = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f423rh = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f423vh = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f423zh = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f427ag = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f427ai = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f427ig = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f427ii = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f427vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f427vi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f427zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f427zi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ag = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ai = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429be = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429bg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429bi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ie = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ig = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ii = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ne = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ng = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ni = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ve = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429vi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429ze = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f429zi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f437ai = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f437ig = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f437ii = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f437vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f437vi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f437zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f437zi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439ai = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439bg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439bi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439ig = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439ii = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439ng = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439ni = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439vi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f439zi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f446mc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f446me = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f446rc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f446re = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f446vc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f446ve = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f446zc = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f446ze = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_spi", "_spi_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ae = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ag = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ai = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469be = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469bg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469bi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ie = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ig = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ii = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ne = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ng = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ni = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ve = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469vi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469ze = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f469zi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479ag = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479ai = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479bg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479bi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479ig = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479ii = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479ng = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479ni = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479vg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479vi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479zg = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32f479zi = [ "_dma", "_dma_v2", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_i2c", "_i2c_v1", "_rng", "_rng_v1", "_stm32f4", "_syscfg", "_syscfg_f4", "_usart", "_usart_v1",] -stm32h723ve = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h723vg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h723ze = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h723zg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725ae = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725ag = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725ie = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725ig = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725re = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725rg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725ve = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725vg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725ze = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h725zg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h730ab = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h730ib = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h730vb = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h730zb = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h733vg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h733zg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h735ag = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h735ig = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h735rg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h735vg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h735zg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742ag = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742ai = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742bg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742bi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742ig = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742vg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742vi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742xg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742xi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742zg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h742zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743ag = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743ai = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743bg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743bi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743ig = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743vg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743vi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743xg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743xi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743zg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h743zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h745bg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h745bi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h745ig = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h745ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h745xg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h745xi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h745zg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h745zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747ag = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747ai = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747bg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747bi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747ig = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747xg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747xi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h747zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h750ib = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h750vb = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h750xb = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h750zb = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h753ai = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h753bi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h753ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h753vi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h753xi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h753zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h755bi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h755ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h755xi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h755zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h757ai = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h757bi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h757ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h757xi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h757zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rcc", "_rcc_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3ag = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3ai = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3ig = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3lg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3li = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3ng = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3ni = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3qi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3rg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3ri = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3vg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3vi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3zg = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7a3zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b0ab = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b0ib = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b0rb = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b0vb = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b0zb = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b3ai = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b3ii = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b3li = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b3ni = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b3qi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b3ri = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b3vi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32h7b3zi = [ "_dbgmcu", "_dbgmcu_h7", "_dma", "_dma_v2", "_exti", "_exti_v1", "_flash", "_flash_h7", "_gpio", "_gpio_v2", "_i2c", "_i2c_v2", "_pwr", "_pwr_h7", "_rng", "_rng_v1", "_sdmmc", "_sdmmc_v2", "_spi", "_spi_v3", "_stm32h7", "_syscfg", "_syscfg_h7",] -stm32l010c6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l010f4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l010k4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l010k8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l010r8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l010rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011d3 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011d4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011e3 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011e4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011f3 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011f4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011g3 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011g4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011k3 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l011k4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l021d4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l021f4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l021g4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l021k4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031c4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031c6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031e4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031e6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031f4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031f6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031g4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031g6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031k4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l031k6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l041c4 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l041c6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l041e6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l041f6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l041g6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l041k6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l051c6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l051c8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l051k6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l051k8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l051r6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l051r8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l051t6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l051t8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l052c6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l052c8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l052k6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l052k8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l052r6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l052r8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l052t6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l052t8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l053c6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l053c8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l053r6 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l053r8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l062c8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l062k8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l063c8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l063r8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071c8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071cz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071k8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071kb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071kz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071rz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071v8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071vb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l071vz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072cz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072kb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072kz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072rz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072v8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072vb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l072vz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l073cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l073cz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l073rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l073rz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l073v8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l073vb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l073vz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l081cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l081cz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l081kz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l082cz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l082kb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l082kz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l083cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l083cz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l083rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l083rz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l083v8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l083vb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l083vz = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rcc", "_rcc_l0", "_rng", "_rng_v1", "_stm32l0", "_syscfg", "_syscfg_l0", "_usart", "_usart_v2",] -stm32l412c8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l412cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l412k8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l412kb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l412r8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l412rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l412t8 = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l412tb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l422cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l422kb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l422rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l422tb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l431cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l431cc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l431kb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l431kc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l431rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l431rc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l431vc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l432kb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l432kc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l433cb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l433cc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l433rb = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l433rc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l433vc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l442kc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l443cc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l443rc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l443vc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l451cc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l451ce = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l451rc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l451re = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l451vc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l451ve = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l452cc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l452ce = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l452rc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l452re = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l452vc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l452ve = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l462ce = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l462re = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l462ve = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l471qe = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l471qg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l471re = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l471rg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l471ve = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l471vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l471ze = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l471zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l475rc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l475re = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l475rg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l475vc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l475ve = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l475vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476je = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476jg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476me = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476mg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476qe = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476qg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476rc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476re = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476rg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476vc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476ve = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476ze = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l476zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l485jc = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l485je = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l486jg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l486qg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l486rg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l486vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l486zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496ae = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496ag = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496qe = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496qg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496re = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496rg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496ve = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496wg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496ze = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l496zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l4a6ag = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l4a6qg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l4a6rg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l4a6vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l4a6zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4", "_syscfg", "_syscfg_l4", "_usart", "_usart_v2",] -stm32l4p5ae = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5ag = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5ce = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5cg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5qe = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5qg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5re = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5rg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5ve = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5ze = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4p5zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4q5ag = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4q5cg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4q5qg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4q5rg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4q5vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4q5zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r5ag = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r5ai = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r5qg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r5qi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r5vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r5vi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r5zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r5zi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r7ai = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r7vi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r7zi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r9ag = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r9ai = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r9vg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r9vi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r9zg = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4r9zi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s5ai = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s5qi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s5vi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s5zi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s7ai = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s7vi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s7zi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s9ai = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s9vi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -stm32l4s9zi = [ "_dma", "_dma_v1", "_exti", "_exti_v1", "_gpio", "_gpio_v2", "_rng", "_rng_v1", "_spi", "_spi_v2", "_stm32l4p", "_syscfg", "_syscfg_l4",] -_dbgmcu = [] -_dbgmcu_h7 = [] -_dma = [] -_dma_v1 = [] -_dma_v2 = [] -_exti = [] -_exti_v1 = [] -_flash = [] -_flash_h7 = [] -_gpio = [] -_gpio_v2 = [] -_i2c = [] -_i2c_v1 = [] -_i2c_v2 = [] -_pwr = [] -_pwr_h7 = [] -_rcc = [] -_rcc_h7 = [] -_rcc_l0 = [] -_rng = [ "rand_core",] -_rng_v1 = [] -_sdmmc = [ "sdio-host",] -_sdmmc_v2 = [] -_spi = [] -_spi_v1 = [] -_spi_v2 = [] -_spi_v3 = [] -_stm32f4 = [] -_stm32h7 = [] -_stm32l0 = [] -_stm32l4 = [] -_stm32l4p = [] -_syscfg = [] -_syscfg_f4 = [] -_syscfg_h7 = [] -_syscfg_l0 = [] -_syscfg_l4 = [] -_usart = [] -_usart_v1 = [] -_usart_v2 = [] +# Generated by gen_features.py. DO NOT EDIT. +stm32f401cb = [ "stm32-metapac/stm32f401cb",] +stm32f401cc = [ "stm32-metapac/stm32f401cc",] +stm32f401cd = [ "stm32-metapac/stm32f401cd",] +stm32f401ce = [ "stm32-metapac/stm32f401ce",] +stm32f401rb = [ "stm32-metapac/stm32f401rb",] +stm32f401rc = [ "stm32-metapac/stm32f401rc",] +stm32f401rd = [ "stm32-metapac/stm32f401rd",] +stm32f401re = [ "stm32-metapac/stm32f401re",] +stm32f401vb = [ "stm32-metapac/stm32f401vb",] +stm32f401vc = [ "stm32-metapac/stm32f401vc",] +stm32f401vd = [ "stm32-metapac/stm32f401vd",] +stm32f401ve = [ "stm32-metapac/stm32f401ve",] +stm32f405oe = [ "stm32-metapac/stm32f405oe",] +stm32f405og = [ "stm32-metapac/stm32f405og",] +stm32f405rg = [ "stm32-metapac/stm32f405rg",] +stm32f405vg = [ "stm32-metapac/stm32f405vg",] +stm32f405zg = [ "stm32-metapac/stm32f405zg",] +stm32f407ie = [ "stm32-metapac/stm32f407ie",] +stm32f407ig = [ "stm32-metapac/stm32f407ig",] +stm32f407ve = [ "stm32-metapac/stm32f407ve",] +stm32f407vg = [ "stm32-metapac/stm32f407vg",] +stm32f407ze = [ "stm32-metapac/stm32f407ze",] +stm32f407zg = [ "stm32-metapac/stm32f407zg",] +stm32f410c8 = [ "stm32-metapac/stm32f410c8",] +stm32f410cb = [ "stm32-metapac/stm32f410cb",] +stm32f410r8 = [ "stm32-metapac/stm32f410r8",] +stm32f410rb = [ "stm32-metapac/stm32f410rb",] +stm32f410t8 = [ "stm32-metapac/stm32f410t8",] +stm32f410tb = [ "stm32-metapac/stm32f410tb",] +stm32f411cc = [ "stm32-metapac/stm32f411cc",] +stm32f411ce = [ "stm32-metapac/stm32f411ce",] +stm32f411rc = [ "stm32-metapac/stm32f411rc",] +stm32f411re = [ "stm32-metapac/stm32f411re",] +stm32f411vc = [ "stm32-metapac/stm32f411vc",] +stm32f411ve = [ "stm32-metapac/stm32f411ve",] +stm32f412ce = [ "stm32-metapac/stm32f412ce",] +stm32f412cg = [ "stm32-metapac/stm32f412cg",] +stm32f412re = [ "stm32-metapac/stm32f412re",] +stm32f412rg = [ "stm32-metapac/stm32f412rg",] +stm32f412ve = [ "stm32-metapac/stm32f412ve",] +stm32f412vg = [ "stm32-metapac/stm32f412vg",] +stm32f412ze = [ "stm32-metapac/stm32f412ze",] +stm32f412zg = [ "stm32-metapac/stm32f412zg",] +stm32f413cg = [ "stm32-metapac/stm32f413cg",] +stm32f413ch = [ "stm32-metapac/stm32f413ch",] +stm32f413mg = [ "stm32-metapac/stm32f413mg",] +stm32f413mh = [ "stm32-metapac/stm32f413mh",] +stm32f413rg = [ "stm32-metapac/stm32f413rg",] +stm32f413rh = [ "stm32-metapac/stm32f413rh",] +stm32f413vg = [ "stm32-metapac/stm32f413vg",] +stm32f413vh = [ "stm32-metapac/stm32f413vh",] +stm32f413zg = [ "stm32-metapac/stm32f413zg",] +stm32f413zh = [ "stm32-metapac/stm32f413zh",] +stm32f415og = [ "stm32-metapac/stm32f415og",] +stm32f415rg = [ "stm32-metapac/stm32f415rg",] +stm32f415vg = [ "stm32-metapac/stm32f415vg",] +stm32f415zg = [ "stm32-metapac/stm32f415zg",] +stm32f417ie = [ "stm32-metapac/stm32f417ie",] +stm32f417ig = [ "stm32-metapac/stm32f417ig",] +stm32f417ve = [ "stm32-metapac/stm32f417ve",] +stm32f417vg = [ "stm32-metapac/stm32f417vg",] +stm32f417ze = [ "stm32-metapac/stm32f417ze",] +stm32f417zg = [ "stm32-metapac/stm32f417zg",] +stm32f423ch = [ "stm32-metapac/stm32f423ch",] +stm32f423mh = [ "stm32-metapac/stm32f423mh",] +stm32f423rh = [ "stm32-metapac/stm32f423rh",] +stm32f423vh = [ "stm32-metapac/stm32f423vh",] +stm32f423zh = [ "stm32-metapac/stm32f423zh",] +stm32f427ag = [ "stm32-metapac/stm32f427ag",] +stm32f427ai = [ "stm32-metapac/stm32f427ai",] +stm32f427ig = [ "stm32-metapac/stm32f427ig",] +stm32f427ii = [ "stm32-metapac/stm32f427ii",] +stm32f427vg = [ "stm32-metapac/stm32f427vg",] +stm32f427vi = [ "stm32-metapac/stm32f427vi",] +stm32f427zg = [ "stm32-metapac/stm32f427zg",] +stm32f427zi = [ "stm32-metapac/stm32f427zi",] +stm32f429ag = [ "stm32-metapac/stm32f429ag",] +stm32f429ai = [ "stm32-metapac/stm32f429ai",] +stm32f429be = [ "stm32-metapac/stm32f429be",] +stm32f429bg = [ "stm32-metapac/stm32f429bg",] +stm32f429bi = [ "stm32-metapac/stm32f429bi",] +stm32f429ie = [ "stm32-metapac/stm32f429ie",] +stm32f429ig = [ "stm32-metapac/stm32f429ig",] +stm32f429ii = [ "stm32-metapac/stm32f429ii",] +stm32f429ne = [ "stm32-metapac/stm32f429ne",] +stm32f429ng = [ "stm32-metapac/stm32f429ng",] +stm32f429ni = [ "stm32-metapac/stm32f429ni",] +stm32f429ve = [ "stm32-metapac/stm32f429ve",] +stm32f429vg = [ "stm32-metapac/stm32f429vg",] +stm32f429vi = [ "stm32-metapac/stm32f429vi",] +stm32f429ze = [ "stm32-metapac/stm32f429ze",] +stm32f429zg = [ "stm32-metapac/stm32f429zg",] +stm32f429zi = [ "stm32-metapac/stm32f429zi",] +stm32f437ai = [ "stm32-metapac/stm32f437ai",] +stm32f437ig = [ "stm32-metapac/stm32f437ig",] +stm32f437ii = [ "stm32-metapac/stm32f437ii",] +stm32f437vg = [ "stm32-metapac/stm32f437vg",] +stm32f437vi = [ "stm32-metapac/stm32f437vi",] +stm32f437zg = [ "stm32-metapac/stm32f437zg",] +stm32f437zi = [ "stm32-metapac/stm32f437zi",] +stm32f439ai = [ "stm32-metapac/stm32f439ai",] +stm32f439bg = [ "stm32-metapac/stm32f439bg",] +stm32f439bi = [ "stm32-metapac/stm32f439bi",] +stm32f439ig = [ "stm32-metapac/stm32f439ig",] +stm32f439ii = [ "stm32-metapac/stm32f439ii",] +stm32f439ng = [ "stm32-metapac/stm32f439ng",] +stm32f439ni = [ "stm32-metapac/stm32f439ni",] +stm32f439vg = [ "stm32-metapac/stm32f439vg",] +stm32f439vi = [ "stm32-metapac/stm32f439vi",] +stm32f439zg = [ "stm32-metapac/stm32f439zg",] +stm32f439zi = [ "stm32-metapac/stm32f439zi",] +stm32f446mc = [ "stm32-metapac/stm32f446mc",] +stm32f446me = [ "stm32-metapac/stm32f446me",] +stm32f446rc = [ "stm32-metapac/stm32f446rc",] +stm32f446re = [ "stm32-metapac/stm32f446re",] +stm32f446vc = [ "stm32-metapac/stm32f446vc",] +stm32f446ve = [ "stm32-metapac/stm32f446ve",] +stm32f446zc = [ "stm32-metapac/stm32f446zc",] +stm32f446ze = [ "stm32-metapac/stm32f446ze",] +stm32f469ae = [ "stm32-metapac/stm32f469ae",] +stm32f469ag = [ "stm32-metapac/stm32f469ag",] +stm32f469ai = [ "stm32-metapac/stm32f469ai",] +stm32f469be = [ "stm32-metapac/stm32f469be",] +stm32f469bg = [ "stm32-metapac/stm32f469bg",] +stm32f469bi = [ "stm32-metapac/stm32f469bi",] +stm32f469ie = [ "stm32-metapac/stm32f469ie",] +stm32f469ig = [ "stm32-metapac/stm32f469ig",] +stm32f469ii = [ "stm32-metapac/stm32f469ii",] +stm32f469ne = [ "stm32-metapac/stm32f469ne",] +stm32f469ng = [ "stm32-metapac/stm32f469ng",] +stm32f469ni = [ "stm32-metapac/stm32f469ni",] +stm32f469ve = [ "stm32-metapac/stm32f469ve",] +stm32f469vg = [ "stm32-metapac/stm32f469vg",] +stm32f469vi = [ "stm32-metapac/stm32f469vi",] +stm32f469ze = [ "stm32-metapac/stm32f469ze",] +stm32f469zg = [ "stm32-metapac/stm32f469zg",] +stm32f469zi = [ "stm32-metapac/stm32f469zi",] +stm32f479ag = [ "stm32-metapac/stm32f479ag",] +stm32f479ai = [ "stm32-metapac/stm32f479ai",] +stm32f479bg = [ "stm32-metapac/stm32f479bg",] +stm32f479bi = [ "stm32-metapac/stm32f479bi",] +stm32f479ig = [ "stm32-metapac/stm32f479ig",] +stm32f479ii = [ "stm32-metapac/stm32f479ii",] +stm32f479ng = [ "stm32-metapac/stm32f479ng",] +stm32f479ni = [ "stm32-metapac/stm32f479ni",] +stm32f479vg = [ "stm32-metapac/stm32f479vg",] +stm32f479vi = [ "stm32-metapac/stm32f479vi",] +stm32f479zg = [ "stm32-metapac/stm32f479zg",] +stm32f479zi = [ "stm32-metapac/stm32f479zi",] +stm32h723ve = [ "stm32-metapac/stm32h723ve",] +stm32h723vg = [ "stm32-metapac/stm32h723vg",] +stm32h723ze = [ "stm32-metapac/stm32h723ze",] +stm32h723zg = [ "stm32-metapac/stm32h723zg",] +stm32h725ae = [ "stm32-metapac/stm32h725ae",] +stm32h725ag = [ "stm32-metapac/stm32h725ag",] +stm32h725ie = [ "stm32-metapac/stm32h725ie",] +stm32h725ig = [ "stm32-metapac/stm32h725ig",] +stm32h725re = [ "stm32-metapac/stm32h725re",] +stm32h725rg = [ "stm32-metapac/stm32h725rg",] +stm32h725ve = [ "stm32-metapac/stm32h725ve",] +stm32h725vg = [ "stm32-metapac/stm32h725vg",] +stm32h725ze = [ "stm32-metapac/stm32h725ze",] +stm32h725zg = [ "stm32-metapac/stm32h725zg",] +stm32h730ab = [ "stm32-metapac/stm32h730ab",] +stm32h730ib = [ "stm32-metapac/stm32h730ib",] +stm32h730vb = [ "stm32-metapac/stm32h730vb",] +stm32h730zb = [ "stm32-metapac/stm32h730zb",] +stm32h733vg = [ "stm32-metapac/stm32h733vg",] +stm32h733zg = [ "stm32-metapac/stm32h733zg",] +stm32h735ag = [ "stm32-metapac/stm32h735ag",] +stm32h735ig = [ "stm32-metapac/stm32h735ig",] +stm32h735rg = [ "stm32-metapac/stm32h735rg",] +stm32h735vg = [ "stm32-metapac/stm32h735vg",] +stm32h735zg = [ "stm32-metapac/stm32h735zg",] +stm32h742ag = [ "stm32-metapac/stm32h742ag",] +stm32h742ai = [ "stm32-metapac/stm32h742ai",] +stm32h742bg = [ "stm32-metapac/stm32h742bg",] +stm32h742bi = [ "stm32-metapac/stm32h742bi",] +stm32h742ig = [ "stm32-metapac/stm32h742ig",] +stm32h742ii = [ "stm32-metapac/stm32h742ii",] +stm32h742vg = [ "stm32-metapac/stm32h742vg",] +stm32h742vi = [ "stm32-metapac/stm32h742vi",] +stm32h742xg = [ "stm32-metapac/stm32h742xg",] +stm32h742xi = [ "stm32-metapac/stm32h742xi",] +stm32h742zg = [ "stm32-metapac/stm32h742zg",] +stm32h742zi = [ "stm32-metapac/stm32h742zi",] +stm32h743ag = [ "stm32-metapac/stm32h743ag",] +stm32h743ai = [ "stm32-metapac/stm32h743ai",] +stm32h743bg = [ "stm32-metapac/stm32h743bg",] +stm32h743bi = [ "stm32-metapac/stm32h743bi",] +stm32h743ig = [ "stm32-metapac/stm32h743ig",] +stm32h743ii = [ "stm32-metapac/stm32h743ii",] +stm32h743vg = [ "stm32-metapac/stm32h743vg",] +stm32h743vi = [ "stm32-metapac/stm32h743vi",] +stm32h743xg = [ "stm32-metapac/stm32h743xg",] +stm32h743xi = [ "stm32-metapac/stm32h743xi",] +stm32h743zg = [ "stm32-metapac/stm32h743zg",] +stm32h743zi = [ "stm32-metapac/stm32h743zi",] +stm32h745bg = [ "stm32-metapac/stm32h745bg",] +stm32h745bi = [ "stm32-metapac/stm32h745bi",] +stm32h745ig = [ "stm32-metapac/stm32h745ig",] +stm32h745ii = [ "stm32-metapac/stm32h745ii",] +stm32h745xg = [ "stm32-metapac/stm32h745xg",] +stm32h745xi = [ "stm32-metapac/stm32h745xi",] +stm32h745zg = [ "stm32-metapac/stm32h745zg",] +stm32h745zi = [ "stm32-metapac/stm32h745zi",] +stm32h747ag = [ "stm32-metapac/stm32h747ag",] +stm32h747ai = [ "stm32-metapac/stm32h747ai",] +stm32h747bg = [ "stm32-metapac/stm32h747bg",] +stm32h747bi = [ "stm32-metapac/stm32h747bi",] +stm32h747ig = [ "stm32-metapac/stm32h747ig",] +stm32h747ii = [ "stm32-metapac/stm32h747ii",] +stm32h747xg = [ "stm32-metapac/stm32h747xg",] +stm32h747xi = [ "stm32-metapac/stm32h747xi",] +stm32h747zi = [ "stm32-metapac/stm32h747zi",] +stm32h750ib = [ "stm32-metapac/stm32h750ib",] +stm32h750vb = [ "stm32-metapac/stm32h750vb",] +stm32h750xb = [ "stm32-metapac/stm32h750xb",] +stm32h750zb = [ "stm32-metapac/stm32h750zb",] +stm32h753ai = [ "stm32-metapac/stm32h753ai",] +stm32h753bi = [ "stm32-metapac/stm32h753bi",] +stm32h753ii = [ "stm32-metapac/stm32h753ii",] +stm32h753vi = [ "stm32-metapac/stm32h753vi",] +stm32h753xi = [ "stm32-metapac/stm32h753xi",] +stm32h753zi = [ "stm32-metapac/stm32h753zi",] +stm32h755bi = [ "stm32-metapac/stm32h755bi",] +stm32h755ii = [ "stm32-metapac/stm32h755ii",] +stm32h755xi = [ "stm32-metapac/stm32h755xi",] +stm32h755zi = [ "stm32-metapac/stm32h755zi",] +stm32h757ai = [ "stm32-metapac/stm32h757ai",] +stm32h757bi = [ "stm32-metapac/stm32h757bi",] +stm32h757ii = [ "stm32-metapac/stm32h757ii",] +stm32h757xi = [ "stm32-metapac/stm32h757xi",] +stm32h757zi = [ "stm32-metapac/stm32h757zi",] +stm32h7a3ag = [ "stm32-metapac/stm32h7a3ag",] +stm32h7a3ai = [ "stm32-metapac/stm32h7a3ai",] +stm32h7a3ig = [ "stm32-metapac/stm32h7a3ig",] +stm32h7a3ii = [ "stm32-metapac/stm32h7a3ii",] +stm32h7a3lg = [ "stm32-metapac/stm32h7a3lg",] +stm32h7a3li = [ "stm32-metapac/stm32h7a3li",] +stm32h7a3ng = [ "stm32-metapac/stm32h7a3ng",] +stm32h7a3ni = [ "stm32-metapac/stm32h7a3ni",] +stm32h7a3qi = [ "stm32-metapac/stm32h7a3qi",] +stm32h7a3rg = [ "stm32-metapac/stm32h7a3rg",] +stm32h7a3ri = [ "stm32-metapac/stm32h7a3ri",] +stm32h7a3vg = [ "stm32-metapac/stm32h7a3vg",] +stm32h7a3vi = [ "stm32-metapac/stm32h7a3vi",] +stm32h7a3zg = [ "stm32-metapac/stm32h7a3zg",] +stm32h7a3zi = [ "stm32-metapac/stm32h7a3zi",] +stm32h7b0ab = [ "stm32-metapac/stm32h7b0ab",] +stm32h7b0ib = [ "stm32-metapac/stm32h7b0ib",] +stm32h7b0rb = [ "stm32-metapac/stm32h7b0rb",] +stm32h7b0vb = [ "stm32-metapac/stm32h7b0vb",] +stm32h7b0zb = [ "stm32-metapac/stm32h7b0zb",] +stm32h7b3ai = [ "stm32-metapac/stm32h7b3ai",] +stm32h7b3ii = [ "stm32-metapac/stm32h7b3ii",] +stm32h7b3li = [ "stm32-metapac/stm32h7b3li",] +stm32h7b3ni = [ "stm32-metapac/stm32h7b3ni",] +stm32h7b3qi = [ "stm32-metapac/stm32h7b3qi",] +stm32h7b3ri = [ "stm32-metapac/stm32h7b3ri",] +stm32h7b3vi = [ "stm32-metapac/stm32h7b3vi",] +stm32h7b3zi = [ "stm32-metapac/stm32h7b3zi",] +stm32l010c6 = [ "stm32-metapac/stm32l010c6",] +stm32l010f4 = [ "stm32-metapac/stm32l010f4",] +stm32l010k4 = [ "stm32-metapac/stm32l010k4",] +stm32l010k8 = [ "stm32-metapac/stm32l010k8",] +stm32l010r8 = [ "stm32-metapac/stm32l010r8",] +stm32l010rb = [ "stm32-metapac/stm32l010rb",] +stm32l011d3 = [ "stm32-metapac/stm32l011d3",] +stm32l011d4 = [ "stm32-metapac/stm32l011d4",] +stm32l011e3 = [ "stm32-metapac/stm32l011e3",] +stm32l011e4 = [ "stm32-metapac/stm32l011e4",] +stm32l011f3 = [ "stm32-metapac/stm32l011f3",] +stm32l011f4 = [ "stm32-metapac/stm32l011f4",] +stm32l011g3 = [ "stm32-metapac/stm32l011g3",] +stm32l011g4 = [ "stm32-metapac/stm32l011g4",] +stm32l011k3 = [ "stm32-metapac/stm32l011k3",] +stm32l011k4 = [ "stm32-metapac/stm32l011k4",] +stm32l021d4 = [ "stm32-metapac/stm32l021d4",] +stm32l021f4 = [ "stm32-metapac/stm32l021f4",] +stm32l021g4 = [ "stm32-metapac/stm32l021g4",] +stm32l021k4 = [ "stm32-metapac/stm32l021k4",] +stm32l031c4 = [ "stm32-metapac/stm32l031c4",] +stm32l031c6 = [ "stm32-metapac/stm32l031c6",] +stm32l031e4 = [ "stm32-metapac/stm32l031e4",] +stm32l031e6 = [ "stm32-metapac/stm32l031e6",] +stm32l031f4 = [ "stm32-metapac/stm32l031f4",] +stm32l031f6 = [ "stm32-metapac/stm32l031f6",] +stm32l031g4 = [ "stm32-metapac/stm32l031g4",] +stm32l031g6 = [ "stm32-metapac/stm32l031g6",] +stm32l031k4 = [ "stm32-metapac/stm32l031k4",] +stm32l031k6 = [ "stm32-metapac/stm32l031k6",] +stm32l041c4 = [ "stm32-metapac/stm32l041c4",] +stm32l041c6 = [ "stm32-metapac/stm32l041c6",] +stm32l041e6 = [ "stm32-metapac/stm32l041e6",] +stm32l041f6 = [ "stm32-metapac/stm32l041f6",] +stm32l041g6 = [ "stm32-metapac/stm32l041g6",] +stm32l041k6 = [ "stm32-metapac/stm32l041k6",] +stm32l051c6 = [ "stm32-metapac/stm32l051c6",] +stm32l051c8 = [ "stm32-metapac/stm32l051c8",] +stm32l051k6 = [ "stm32-metapac/stm32l051k6",] +stm32l051k8 = [ "stm32-metapac/stm32l051k8",] +stm32l051r6 = [ "stm32-metapac/stm32l051r6",] +stm32l051r8 = [ "stm32-metapac/stm32l051r8",] +stm32l051t6 = [ "stm32-metapac/stm32l051t6",] +stm32l051t8 = [ "stm32-metapac/stm32l051t8",] +stm32l052c6 = [ "stm32-metapac/stm32l052c6",] +stm32l052c8 = [ "stm32-metapac/stm32l052c8",] +stm32l052k6 = [ "stm32-metapac/stm32l052k6",] +stm32l052k8 = [ "stm32-metapac/stm32l052k8",] +stm32l052r6 = [ "stm32-metapac/stm32l052r6",] +stm32l052r8 = [ "stm32-metapac/stm32l052r8",] +stm32l052t6 = [ "stm32-metapac/stm32l052t6",] +stm32l052t8 = [ "stm32-metapac/stm32l052t8",] +stm32l053c6 = [ "stm32-metapac/stm32l053c6",] +stm32l053c8 = [ "stm32-metapac/stm32l053c8",] +stm32l053r6 = [ "stm32-metapac/stm32l053r6",] +stm32l053r8 = [ "stm32-metapac/stm32l053r8",] +stm32l062c8 = [ "stm32-metapac/stm32l062c8",] +stm32l062k8 = [ "stm32-metapac/stm32l062k8",] +stm32l063c8 = [ "stm32-metapac/stm32l063c8",] +stm32l063r8 = [ "stm32-metapac/stm32l063r8",] +stm32l071c8 = [ "stm32-metapac/stm32l071c8",] +stm32l071cb = [ "stm32-metapac/stm32l071cb",] +stm32l071cz = [ "stm32-metapac/stm32l071cz",] +stm32l071k8 = [ "stm32-metapac/stm32l071k8",] +stm32l071kb = [ "stm32-metapac/stm32l071kb",] +stm32l071kz = [ "stm32-metapac/stm32l071kz",] +stm32l071rb = [ "stm32-metapac/stm32l071rb",] +stm32l071rz = [ "stm32-metapac/stm32l071rz",] +stm32l071v8 = [ "stm32-metapac/stm32l071v8",] +stm32l071vb = [ "stm32-metapac/stm32l071vb",] +stm32l071vz = [ "stm32-metapac/stm32l071vz",] +stm32l072cb = [ "stm32-metapac/stm32l072cb",] +stm32l072cz = [ "stm32-metapac/stm32l072cz",] +stm32l072kb = [ "stm32-metapac/stm32l072kb",] +stm32l072kz = [ "stm32-metapac/stm32l072kz",] +stm32l072rb = [ "stm32-metapac/stm32l072rb",] +stm32l072rz = [ "stm32-metapac/stm32l072rz",] +stm32l072v8 = [ "stm32-metapac/stm32l072v8",] +stm32l072vb = [ "stm32-metapac/stm32l072vb",] +stm32l072vz = [ "stm32-metapac/stm32l072vz",] +stm32l073cb = [ "stm32-metapac/stm32l073cb",] +stm32l073cz = [ "stm32-metapac/stm32l073cz",] +stm32l073rb = [ "stm32-metapac/stm32l073rb",] +stm32l073rz = [ "stm32-metapac/stm32l073rz",] +stm32l073v8 = [ "stm32-metapac/stm32l073v8",] +stm32l073vb = [ "stm32-metapac/stm32l073vb",] +stm32l073vz = [ "stm32-metapac/stm32l073vz",] +stm32l081cb = [ "stm32-metapac/stm32l081cb",] +stm32l081cz = [ "stm32-metapac/stm32l081cz",] +stm32l081kz = [ "stm32-metapac/stm32l081kz",] +stm32l082cz = [ "stm32-metapac/stm32l082cz",] +stm32l082kb = [ "stm32-metapac/stm32l082kb",] +stm32l082kz = [ "stm32-metapac/stm32l082kz",] +stm32l083cb = [ "stm32-metapac/stm32l083cb",] +stm32l083cz = [ "stm32-metapac/stm32l083cz",] +stm32l083rb = [ "stm32-metapac/stm32l083rb",] +stm32l083rz = [ "stm32-metapac/stm32l083rz",] +stm32l083v8 = [ "stm32-metapac/stm32l083v8",] +stm32l083vb = [ "stm32-metapac/stm32l083vb",] +stm32l083vz = [ "stm32-metapac/stm32l083vz",] +stm32l412c8 = [ "stm32-metapac/stm32l412c8",] +stm32l412cb = [ "stm32-metapac/stm32l412cb",] +stm32l412k8 = [ "stm32-metapac/stm32l412k8",] +stm32l412kb = [ "stm32-metapac/stm32l412kb",] +stm32l412r8 = [ "stm32-metapac/stm32l412r8",] +stm32l412rb = [ "stm32-metapac/stm32l412rb",] +stm32l412t8 = [ "stm32-metapac/stm32l412t8",] +stm32l412tb = [ "stm32-metapac/stm32l412tb",] +stm32l422cb = [ "stm32-metapac/stm32l422cb",] +stm32l422kb = [ "stm32-metapac/stm32l422kb",] +stm32l422rb = [ "stm32-metapac/stm32l422rb",] +stm32l422tb = [ "stm32-metapac/stm32l422tb",] +stm32l431cb = [ "stm32-metapac/stm32l431cb",] +stm32l431cc = [ "stm32-metapac/stm32l431cc",] +stm32l431kb = [ "stm32-metapac/stm32l431kb",] +stm32l431kc = [ "stm32-metapac/stm32l431kc",] +stm32l431rb = [ "stm32-metapac/stm32l431rb",] +stm32l431rc = [ "stm32-metapac/stm32l431rc",] +stm32l431vc = [ "stm32-metapac/stm32l431vc",] +stm32l432kb = [ "stm32-metapac/stm32l432kb",] +stm32l432kc = [ "stm32-metapac/stm32l432kc",] +stm32l433cb = [ "stm32-metapac/stm32l433cb",] +stm32l433cc = [ "stm32-metapac/stm32l433cc",] +stm32l433rb = [ "stm32-metapac/stm32l433rb",] +stm32l433rc = [ "stm32-metapac/stm32l433rc",] +stm32l433vc = [ "stm32-metapac/stm32l433vc",] +stm32l442kc = [ "stm32-metapac/stm32l442kc",] +stm32l443cc = [ "stm32-metapac/stm32l443cc",] +stm32l443rc = [ "stm32-metapac/stm32l443rc",] +stm32l443vc = [ "stm32-metapac/stm32l443vc",] +stm32l451cc = [ "stm32-metapac/stm32l451cc",] +stm32l451ce = [ "stm32-metapac/stm32l451ce",] +stm32l451rc = [ "stm32-metapac/stm32l451rc",] +stm32l451re = [ "stm32-metapac/stm32l451re",] +stm32l451vc = [ "stm32-metapac/stm32l451vc",] +stm32l451ve = [ "stm32-metapac/stm32l451ve",] +stm32l452cc = [ "stm32-metapac/stm32l452cc",] +stm32l452ce = [ "stm32-metapac/stm32l452ce",] +stm32l452rc = [ "stm32-metapac/stm32l452rc",] +stm32l452re = [ "stm32-metapac/stm32l452re",] +stm32l452vc = [ "stm32-metapac/stm32l452vc",] +stm32l452ve = [ "stm32-metapac/stm32l452ve",] +stm32l462ce = [ "stm32-metapac/stm32l462ce",] +stm32l462re = [ "stm32-metapac/stm32l462re",] +stm32l462ve = [ "stm32-metapac/stm32l462ve",] +stm32l471qe = [ "stm32-metapac/stm32l471qe",] +stm32l471qg = [ "stm32-metapac/stm32l471qg",] +stm32l471re = [ "stm32-metapac/stm32l471re",] +stm32l471rg = [ "stm32-metapac/stm32l471rg",] +stm32l471ve = [ "stm32-metapac/stm32l471ve",] +stm32l471vg = [ "stm32-metapac/stm32l471vg",] +stm32l471ze = [ "stm32-metapac/stm32l471ze",] +stm32l471zg = [ "stm32-metapac/stm32l471zg",] +stm32l475rc = [ "stm32-metapac/stm32l475rc",] +stm32l475re = [ "stm32-metapac/stm32l475re",] +stm32l475rg = [ "stm32-metapac/stm32l475rg",] +stm32l475vc = [ "stm32-metapac/stm32l475vc",] +stm32l475ve = [ "stm32-metapac/stm32l475ve",] +stm32l475vg = [ "stm32-metapac/stm32l475vg",] +stm32l476je = [ "stm32-metapac/stm32l476je",] +stm32l476jg = [ "stm32-metapac/stm32l476jg",] +stm32l476me = [ "stm32-metapac/stm32l476me",] +stm32l476mg = [ "stm32-metapac/stm32l476mg",] +stm32l476qe = [ "stm32-metapac/stm32l476qe",] +stm32l476qg = [ "stm32-metapac/stm32l476qg",] +stm32l476rc = [ "stm32-metapac/stm32l476rc",] +stm32l476re = [ "stm32-metapac/stm32l476re",] +stm32l476rg = [ "stm32-metapac/stm32l476rg",] +stm32l476vc = [ "stm32-metapac/stm32l476vc",] +stm32l476ve = [ "stm32-metapac/stm32l476ve",] +stm32l476vg = [ "stm32-metapac/stm32l476vg",] +stm32l476ze = [ "stm32-metapac/stm32l476ze",] +stm32l476zg = [ "stm32-metapac/stm32l476zg",] +stm32l485jc = [ "stm32-metapac/stm32l485jc",] +stm32l485je = [ "stm32-metapac/stm32l485je",] +stm32l486jg = [ "stm32-metapac/stm32l486jg",] +stm32l486qg = [ "stm32-metapac/stm32l486qg",] +stm32l486rg = [ "stm32-metapac/stm32l486rg",] +stm32l486vg = [ "stm32-metapac/stm32l486vg",] +stm32l486zg = [ "stm32-metapac/stm32l486zg",] +stm32l496ae = [ "stm32-metapac/stm32l496ae",] +stm32l496ag = [ "stm32-metapac/stm32l496ag",] +stm32l496qe = [ "stm32-metapac/stm32l496qe",] +stm32l496qg = [ "stm32-metapac/stm32l496qg",] +stm32l496re = [ "stm32-metapac/stm32l496re",] +stm32l496rg = [ "stm32-metapac/stm32l496rg",] +stm32l496ve = [ "stm32-metapac/stm32l496ve",] +stm32l496vg = [ "stm32-metapac/stm32l496vg",] +stm32l496wg = [ "stm32-metapac/stm32l496wg",] +stm32l496ze = [ "stm32-metapac/stm32l496ze",] +stm32l496zg = [ "stm32-metapac/stm32l496zg",] +stm32l4a6ag = [ "stm32-metapac/stm32l4a6ag",] +stm32l4a6qg = [ "stm32-metapac/stm32l4a6qg",] +stm32l4a6rg = [ "stm32-metapac/stm32l4a6rg",] +stm32l4a6vg = [ "stm32-metapac/stm32l4a6vg",] +stm32l4a6zg = [ "stm32-metapac/stm32l4a6zg",] +stm32l4p5ae = [ "stm32-metapac/stm32l4p5ae",] +stm32l4p5ag = [ "stm32-metapac/stm32l4p5ag",] +stm32l4p5ce = [ "stm32-metapac/stm32l4p5ce",] +stm32l4p5cg = [ "stm32-metapac/stm32l4p5cg",] +stm32l4p5qe = [ "stm32-metapac/stm32l4p5qe",] +stm32l4p5qg = [ "stm32-metapac/stm32l4p5qg",] +stm32l4p5re = [ "stm32-metapac/stm32l4p5re",] +stm32l4p5rg = [ "stm32-metapac/stm32l4p5rg",] +stm32l4p5ve = [ "stm32-metapac/stm32l4p5ve",] +stm32l4p5vg = [ "stm32-metapac/stm32l4p5vg",] +stm32l4p5ze = [ "stm32-metapac/stm32l4p5ze",] +stm32l4p5zg = [ "stm32-metapac/stm32l4p5zg",] +stm32l4q5ag = [ "stm32-metapac/stm32l4q5ag",] +stm32l4q5cg = [ "stm32-metapac/stm32l4q5cg",] +stm32l4q5qg = [ "stm32-metapac/stm32l4q5qg",] +stm32l4q5rg = [ "stm32-metapac/stm32l4q5rg",] +stm32l4q5vg = [ "stm32-metapac/stm32l4q5vg",] +stm32l4q5zg = [ "stm32-metapac/stm32l4q5zg",] +stm32l4r5ag = [ "stm32-metapac/stm32l4r5ag",] +stm32l4r5ai = [ "stm32-metapac/stm32l4r5ai",] +stm32l4r5qg = [ "stm32-metapac/stm32l4r5qg",] +stm32l4r5qi = [ "stm32-metapac/stm32l4r5qi",] +stm32l4r5vg = [ "stm32-metapac/stm32l4r5vg",] +stm32l4r5vi = [ "stm32-metapac/stm32l4r5vi",] +stm32l4r5zg = [ "stm32-metapac/stm32l4r5zg",] +stm32l4r5zi = [ "stm32-metapac/stm32l4r5zi",] +stm32l4r7ai = [ "stm32-metapac/stm32l4r7ai",] +stm32l4r7vi = [ "stm32-metapac/stm32l4r7vi",] +stm32l4r7zi = [ "stm32-metapac/stm32l4r7zi",] +stm32l4r9ag = [ "stm32-metapac/stm32l4r9ag",] +stm32l4r9ai = [ "stm32-metapac/stm32l4r9ai",] +stm32l4r9vg = [ "stm32-metapac/stm32l4r9vg",] +stm32l4r9vi = [ "stm32-metapac/stm32l4r9vi",] +stm32l4r9zg = [ "stm32-metapac/stm32l4r9zg",] +stm32l4r9zi = [ "stm32-metapac/stm32l4r9zi",] +stm32l4s5ai = [ "stm32-metapac/stm32l4s5ai",] +stm32l4s5qi = [ "stm32-metapac/stm32l4s5qi",] +stm32l4s5vi = [ "stm32-metapac/stm32l4s5vi",] +stm32l4s5zi = [ "stm32-metapac/stm32l4s5zi",] +stm32l4s7ai = [ "stm32-metapac/stm32l4s7ai",] +stm32l4s7vi = [ "stm32-metapac/stm32l4s7vi",] +stm32l4s7zi = [ "stm32-metapac/stm32l4s7zi",] +stm32l4s9ai = [ "stm32-metapac/stm32l4s9ai",] +stm32l4s9vi = [ "stm32-metapac/stm32l4s9vi",] +stm32l4s9zi = [ "stm32-metapac/stm32l4s9zi",] # END GENERATED FEATURES diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 7a46b3dc..ef60a855 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1,34 +1,32 @@ -use regex::Regex; -use std::fmt::Write as _; -use std::fs::File; -use std::io::Write; +use std::env; use std::path::PathBuf; -use std::{env, fs}; +use std::process::Command; fn main() { - let chip = env::vars_os() + let chip_name = env::vars_os() .map(|(a, _)| a.to_string_lossy().to_string()) .find(|x| x.starts_with("CARGO_FEATURE_STM32")) .expect("No stm32xx Cargo feature enabled") .strip_prefix("CARGO_FEATURE_") .unwrap() - .to_ascii_lowercase(); + .to_ascii_uppercase(); - let mut device_x = String::new(); + let out_dir = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + let out_file = out_dir.join("generated.rs").to_string_lossy().to_string(); - let chip_rs = fs::read_to_string(format!("src/pac/{}.rs", chip)).unwrap(); - let re = Regex::new("declare!\\(([a-zA-Z0-9_]+)\\)").unwrap(); - for c in re.captures_iter(&chip_rs) { - let name = c.get(1).unwrap().as_str(); - write!(&mut device_x, "PROVIDE({} = DefaultHandler);\n", name).unwrap(); + let exit_code = Command::new("python3") + .args(&["gen.py", &chip_name, &out_file]) + .status() + .expect("failed to execute gen.py"); + + if !exit_code.success() { + panic!("gen.py exited with {:?}", exit_code) } - let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); - File::create(out.join("device.x")) - .unwrap() - .write_all(device_x.as_bytes()) - .unwrap(); - println!("cargo:rustc-link-search={}", out.display()); - println!("cargo:rerun-if-changed=src/pac/{}.rs", chip); + for s in env::var("DEP_STM32_METAPAC_V0.1_CFGS").unwrap().split(",") { + println!("cargo:rustc-cfg={}", s); + } + println!("cargo:rerun-if-env-changed=DEP_STM32_METAPAC_V0.1_CFGS"); println!("cargo:rerun-if-changed=build.rs"); + println!("cargo:rerun-if-changed=gen.py"); } diff --git a/embassy-stm32/gen.py b/embassy-stm32/gen.py index 4343d775..0b6af166 100644 --- a/embassy-stm32/gen.py +++ b/embassy-stm32/gen.py @@ -1,321 +1,165 @@ -import xmltodict +import sys import yaml import re -import json import os import re -import toml -from collections import OrderedDict -from glob import glob abspath = os.path.abspath(__file__) dname = os.path.dirname(abspath) os.chdir(dname) -# ======= load chips -chips = {} -for f in sorted(glob('stm32-data/data/chips/*.yaml')): - if 'STM32F4' not in f and 'STM32L4' not in f and 'STM32H7' not in f and 'STM32L0' not in f: - continue - with open(f, 'r') as f: - chip = yaml.load(f, Loader=yaml.CSafeLoader) - chip['name'] = chip['name'].lower() - chip['features'] = set() - family = chip["family"].lower().replace('+', 'p') - chip['features'].add(f'_{family}') - print(chip['name']) - chips[chip['name']] = chip +data_path = '../stm32-data/data' + +try: + _, chip_name, output_file = sys.argv +except: + raise Exception("Usage: gen.py STM32F429ZI path/to/generated.rs") + +# ======= load chip +chip_name = chip_name.upper() +with open(f'{data_path}/chips/{chip_name}.yaml', 'r') as f: + chip = yaml.load(f, Loader=yaml.CSafeLoader) +chip['name'] = chip['name'].lower() +chip['features'] = set() +family = chip["family"].lower().replace('+', 'p') +chip['features'].add(f'_{family}') # ======= load GPIO AF -gpio_afs = {} -for f in sorted(glob('stm32-data/data/gpio_af/*.yaml')): - name = f.split('/')[-1].split('.')[0] - with open(f, 'r') as f: - af = yaml.load(f, Loader=yaml.CSafeLoader) - gpio_afs[name] = af +with open(f'{data_path}/gpio_af/{chip["gpio_af"]}.yaml', 'r') as f: + af = yaml.load(f, Loader=yaml.CSafeLoader) -# ========= Generate pac/mod.rs +# ======= Generate! +with open(output_file, 'w') as f: + singletons = [] # USART1, PA5, EXTI8 + exti_interrupts = [] # EXTI IRQs, EXTI0, EXTI4_15 etc. + peripheral_versions = {} # usart -> v1, syscfg -> f4 + pins = set() # set of all present pins. PA4, PA5... -with open('src/pac/mod.rs', 'w') as f: - for chip in chips.values(): - f.write( - f'#[cfg_attr(feature="{chip["name"]}", path="{chip["name"]}.rs")]\n') - f.write('mod chip;\n') - f.write('pub use chip::*;\n') - f.write('#[allow(dead_code, unused_imports)]\n') - f.write('pub mod regs;\n') + # ========= peripherals -# ========= Generate pac/stm32xxx.rs + singletons.extend((f'EXTI{x}' for x in range(16))) + num_dmas = 0 -for chip in chips.values(): - print(f'generating {chip["name"]}') - with open(f'src/pac/{chip["name"]}.rs', 'w') as f: + for (name, peri) in chip['peripherals'].items(): + if 'block' not in peri: + continue - f.write(""" - #![allow(dead_code)] - #![allow(unused_imports)] - #![allow(non_snake_case)] - """) + block = peri['block'] + block_mod, block_name_unparsed = block.rsplit('/') + block_mod, block_version = block_mod.rsplit('_') + block_name = '' + for b in block_name_unparsed.split('_'): + block_name += b.capitalize() - af = gpio_afs[chip['gpio_af']] - peripheral_names = [] # USART1, PA5, EXTI8 - exti_interrupts = [] # EXTI IRQs, EXTI0, EXTI4_15 etc. - peripheral_versions = {} # usart -> v1, syscfg -> f4 - pins = set() # set of all present pins. PA4, PA5... + # Check all peripherals have the same version: it's not OK for the same chip to use both usart_v1 and usart_v2 + if old_version := peripheral_versions.get(block_mod): + if old_version != block_version: + raise Exception(f'Peripheral {block_mod} has two versions: {old_version} and {block_version}') + peripheral_versions[block_mod] = block_version - # TODO this should probably come from the yamls? - # We don't want to hardcode the EXTI peripheral addr + custom_singletons = False - gpio_base = chip['peripherals']['GPIOA']['address'] - gpio_stride = 0x400 - f.write(f""" - pub fn GPIO(n: usize) -> gpio::Gpio {{ - gpio::Gpio((0x{gpio_base:x} + 0x{gpio_stride:x}*n) as _) - }} - """) + if block_mod == 'usart': + f.write(f'impl_usart!({name});') + for pin, funcs in af.items(): + if pin in pins: + if (func := funcs.get(f'{name}_RX')) != None: + f.write(f'impl_usart_pin!({name}, RxPin, {pin}, {func});') + if (func := funcs.get(f'{name}_TX')) != None: + f.write(f'impl_usart_pin!({name}, TxPin, {pin}, {func});') + if (func := funcs.get(f'{name}_CTS')) != None: + f.write(f'impl_usart_pin!({name}, CtsPin, {pin}, {func});') + if (func := funcs.get(f'{name}_RTS')) != None: + f.write(f'impl_usart_pin!({name}, RtsPin, {pin}, {func});') + if (func := funcs.get(f'{name}_CK')) != None: + f.write(f'impl_usart_pin!({name}, CkPin, {pin}, {func});') - # ========= peripherals + if block_mod == 'rng': + for irq in chip['interrupts']: + if re.search('RNG', irq): + f.write(f'impl_rng!({name}, {irq});') - peripheral_names.extend((f'EXTI{x}' for x in range(16))) - num_dmas = 0 - - for (name, peri) in chip['peripherals'].items(): - if 'block' not in peri: - continue - - block = peri['block'] - block_mod, block_name_unparsed = block.rsplit('/') - block_mod, block_version = block_mod.rsplit('_') - block_name = '' - for b in block_name_unparsed.split('_'): - block_name += b.capitalize() - - # Check all peripherals have the same version: it's not OK for the same chip to use both usart_v1 and usart_v2 - if old_version := peripheral_versions.get(block_mod): - if old_version != block_version: - raise Exception(f'Peripheral {block_mod} has two versions: {old_version} and {block_version}') - peripheral_versions[block_mod] = block_version - - # Set features - chip['features'].add(f'_{block_mod}') - chip['features'].add(f'_{block_mod}_{block_version}') - - f.write(f'pub const {name}: {block_mod}::{block_name} = {block_mod}::{block_name}(0x{peri["address"]:x} as _);') - - custom_singletons = False - - if block_mod == 'usart': - f.write(f'impl_usart!({name});') + if block_mod == 'spi': + if 'clock' in peri: + clock = peri['clock'] + f.write(f'impl_spi!({name}, {clock});') for pin, funcs in af.items(): if pin in pins: - if (func := funcs.get(f'{name}_RX')) != None: - f.write(f'impl_usart_pin!({name}, RxPin, {pin}, {func});') - if (func := funcs.get(f'{name}_TX')) != None: - f.write(f'impl_usart_pin!({name}, TxPin, {pin}, {func});') - if (func := funcs.get(f'{name}_CTS')) != None: - f.write(f'impl_usart_pin!({name}, CtsPin, {pin}, {func});') - if (func := funcs.get(f'{name}_RTS')) != None: - f.write(f'impl_usart_pin!({name}, RtsPin, {pin}, {func});') - if (func := funcs.get(f'{name}_CK')) != None: - f.write(f'impl_usart_pin!({name}, CkPin, {pin}, {func});') + if (func := funcs.get(f'{name}_SCK')) != None: + f.write(f'impl_spi_pin!({name}, SckPin, {pin}, {func});') + if (func := funcs.get(f'{name}_MOSI')) != None: + f.write(f'impl_spi_pin!({name}, MosiPin, {pin}, {func});') + if (func := funcs.get(f'{name}_MISO')) != None: + f.write(f'impl_spi_pin!({name}, MisoPin, {pin}, {func});') - if block_mod == 'rng': - for irq in chip['interrupts']: - if re.search('RNG', irq): - f.write(f'impl_rng!({name}, {irq});') + if block_mod == 'i2c': + f.write(f'impl_i2c!({name});') + for pin, funcs in af.items(): + if pin in pins: + if func := funcs.get(f'{name}_SCL'): + f.write(f'impl_i2c_pin!({name}, SclPin, {pin}, {func});') + if func := funcs.get(f'{name}_SDA'): + f.write(f'impl_i2c_pin!({name}, SdaPin, {pin}, {func});') - if block_mod == 'spi': - if 'clock' in peri: - clock = peri['clock'] - f.write(f'impl_spi!({name}, {clock});') - for pin, funcs in af.items(): - if pin in pins: - if (func := funcs.get(f'{name}_SCK')) != None: - f.write(f'impl_spi_pin!({name}, SckPin, {pin}, {func});') - if (func := funcs.get(f'{name}_MOSI')) != None: - f.write(f'impl_spi_pin!({name}, MosiPin, {pin}, {func});') - if (func := funcs.get(f'{name}_MISO')) != None: - f.write(f'impl_spi_pin!({name}, MisoPin, {pin}, {func});') + if block_mod == 'gpio': + custom_singletons = True + port = name[4:] + port_num = ord(port) - ord('A') - if block_mod == 'i2c': - f.write(f'impl_i2c!({name});') - for pin, funcs in af.items(): - if pin in pins: - if func := funcs.get(f'{name}_SCL'): - f.write(f'impl_i2c_pin!({name}, SclPin, {pin}, {func});') - if func := funcs.get(f'{name}_SDA'): - f.write(f'impl_i2c_pin!({name}, SdaPin, {pin}, {func});') + for pin_num in range(16): + pin = f'P{port}{pin_num}' + pins.add(pin) + singletons.append(pin) - if block_mod == 'gpio': - custom_singletons = True - port = name[4:] - port_num = ord(port) - ord('A') + if block_mod == 'dma': + custom_singletons = True + num_dmas += 1 + dma_num = int(name[3:])-1 # substract 1 because we want DMA1=0, DMA2=1 - assert peri['address'] == gpio_base + gpio_stride*port_num + for ch_num in range(8): + channel = f'{name}_CH{ch_num}' + singletons.append(channel) - for pin_num in range(16): - pin = f'P{port}{pin_num}' - pins.add(pin) - peripheral_names.append(pin) - f.write(f'impl_gpio_pin!({pin}, {port_num}, {pin_num}, EXTI{pin_num});') + f.write(f'impl_dma_channel!({channel}, {dma_num}, {ch_num});') - if block_mod == 'dma': - custom_singletons = True - num_dmas += 1 - dma_num = int(name[3:])-1 # substract 1 because we want DMA1=0, DMA2=1 + if peri['block'] == 'sdmmc_v2/SDMMC': + f.write(f'impl_sdmmc!({name});') + for pin, funcs in af.items(): + if pin in pins: + if (func := funcs.get(f'{name}_CK')) != None: + f.write(f'impl_sdmmc_pin!({name}, CkPin, {pin}, {func});') + if (func := funcs.get(f'{name}_CMD')) != None: + f.write(f'impl_sdmmc_pin!({name}, CmdPin, {pin}, {func});') + if (func := funcs.get(f'{name}_D0')) != None: + f.write(f'impl_sdmmc_pin!({name}, D0Pin, {pin}, {func});') + if (func := funcs.get(f'{name}_D1')) != None: + f.write(f'impl_sdmmc_pin!({name}, D1Pin, {pin}, {func});') + if (func := funcs.get(f'{name}_D2')) != None: + f.write(f'impl_sdmmc_pin!({name}, D2Pin, {pin}, {func});') + if (func := funcs.get(f'{name}_D3')) != None: + f.write(f'impl_sdmmc_pin!({name}, D3Pin, {pin}, {func});') + if (func := funcs.get(f'{name}_D4')) != None: + f.write(f'impl_sdmmc_pin!({name}, D4Pin, {pin}, {func});') + if (func := funcs.get(f'{name}_D5')) != None: + f.write(f'impl_sdmmc_pin!({name}, D5Pin, {pin}, {func});') + if (func := funcs.get(f'{name}_D6')) != None: + f.write(f'impl_sdmmc_pin!({name}, D6Pin, {pin}, {func});') + if (func := funcs.get(f'{name}_D7')) != None: + f.write(f'impl_sdmmc_pin!({name}, D7Pin, {pin}, {func});') - for ch_num in range(8): - channel = f'{name}_CH{ch_num}' - peripheral_names.append(channel) + if block_name == 'TimGp16': + if re.match('TIM[2345]$', name): + f.write(f'impl_timer!({name});') - f.write(f'impl_dma_channel!({channel}, {dma_num}, {ch_num});') + if block_mod == 'exti': + for irq in chip['interrupts']: + if re.match('EXTI', irq): + exti_interrupts.append(irq) - if peri['block'] == 'sdmmc_v2/SDMMC': - f.write(f'impl_sdmmc!({name});') - for pin, funcs in af.items(): - if pin in pins: - if (func := funcs.get(f'{name}_CK')) != None: - f.write(f'impl_sdmmc_pin!({name}, CkPin, {pin}, {func});') - if (func := funcs.get(f'{name}_CMD')) != None: - f.write(f'impl_sdmmc_pin!({name}, CmdPin, {pin}, {func});') - if (func := funcs.get(f'{name}_D0')) != None: - f.write(f'impl_sdmmc_pin!({name}, D0Pin, {pin}, {func});') - if (func := funcs.get(f'{name}_D1')) != None: - f.write(f'impl_sdmmc_pin!({name}, D1Pin, {pin}, {func});') - if (func := funcs.get(f'{name}_D2')) != None: - f.write(f'impl_sdmmc_pin!({name}, D2Pin, {pin}, {func});') - if (func := funcs.get(f'{name}_D3')) != None: - f.write(f'impl_sdmmc_pin!({name}, D3Pin, {pin}, {func});') - if (func := funcs.get(f'{name}_D4')) != None: - f.write(f'impl_sdmmc_pin!({name}, D4Pin, {pin}, {func});') - if (func := funcs.get(f'{name}_D5')) != None: - f.write(f'impl_sdmmc_pin!({name}, D5Pin, {pin}, {func});') - if (func := funcs.get(f'{name}_D6')) != None: - f.write(f'impl_sdmmc_pin!({name}, D6Pin, {pin}, {func});') - if (func := funcs.get(f'{name}_D7')) != None: - f.write(f'impl_sdmmc_pin!({name}, D7Pin, {pin}, {func});') + if not custom_singletons: + singletons.append(name) - if block_name == 'TimGp16': - if re.match('TIM[2345]$', name): - f.write(f'impl_timer!({name});') + f.write(f"embassy_extras::peripherals!({','.join(singletons)});") - if block_mod == 'exti': - for irq in chip['interrupts']: - if re.match('EXTI', irq): - exti_interrupts.append(irq) - - if not custom_singletons: - peripheral_names.append(name) - - for mod, version in peripheral_versions.items(): - f.write(f'pub use super::regs::{mod}_{version} as {mod};') - - f.write(f"embassy_extras::peripherals!({','.join(peripheral_names)});") - - # ========= DMA peripherals - if num_dmas > 0: - f.write(f""" - pub fn DMA(n: u8) -> dma::Dma {{ - match n {{ - """) - for n in range(num_dmas - 1): - f.write(f'{n} => DMA{n + 1},') - f.write(f""" - _ => DMA{num_dmas}, - }} - }} - """) - - # ========= exti interrupts - - f.write(f"impl_exti_irq!({','.join(exti_interrupts)});") - - # ========= interrupts - - irq_variants = [] - irq_vectors = [] - irq_fns = [] - irq_declares = [] - - irqs = {num: name for name, num in chip['interrupts'].items()} - irq_count = max(irqs.keys()) + 1 - for num, name in irqs.items(): - irq_variants.append(f'{name} = {num},') - irq_fns.append(f'fn {name}();') - irq_declares.append(f'declare!({name});') - for num in range(irq_count): - if name := irqs.get(num): - irq_vectors.append(f'Vector {{ _handler: {name} }},') - else: - irq_vectors.append(f'Vector {{ _reserved: 0 }},') - - f.write(f""" - pub mod interrupt {{ - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{{declare, take, Interrupt}}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum {{ - {''.join(irq_variants)} - }} - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum {{ - #[inline(always)] - fn number(self) -> u16 {{ - self as u16 - }} - }} - - {''.join(irq_declares)} - }} - mod interrupt_vector {{ - extern "C" {{ - {''.join(irq_fns)} - }} - pub union Vector {{ - _handler: unsafe extern "C" fn(), - _reserved: u32, - }} - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; {irq_count}] = [ - {''.join(irq_vectors)} - ]; - }} - """) - - -# ========= Update Cargo features - -feature_optional_deps = {} -feature_optional_deps['_rng'] = ['rand_core'] -feature_optional_deps['_sdmmc'] = ['sdio-host'] - -features = {} -extra_features = set() -for name, chip in chips.items(): - features[name] = sorted(list(chip['features'])) - for feature in chip['features']: - extra_features.add(feature) -for feature in sorted(list(extra_features)): - features[feature] = feature_optional_deps.get(feature) or [] - -SEPARATOR_START = '# BEGIN GENERATED FEATURES\n' -SEPARATOR_END = '# END GENERATED FEATURES\n' - -with open('Cargo.toml', 'r') as f: - cargo = f.read() -before, cargo = cargo.split(SEPARATOR_START, maxsplit=1) -_, after = cargo.split(SEPARATOR_END, maxsplit=1) -cargo = before + SEPARATOR_START + toml.dumps(features) + SEPARATOR_END + after -with open('Cargo.toml', 'w') as f: - f.write(cargo) - -# ========= Generate pac/regs.rs -os.system('cargo run --manifest-path ../../svd2rust/Cargo.toml -- generate --dir stm32-data/data/registers') -os.system('mv lib.rs src/pac/regs.rs') - -# ========= Update Cargo features -os.system('rustfmt src/pac/*') + # ========= exti interrupts + f.write(f"impl_exti_irq!({','.join(exti_interrupts)});") diff --git a/embassy-stm32/gen_features.py b/embassy-stm32/gen_features.py new file mode 100644 index 00000000..e25a2856 --- /dev/null +++ b/embassy-stm32/gen_features.py @@ -0,0 +1,36 @@ +import os +import toml +from glob import glob + +abspath = os.path.abspath(__file__) +dname = os.path.dirname(abspath) +os.chdir(dname) + +supported_families = [ + 'STM32F4', + 'STM32L0', + 'STM32L4', + 'STM32H7', +] + +# ======= load chip list +features = {} +for f in sorted(glob('../stm32-data/data/chips/*.yaml')): + # Use the filename to get the chip name. Ultra fast, we don't have to read YAML! + name = os.path.splitext(os.path.basename(f))[0] + if any((family in name for family in supported_families)): + name = name.lower() + features[name] = ['stm32-metapac/' + name] + +# ========= Update Cargo features + +SEPARATOR_START = '# BEGIN GENERATED FEATURES\n' +SEPARATOR_END = '# END GENERATED FEATURES\n' +HELP = '# Generated by gen_features.py. DO NOT EDIT.\n' +with open('Cargo.toml', 'r') as f: + cargo = f.read() +before, cargo = cargo.split(SEPARATOR_START, maxsplit=1) +_, after = cargo.split(SEPARATOR_END, maxsplit=1) +cargo = before + SEPARATOR_START + HELP + toml.dumps(features) + SEPARATOR_END + after +with open('Cargo.toml', 'w') as f: + f.write(cargo) diff --git a/embassy-stm32/src/clock.rs b/embassy-stm32/src/clock.rs index 3ae83bbb..f79cab4a 100644 --- a/embassy-stm32/src/clock.rs +++ b/embassy-stm32/src/clock.rs @@ -79,7 +79,7 @@ impl Clock { // TODO: Temporary until clock code generation is in place pub fn start_tim2(&'static self) { cfg_if::cfg_if! { - if #[cfg(feature = "_stm32l0")] { + if #[cfg(stm32l0)] { unsafe { let rcc = crate::pac::RCC; rcc.apb1enr() @@ -364,10 +364,10 @@ pub trait Instance: sealed::Instance + Sized + 'static {} macro_rules! impl_timer { ($inst:ident) => { impl crate::clock::sealed::Instance for peripherals::$inst { - type Interrupt = interrupt::$inst; + type Interrupt = crate::interrupt::$inst; fn inner() -> crate::clock::TimerInner { - const INNER: crate::clock::TimerInner = crate::clock::TimerInner($inst); + const INNER: crate::clock::TimerInner = crate::clock::TimerInner(crate::pac::$inst); INNER } } diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index 7f282cde..aef31ce7 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs @@ -1,8 +1,9 @@ #![macro_use] -#[cfg_attr(feature = "_dma_v1", path = "v1.rs")] -#[cfg_attr(feature = "_dma_v2", path = "v2.rs")] +#[cfg_attr(dma_v1, path = "v1.rs")] +#[cfg_attr(dma_v2, path = "v2.rs")] mod _version; + #[allow(unused)] pub use _version::*; @@ -21,7 +22,7 @@ pub(crate) mod sealed { self.num() % 8 } fn regs(&self) -> pac::dma::Dma { - pac::DMA(self.num()) + pac::DMA(self.num() as _) } } } diff --git a/embassy-stm32/src/dma/v2.rs b/embassy-stm32/src/dma/v2.rs index e3653d3e..ba13f8d4 100644 --- a/embassy-stm32/src/dma/v2.rs +++ b/embassy-stm32/src/dma/v2.rs @@ -102,86 +102,86 @@ unsafe fn on_irq() { } #[interrupt] -unsafe fn DMA1_Stream0() { +unsafe fn DMA1_STREAM0() { on_irq() } #[interrupt] -unsafe fn DMA1_Stream1() { +unsafe fn DMA1_STREAM1() { on_irq() } #[interrupt] -unsafe fn DMA1_Stream2() { +unsafe fn DMA1_STREAM2() { on_irq() } #[interrupt] -unsafe fn DMA1_Stream3() { +unsafe fn DMA1_STREAM3() { on_irq() } #[interrupt] -unsafe fn DMA1_Stream4() { +unsafe fn DMA1_STREAM4() { on_irq() } #[interrupt] -unsafe fn DMA1_Stream5() { +unsafe fn DMA1_STREAM5() { on_irq() } #[interrupt] -unsafe fn DMA1_Stream6() { +unsafe fn DMA1_STREAM6() { on_irq() } #[interrupt] -unsafe fn DMA1_Stream7() { +unsafe fn DMA1_STREAM7() { on_irq() } #[interrupt] -unsafe fn DMA2_Stream0() { +unsafe fn DMA2_STREAM0() { on_irq() } #[interrupt] -unsafe fn DMA2_Stream1() { +unsafe fn DMA2_STREAM1() { on_irq() } #[interrupt] -unsafe fn DMA2_Stream2() { +unsafe fn DMA2_STREAM2() { on_irq() } #[interrupt] -unsafe fn DMA2_Stream3() { +unsafe fn DMA2_STREAM3() { on_irq() } #[interrupt] -unsafe fn DMA2_Stream4() { +unsafe fn DMA2_STREAM4() { on_irq() } #[interrupt] -unsafe fn DMA2_Stream5() { +unsafe fn DMA2_STREAM5() { on_irq() } #[interrupt] -unsafe fn DMA2_Stream6() { +unsafe fn DMA2_STREAM6() { on_irq() } #[interrupt] -unsafe fn DMA2_Stream7() { +unsafe fn DMA2_STREAM7() { on_irq() } /// safety: must be called only once pub(crate) unsafe fn init() { - interrupt::DMA1_Stream0::steal().enable(); - interrupt::DMA1_Stream1::steal().enable(); - interrupt::DMA1_Stream2::steal().enable(); - interrupt::DMA1_Stream3::steal().enable(); - interrupt::DMA1_Stream4::steal().enable(); - interrupt::DMA1_Stream5::steal().enable(); - interrupt::DMA1_Stream6::steal().enable(); - interrupt::DMA1_Stream7::steal().enable(); - interrupt::DMA2_Stream0::steal().enable(); - interrupt::DMA2_Stream1::steal().enable(); - interrupt::DMA2_Stream2::steal().enable(); - interrupt::DMA2_Stream3::steal().enable(); - interrupt::DMA2_Stream4::steal().enable(); - interrupt::DMA2_Stream5::steal().enable(); - interrupt::DMA2_Stream6::steal().enable(); - interrupt::DMA2_Stream7::steal().enable(); + interrupt::DMA1_STREAM0::steal().enable(); + interrupt::DMA1_STREAM1::steal().enable(); + interrupt::DMA1_STREAM2::steal().enable(); + interrupt::DMA1_STREAM3::steal().enable(); + interrupt::DMA1_STREAM4::steal().enable(); + interrupt::DMA1_STREAM5::steal().enable(); + interrupt::DMA1_STREAM6::steal().enable(); + interrupt::DMA1_STREAM7::steal().enable(); + interrupt::DMA2_STREAM0::steal().enable(); + interrupt::DMA2_STREAM1::steal().enable(); + interrupt::DMA2_STREAM2::steal().enable(); + interrupt::DMA2_STREAM3::steal().enable(); + interrupt::DMA2_STREAM4::steal().enable(); + interrupt::DMA2_STREAM5::steal().enable(); + interrupt::DMA2_STREAM6::steal().enable(); + interrupt::DMA2_STREAM7::steal().enable(); } diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs index 0b74fe05..61c28aa7 100644 --- a/embassy-stm32/src/exti.rs +++ b/embassy-stm32/src/exti.rs @@ -212,6 +212,8 @@ impl_exti!(EXTI13, 13); impl_exti!(EXTI14, 14); impl_exti!(EXTI15, 15); +pub(crate) unsafe fn init() {} + macro_rules! impl_exti_irq { ($($e:ident),+) => { /// safety: must be called only once diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 9dc5858c..023ec7a2 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -7,6 +7,7 @@ use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin}; use crate::pac; use crate::pac::gpio::{self, vals}; +use crate::peripherals; /// Pull setting for an input. #[derive(Debug, Eq, PartialEq)] @@ -315,16 +316,16 @@ impl OptionalPin for NoPin { // ==================== -macro_rules! impl_gpio_pin { - ($type:ident, $port_num:expr, $pin_num:expr, $exti_ch:ident) => { - impl crate::gpio::Pin for peripherals::$type { +crate::pac::pins!( + ($pin_name:ident, $port_name:ident, $port_num:expr, $pin_num:expr, $exti_ch:ident) => { + impl Pin for peripherals::$pin_name { type ExtiChannel = peripherals::$exti_ch; } - impl crate::gpio::sealed::Pin for peripherals::$type { + impl sealed::Pin for peripherals::$pin_name { #[inline] fn pin_port(&self) -> u8 { $port_num * 16 + $pin_num } } }; -} +); diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index 9650aa5f..7b0dd816 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -#[cfg_attr(feature = "_i2c_v1", path = "v1.rs")] -#[cfg_attr(feature = "_i2c_v2", path = "v2.rs")] +#[cfg_attr(i2c_v1, path = "v1.rs")] +#[cfg_attr(i2c_v2, path = "v2.rs")] mod _version; pub use _version::*; diff --git a/embassy-stm32/src/interrupt.rs b/embassy-stm32/src/interrupt.rs new file mode 100644 index 00000000..a12cdf23 --- /dev/null +++ b/embassy-stm32/src/interrupt.rs @@ -0,0 +1,13 @@ +pub use bare_metal::Mutex; +pub use critical_section::CriticalSection; +pub use embassy::interrupt::{take, Interrupt}; +pub use embassy_extras::interrupt::Priority4 as Priority; + +use crate::pac::Interrupt as InterruptEnum; +use embassy::interrupt::declare; + +crate::pac::interrupts!( + ($name:ident) => { + declare!($name); + }; +); diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 01e6ea51..6a00f5f9 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -6,41 +6,51 @@ #![feature(type_alias_impl_trait)] #![allow(incomplete_features)] +pub(crate) use stm32_metapac as pac; + // This must go FIRST so that all the other modules see its macros. pub mod fmt; -#[cfg(feature = "_timer")] -pub mod clock; -#[cfg(feature = "_dma")] -pub mod dma; -pub mod exti; -pub mod gpio; -#[cfg(feature = "_i2c")] -pub mod i2c; -pub mod pwr; -pub mod rcc; -#[cfg(feature = "_rng")] -pub mod rng; -#[cfg(feature = "_sdmmc")] -pub mod sdmmc; -#[cfg(feature = "_spi")] -pub mod spi; -#[cfg(feature = "_usart")] -pub mod usart; - -// This must go LAST so that it sees the `impl_foo!` macros -#[cfg(feature = "pac")] -pub mod pac; - -#[cfg(not(feature = "pac"))] -mod pac; +// Utilities +pub mod interrupt; pub mod time; -pub use embassy_macros::interrupt; -pub use pac::{interrupt, peripherals, Peripherals}; +// Always-present hardware +pub mod exti; +pub mod gpio; +pub mod rcc; -// workaround for svd2rust-generated code using `use crate::generic::*;` -pub(crate) use pac::regs::generic; +// Sometimes-present hardware +#[cfg(timer)] +pub mod clock; +#[cfg(dma)] +pub mod dma; +#[cfg(i2c)] +pub mod i2c; +#[cfg(pwr)] +pub mod pwr; +#[cfg(rng)] +pub mod rng; +#[cfg(sdmmc)] +pub mod sdmmc; +#[cfg(spi)] +pub mod spi; +#[cfg(usart)] +pub mod usart; + +// This must go last, so that it sees all the impl_foo! macros defined earlier. +mod generated { + + #![allow(dead_code)] + #![allow(unused_imports)] + #![allow(non_snake_case)] + + use crate::interrupt; + + include!(concat!(env!("OUT_DIR"), "/generated.rs")); +} +pub use embassy_macros::interrupt; +pub use generated::{peripherals, Peripherals}; #[non_exhaustive] pub struct Config { @@ -67,8 +77,11 @@ pub fn init(config: Config) -> Peripherals { let p = Peripherals::take(); unsafe { + exti::init(); + + #[cfg(dma)] dma::init(); - pac::init_exti(); + generated::init_exti(); rcc::init(config.rcc); } diff --git a/embassy-stm32/src/pac/mod.rs b/embassy-stm32/src/pac/mod.rs deleted file mode 100644 index 8ed31d7b..00000000 --- a/embassy-stm32/src/pac/mod.rs +++ /dev/null @@ -1,507 +0,0 @@ -#[cfg_attr(feature = "stm32f401cb", path = "stm32f401cb.rs")] -#[cfg_attr(feature = "stm32f401cc", path = "stm32f401cc.rs")] -#[cfg_attr(feature = "stm32f401cd", path = "stm32f401cd.rs")] -#[cfg_attr(feature = "stm32f401ce", path = "stm32f401ce.rs")] -#[cfg_attr(feature = "stm32f401rb", path = "stm32f401rb.rs")] -#[cfg_attr(feature = "stm32f401rc", path = "stm32f401rc.rs")] -#[cfg_attr(feature = "stm32f401rd", path = "stm32f401rd.rs")] -#[cfg_attr(feature = "stm32f401re", path = "stm32f401re.rs")] -#[cfg_attr(feature = "stm32f401vb", path = "stm32f401vb.rs")] -#[cfg_attr(feature = "stm32f401vc", path = "stm32f401vc.rs")] -#[cfg_attr(feature = "stm32f401vd", path = "stm32f401vd.rs")] -#[cfg_attr(feature = "stm32f401ve", path = "stm32f401ve.rs")] -#[cfg_attr(feature = "stm32f405oe", path = "stm32f405oe.rs")] -#[cfg_attr(feature = "stm32f405og", path = "stm32f405og.rs")] -#[cfg_attr(feature = "stm32f405rg", path = "stm32f405rg.rs")] -#[cfg_attr(feature = "stm32f405vg", path = "stm32f405vg.rs")] -#[cfg_attr(feature = "stm32f405zg", path = "stm32f405zg.rs")] -#[cfg_attr(feature = "stm32f407ie", path = "stm32f407ie.rs")] -#[cfg_attr(feature = "stm32f407ig", path = "stm32f407ig.rs")] -#[cfg_attr(feature = "stm32f407ve", path = "stm32f407ve.rs")] -#[cfg_attr(feature = "stm32f407vg", path = "stm32f407vg.rs")] -#[cfg_attr(feature = "stm32f407ze", path = "stm32f407ze.rs")] -#[cfg_attr(feature = "stm32f407zg", path = "stm32f407zg.rs")] -#[cfg_attr(feature = "stm32f410c8", path = "stm32f410c8.rs")] -#[cfg_attr(feature = "stm32f410cb", path = "stm32f410cb.rs")] -#[cfg_attr(feature = "stm32f410r8", path = "stm32f410r8.rs")] -#[cfg_attr(feature = "stm32f410rb", path = "stm32f410rb.rs")] -#[cfg_attr(feature = "stm32f410t8", path = "stm32f410t8.rs")] -#[cfg_attr(feature = "stm32f410tb", path = "stm32f410tb.rs")] -#[cfg_attr(feature = "stm32f411cc", path = "stm32f411cc.rs")] -#[cfg_attr(feature = "stm32f411ce", path = "stm32f411ce.rs")] -#[cfg_attr(feature = "stm32f411rc", path = "stm32f411rc.rs")] -#[cfg_attr(feature = "stm32f411re", path = "stm32f411re.rs")] -#[cfg_attr(feature = "stm32f411vc", path = "stm32f411vc.rs")] -#[cfg_attr(feature = "stm32f411ve", path = "stm32f411ve.rs")] -#[cfg_attr(feature = "stm32f412ce", path = "stm32f412ce.rs")] -#[cfg_attr(feature = "stm32f412cg", path = "stm32f412cg.rs")] -#[cfg_attr(feature = "stm32f412re", path = "stm32f412re.rs")] -#[cfg_attr(feature = "stm32f412rg", path = "stm32f412rg.rs")] -#[cfg_attr(feature = "stm32f412ve", path = "stm32f412ve.rs")] -#[cfg_attr(feature = "stm32f412vg", path = "stm32f412vg.rs")] -#[cfg_attr(feature = "stm32f412ze", path = "stm32f412ze.rs")] -#[cfg_attr(feature = "stm32f412zg", path = "stm32f412zg.rs")] -#[cfg_attr(feature = "stm32f413cg", path = "stm32f413cg.rs")] -#[cfg_attr(feature = "stm32f413ch", path = "stm32f413ch.rs")] -#[cfg_attr(feature = "stm32f413mg", path = "stm32f413mg.rs")] -#[cfg_attr(feature = "stm32f413mh", path = "stm32f413mh.rs")] -#[cfg_attr(feature = "stm32f413rg", path = "stm32f413rg.rs")] -#[cfg_attr(feature = "stm32f413rh", path = "stm32f413rh.rs")] -#[cfg_attr(feature = "stm32f413vg", path = "stm32f413vg.rs")] -#[cfg_attr(feature = "stm32f413vh", path = "stm32f413vh.rs")] -#[cfg_attr(feature = "stm32f413zg", path = "stm32f413zg.rs")] -#[cfg_attr(feature = "stm32f413zh", path = "stm32f413zh.rs")] -#[cfg_attr(feature = "stm32f415og", path = "stm32f415og.rs")] -#[cfg_attr(feature = "stm32f415rg", path = "stm32f415rg.rs")] -#[cfg_attr(feature = "stm32f415vg", path = "stm32f415vg.rs")] -#[cfg_attr(feature = "stm32f415zg", path = "stm32f415zg.rs")] -#[cfg_attr(feature = "stm32f417ie", path = "stm32f417ie.rs")] -#[cfg_attr(feature = "stm32f417ig", path = "stm32f417ig.rs")] -#[cfg_attr(feature = "stm32f417ve", path = "stm32f417ve.rs")] -#[cfg_attr(feature = "stm32f417vg", path = "stm32f417vg.rs")] -#[cfg_attr(feature = "stm32f417ze", path = "stm32f417ze.rs")] -#[cfg_attr(feature = "stm32f417zg", path = "stm32f417zg.rs")] -#[cfg_attr(feature = "stm32f423ch", path = "stm32f423ch.rs")] -#[cfg_attr(feature = "stm32f423mh", path = "stm32f423mh.rs")] -#[cfg_attr(feature = "stm32f423rh", path = "stm32f423rh.rs")] -#[cfg_attr(feature = "stm32f423vh", path = "stm32f423vh.rs")] -#[cfg_attr(feature = "stm32f423zh", path = "stm32f423zh.rs")] -#[cfg_attr(feature = "stm32f427ag", path = "stm32f427ag.rs")] -#[cfg_attr(feature = "stm32f427ai", path = "stm32f427ai.rs")] -#[cfg_attr(feature = "stm32f427ig", path = "stm32f427ig.rs")] -#[cfg_attr(feature = "stm32f427ii", path = "stm32f427ii.rs")] -#[cfg_attr(feature = "stm32f427vg", path = "stm32f427vg.rs")] -#[cfg_attr(feature = "stm32f427vi", path = "stm32f427vi.rs")] -#[cfg_attr(feature = "stm32f427zg", path = "stm32f427zg.rs")] -#[cfg_attr(feature = "stm32f427zi", path = "stm32f427zi.rs")] -#[cfg_attr(feature = "stm32f429ag", path = "stm32f429ag.rs")] -#[cfg_attr(feature = "stm32f429ai", path = "stm32f429ai.rs")] -#[cfg_attr(feature = "stm32f429be", path = "stm32f429be.rs")] -#[cfg_attr(feature = "stm32f429bg", path = "stm32f429bg.rs")] -#[cfg_attr(feature = "stm32f429bi", path = "stm32f429bi.rs")] -#[cfg_attr(feature = "stm32f429ie", path = "stm32f429ie.rs")] -#[cfg_attr(feature = "stm32f429ig", path = "stm32f429ig.rs")] -#[cfg_attr(feature = "stm32f429ii", path = "stm32f429ii.rs")] -#[cfg_attr(feature = "stm32f429ne", path = "stm32f429ne.rs")] -#[cfg_attr(feature = "stm32f429ng", path = "stm32f429ng.rs")] -#[cfg_attr(feature = "stm32f429ni", path = "stm32f429ni.rs")] -#[cfg_attr(feature = "stm32f429ve", path = "stm32f429ve.rs")] -#[cfg_attr(feature = "stm32f429vg", path = "stm32f429vg.rs")] -#[cfg_attr(feature = "stm32f429vi", path = "stm32f429vi.rs")] -#[cfg_attr(feature = "stm32f429ze", path = "stm32f429ze.rs")] -#[cfg_attr(feature = "stm32f429zg", path = "stm32f429zg.rs")] -#[cfg_attr(feature = "stm32f429zi", path = "stm32f429zi.rs")] -#[cfg_attr(feature = "stm32f437ai", path = "stm32f437ai.rs")] -#[cfg_attr(feature = "stm32f437ig", path = "stm32f437ig.rs")] -#[cfg_attr(feature = "stm32f437ii", path = "stm32f437ii.rs")] -#[cfg_attr(feature = "stm32f437vg", path = "stm32f437vg.rs")] -#[cfg_attr(feature = "stm32f437vi", path = "stm32f437vi.rs")] -#[cfg_attr(feature = "stm32f437zg", path = "stm32f437zg.rs")] -#[cfg_attr(feature = "stm32f437zi", path = "stm32f437zi.rs")] -#[cfg_attr(feature = "stm32f439ai", path = "stm32f439ai.rs")] -#[cfg_attr(feature = "stm32f439bg", path = "stm32f439bg.rs")] -#[cfg_attr(feature = "stm32f439bi", path = "stm32f439bi.rs")] -#[cfg_attr(feature = "stm32f439ig", path = "stm32f439ig.rs")] -#[cfg_attr(feature = "stm32f439ii", path = "stm32f439ii.rs")] -#[cfg_attr(feature = "stm32f439ng", path = "stm32f439ng.rs")] -#[cfg_attr(feature = "stm32f439ni", path = "stm32f439ni.rs")] -#[cfg_attr(feature = "stm32f439vg", path = "stm32f439vg.rs")] -#[cfg_attr(feature = "stm32f439vi", path = "stm32f439vi.rs")] -#[cfg_attr(feature = "stm32f439zg", path = "stm32f439zg.rs")] -#[cfg_attr(feature = "stm32f439zi", path = "stm32f439zi.rs")] -#[cfg_attr(feature = "stm32f446mc", path = "stm32f446mc.rs")] -#[cfg_attr(feature = "stm32f446me", path = "stm32f446me.rs")] -#[cfg_attr(feature = "stm32f446rc", path = "stm32f446rc.rs")] -#[cfg_attr(feature = "stm32f446re", path = "stm32f446re.rs")] -#[cfg_attr(feature = "stm32f446vc", path = "stm32f446vc.rs")] -#[cfg_attr(feature = "stm32f446ve", path = "stm32f446ve.rs")] -#[cfg_attr(feature = "stm32f446zc", path = "stm32f446zc.rs")] -#[cfg_attr(feature = "stm32f446ze", path = "stm32f446ze.rs")] -#[cfg_attr(feature = "stm32f469ae", path = "stm32f469ae.rs")] -#[cfg_attr(feature = "stm32f469ag", path = "stm32f469ag.rs")] -#[cfg_attr(feature = "stm32f469ai", path = "stm32f469ai.rs")] -#[cfg_attr(feature = "stm32f469be", path = "stm32f469be.rs")] -#[cfg_attr(feature = "stm32f469bg", path = "stm32f469bg.rs")] -#[cfg_attr(feature = "stm32f469bi", path = "stm32f469bi.rs")] -#[cfg_attr(feature = "stm32f469ie", path = "stm32f469ie.rs")] -#[cfg_attr(feature = "stm32f469ig", path = "stm32f469ig.rs")] -#[cfg_attr(feature = "stm32f469ii", path = "stm32f469ii.rs")] -#[cfg_attr(feature = "stm32f469ne", path = "stm32f469ne.rs")] -#[cfg_attr(feature = "stm32f469ng", path = "stm32f469ng.rs")] -#[cfg_attr(feature = "stm32f469ni", path = "stm32f469ni.rs")] -#[cfg_attr(feature = "stm32f469ve", path = "stm32f469ve.rs")] -#[cfg_attr(feature = "stm32f469vg", path = "stm32f469vg.rs")] -#[cfg_attr(feature = "stm32f469vi", path = "stm32f469vi.rs")] -#[cfg_attr(feature = "stm32f469ze", path = "stm32f469ze.rs")] -#[cfg_attr(feature = "stm32f469zg", path = "stm32f469zg.rs")] -#[cfg_attr(feature = "stm32f469zi", path = "stm32f469zi.rs")] -#[cfg_attr(feature = "stm32f479ag", path = "stm32f479ag.rs")] -#[cfg_attr(feature = "stm32f479ai", path = "stm32f479ai.rs")] -#[cfg_attr(feature = "stm32f479bg", path = "stm32f479bg.rs")] -#[cfg_attr(feature = "stm32f479bi", path = "stm32f479bi.rs")] -#[cfg_attr(feature = "stm32f479ig", path = "stm32f479ig.rs")] -#[cfg_attr(feature = "stm32f479ii", path = "stm32f479ii.rs")] -#[cfg_attr(feature = "stm32f479ng", path = "stm32f479ng.rs")] -#[cfg_attr(feature = "stm32f479ni", path = "stm32f479ni.rs")] -#[cfg_attr(feature = "stm32f479vg", path = "stm32f479vg.rs")] -#[cfg_attr(feature = "stm32f479vi", path = "stm32f479vi.rs")] -#[cfg_attr(feature = "stm32f479zg", path = "stm32f479zg.rs")] -#[cfg_attr(feature = "stm32f479zi", path = "stm32f479zi.rs")] -#[cfg_attr(feature = "stm32h723ve", path = "stm32h723ve.rs")] -#[cfg_attr(feature = "stm32h723vg", path = "stm32h723vg.rs")] -#[cfg_attr(feature = "stm32h723ze", path = "stm32h723ze.rs")] -#[cfg_attr(feature = "stm32h723zg", path = "stm32h723zg.rs")] -#[cfg_attr(feature = "stm32h725ae", path = "stm32h725ae.rs")] -#[cfg_attr(feature = "stm32h725ag", path = "stm32h725ag.rs")] -#[cfg_attr(feature = "stm32h725ie", path = "stm32h725ie.rs")] -#[cfg_attr(feature = "stm32h725ig", path = "stm32h725ig.rs")] -#[cfg_attr(feature = "stm32h725re", path = "stm32h725re.rs")] -#[cfg_attr(feature = "stm32h725rg", path = "stm32h725rg.rs")] -#[cfg_attr(feature = "stm32h725ve", path = "stm32h725ve.rs")] -#[cfg_attr(feature = "stm32h725vg", path = "stm32h725vg.rs")] -#[cfg_attr(feature = "stm32h725ze", path = "stm32h725ze.rs")] -#[cfg_attr(feature = "stm32h725zg", path = "stm32h725zg.rs")] -#[cfg_attr(feature = "stm32h730ab", path = "stm32h730ab.rs")] -#[cfg_attr(feature = "stm32h730ib", path = "stm32h730ib.rs")] -#[cfg_attr(feature = "stm32h730vb", path = "stm32h730vb.rs")] -#[cfg_attr(feature = "stm32h730zb", path = "stm32h730zb.rs")] -#[cfg_attr(feature = "stm32h733vg", path = "stm32h733vg.rs")] -#[cfg_attr(feature = "stm32h733zg", path = "stm32h733zg.rs")] -#[cfg_attr(feature = "stm32h735ag", path = "stm32h735ag.rs")] -#[cfg_attr(feature = "stm32h735ig", path = "stm32h735ig.rs")] -#[cfg_attr(feature = "stm32h735rg", path = "stm32h735rg.rs")] -#[cfg_attr(feature = "stm32h735vg", path = "stm32h735vg.rs")] -#[cfg_attr(feature = "stm32h735zg", path = "stm32h735zg.rs")] -#[cfg_attr(feature = "stm32h742ag", path = "stm32h742ag.rs")] -#[cfg_attr(feature = "stm32h742ai", path = "stm32h742ai.rs")] -#[cfg_attr(feature = "stm32h742bg", path = "stm32h742bg.rs")] -#[cfg_attr(feature = "stm32h742bi", path = "stm32h742bi.rs")] -#[cfg_attr(feature = "stm32h742ig", path = "stm32h742ig.rs")] -#[cfg_attr(feature = "stm32h742ii", path = "stm32h742ii.rs")] -#[cfg_attr(feature = "stm32h742vg", path = "stm32h742vg.rs")] -#[cfg_attr(feature = "stm32h742vi", path = "stm32h742vi.rs")] -#[cfg_attr(feature = "stm32h742xg", path = "stm32h742xg.rs")] -#[cfg_attr(feature = "stm32h742xi", path = "stm32h742xi.rs")] -#[cfg_attr(feature = "stm32h742zg", path = "stm32h742zg.rs")] -#[cfg_attr(feature = "stm32h742zi", path = "stm32h742zi.rs")] -#[cfg_attr(feature = "stm32h743ag", path = "stm32h743ag.rs")] -#[cfg_attr(feature = "stm32h743ai", path = "stm32h743ai.rs")] -#[cfg_attr(feature = "stm32h743bg", path = "stm32h743bg.rs")] -#[cfg_attr(feature = "stm32h743bi", path = "stm32h743bi.rs")] -#[cfg_attr(feature = "stm32h743ig", path = "stm32h743ig.rs")] -#[cfg_attr(feature = "stm32h743ii", path = "stm32h743ii.rs")] -#[cfg_attr(feature = "stm32h743vg", path = "stm32h743vg.rs")] -#[cfg_attr(feature = "stm32h743vi", path = "stm32h743vi.rs")] -#[cfg_attr(feature = "stm32h743xg", path = "stm32h743xg.rs")] -#[cfg_attr(feature = "stm32h743xi", path = "stm32h743xi.rs")] -#[cfg_attr(feature = "stm32h743zg", path = "stm32h743zg.rs")] -#[cfg_attr(feature = "stm32h743zi", path = "stm32h743zi.rs")] -#[cfg_attr(feature = "stm32h745bg", path = "stm32h745bg.rs")] -#[cfg_attr(feature = "stm32h745bi", path = "stm32h745bi.rs")] -#[cfg_attr(feature = "stm32h745ig", path = "stm32h745ig.rs")] -#[cfg_attr(feature = "stm32h745ii", path = "stm32h745ii.rs")] -#[cfg_attr(feature = "stm32h745xg", path = "stm32h745xg.rs")] -#[cfg_attr(feature = "stm32h745xi", path = "stm32h745xi.rs")] -#[cfg_attr(feature = "stm32h745zg", path = "stm32h745zg.rs")] -#[cfg_attr(feature = "stm32h745zi", path = "stm32h745zi.rs")] -#[cfg_attr(feature = "stm32h747ag", path = "stm32h747ag.rs")] -#[cfg_attr(feature = "stm32h747ai", path = "stm32h747ai.rs")] -#[cfg_attr(feature = "stm32h747bg", path = "stm32h747bg.rs")] -#[cfg_attr(feature = "stm32h747bi", path = "stm32h747bi.rs")] -#[cfg_attr(feature = "stm32h747ig", path = "stm32h747ig.rs")] -#[cfg_attr(feature = "stm32h747ii", path = "stm32h747ii.rs")] -#[cfg_attr(feature = "stm32h747xg", path = "stm32h747xg.rs")] -#[cfg_attr(feature = "stm32h747xi", path = "stm32h747xi.rs")] -#[cfg_attr(feature = "stm32h747zi", path = "stm32h747zi.rs")] -#[cfg_attr(feature = "stm32h750ib", path = "stm32h750ib.rs")] -#[cfg_attr(feature = "stm32h750vb", path = "stm32h750vb.rs")] -#[cfg_attr(feature = "stm32h750xb", path = "stm32h750xb.rs")] -#[cfg_attr(feature = "stm32h750zb", path = "stm32h750zb.rs")] -#[cfg_attr(feature = "stm32h753ai", path = "stm32h753ai.rs")] -#[cfg_attr(feature = "stm32h753bi", path = "stm32h753bi.rs")] -#[cfg_attr(feature = "stm32h753ii", path = "stm32h753ii.rs")] -#[cfg_attr(feature = "stm32h753vi", path = "stm32h753vi.rs")] -#[cfg_attr(feature = "stm32h753xi", path = "stm32h753xi.rs")] -#[cfg_attr(feature = "stm32h753zi", path = "stm32h753zi.rs")] -#[cfg_attr(feature = "stm32h755bi", path = "stm32h755bi.rs")] -#[cfg_attr(feature = "stm32h755ii", path = "stm32h755ii.rs")] -#[cfg_attr(feature = "stm32h755xi", path = "stm32h755xi.rs")] -#[cfg_attr(feature = "stm32h755zi", path = "stm32h755zi.rs")] -#[cfg_attr(feature = "stm32h757ai", path = "stm32h757ai.rs")] -#[cfg_attr(feature = "stm32h757bi", path = "stm32h757bi.rs")] -#[cfg_attr(feature = "stm32h757ii", path = "stm32h757ii.rs")] -#[cfg_attr(feature = "stm32h757xi", path = "stm32h757xi.rs")] -#[cfg_attr(feature = "stm32h757zi", path = "stm32h757zi.rs")] -#[cfg_attr(feature = "stm32h7a3ag", path = "stm32h7a3ag.rs")] -#[cfg_attr(feature = "stm32h7a3ai", path = "stm32h7a3ai.rs")] -#[cfg_attr(feature = "stm32h7a3ig", path = "stm32h7a3ig.rs")] -#[cfg_attr(feature = "stm32h7a3ii", path = "stm32h7a3ii.rs")] -#[cfg_attr(feature = "stm32h7a3lg", path = "stm32h7a3lg.rs")] -#[cfg_attr(feature = "stm32h7a3li", path = "stm32h7a3li.rs")] -#[cfg_attr(feature = "stm32h7a3ng", path = "stm32h7a3ng.rs")] -#[cfg_attr(feature = "stm32h7a3ni", path = "stm32h7a3ni.rs")] -#[cfg_attr(feature = "stm32h7a3qi", path = "stm32h7a3qi.rs")] -#[cfg_attr(feature = "stm32h7a3rg", path = "stm32h7a3rg.rs")] -#[cfg_attr(feature = "stm32h7a3ri", path = "stm32h7a3ri.rs")] -#[cfg_attr(feature = "stm32h7a3vg", path = "stm32h7a3vg.rs")] -#[cfg_attr(feature = "stm32h7a3vi", path = "stm32h7a3vi.rs")] -#[cfg_attr(feature = "stm32h7a3zg", path = "stm32h7a3zg.rs")] -#[cfg_attr(feature = "stm32h7a3zi", path = "stm32h7a3zi.rs")] -#[cfg_attr(feature = "stm32h7b0ab", path = "stm32h7b0ab.rs")] -#[cfg_attr(feature = "stm32h7b0ib", path = "stm32h7b0ib.rs")] -#[cfg_attr(feature = "stm32h7b0rb", path = "stm32h7b0rb.rs")] -#[cfg_attr(feature = "stm32h7b0vb", path = "stm32h7b0vb.rs")] -#[cfg_attr(feature = "stm32h7b0zb", path = "stm32h7b0zb.rs")] -#[cfg_attr(feature = "stm32h7b3ai", path = "stm32h7b3ai.rs")] -#[cfg_attr(feature = "stm32h7b3ii", path = "stm32h7b3ii.rs")] -#[cfg_attr(feature = "stm32h7b3li", path = "stm32h7b3li.rs")] -#[cfg_attr(feature = "stm32h7b3ni", path = "stm32h7b3ni.rs")] -#[cfg_attr(feature = "stm32h7b3qi", path = "stm32h7b3qi.rs")] -#[cfg_attr(feature = "stm32h7b3ri", path = "stm32h7b3ri.rs")] -#[cfg_attr(feature = "stm32h7b3vi", path = "stm32h7b3vi.rs")] -#[cfg_attr(feature = "stm32h7b3zi", path = "stm32h7b3zi.rs")] -#[cfg_attr(feature = "stm32l010c6", path = "stm32l010c6.rs")] -#[cfg_attr(feature = "stm32l010f4", path = "stm32l010f4.rs")] -#[cfg_attr(feature = "stm32l010k4", path = "stm32l010k4.rs")] -#[cfg_attr(feature = "stm32l010k8", path = "stm32l010k8.rs")] -#[cfg_attr(feature = "stm32l010r8", path = "stm32l010r8.rs")] -#[cfg_attr(feature = "stm32l010rb", path = "stm32l010rb.rs")] -#[cfg_attr(feature = "stm32l011d3", path = "stm32l011d3.rs")] -#[cfg_attr(feature = "stm32l011d4", path = "stm32l011d4.rs")] -#[cfg_attr(feature = "stm32l011e3", path = "stm32l011e3.rs")] -#[cfg_attr(feature = "stm32l011e4", path = "stm32l011e4.rs")] -#[cfg_attr(feature = "stm32l011f3", path = "stm32l011f3.rs")] -#[cfg_attr(feature = "stm32l011f4", path = "stm32l011f4.rs")] -#[cfg_attr(feature = "stm32l011g3", path = "stm32l011g3.rs")] -#[cfg_attr(feature = "stm32l011g4", path = "stm32l011g4.rs")] -#[cfg_attr(feature = "stm32l011k3", path = "stm32l011k3.rs")] -#[cfg_attr(feature = "stm32l011k4", path = "stm32l011k4.rs")] -#[cfg_attr(feature = "stm32l021d4", path = "stm32l021d4.rs")] -#[cfg_attr(feature = "stm32l021f4", path = "stm32l021f4.rs")] -#[cfg_attr(feature = "stm32l021g4", path = "stm32l021g4.rs")] -#[cfg_attr(feature = "stm32l021k4", path = "stm32l021k4.rs")] -#[cfg_attr(feature = "stm32l031c4", path = "stm32l031c4.rs")] -#[cfg_attr(feature = "stm32l031c6", path = "stm32l031c6.rs")] -#[cfg_attr(feature = "stm32l031e4", path = "stm32l031e4.rs")] -#[cfg_attr(feature = "stm32l031e6", path = "stm32l031e6.rs")] -#[cfg_attr(feature = "stm32l031f4", path = "stm32l031f4.rs")] -#[cfg_attr(feature = "stm32l031f6", path = "stm32l031f6.rs")] -#[cfg_attr(feature = "stm32l031g4", path = "stm32l031g4.rs")] -#[cfg_attr(feature = "stm32l031g6", path = "stm32l031g6.rs")] -#[cfg_attr(feature = "stm32l031k4", path = "stm32l031k4.rs")] -#[cfg_attr(feature = "stm32l031k6", path = "stm32l031k6.rs")] -#[cfg_attr(feature = "stm32l041c4", path = "stm32l041c4.rs")] -#[cfg_attr(feature = "stm32l041c6", path = "stm32l041c6.rs")] -#[cfg_attr(feature = "stm32l041e6", path = "stm32l041e6.rs")] -#[cfg_attr(feature = "stm32l041f6", path = "stm32l041f6.rs")] -#[cfg_attr(feature = "stm32l041g6", path = "stm32l041g6.rs")] -#[cfg_attr(feature = "stm32l041k6", path = "stm32l041k6.rs")] -#[cfg_attr(feature = "stm32l051c6", path = "stm32l051c6.rs")] -#[cfg_attr(feature = "stm32l051c8", path = "stm32l051c8.rs")] -#[cfg_attr(feature = "stm32l051k6", path = "stm32l051k6.rs")] -#[cfg_attr(feature = "stm32l051k8", path = "stm32l051k8.rs")] -#[cfg_attr(feature = "stm32l051r6", path = "stm32l051r6.rs")] -#[cfg_attr(feature = "stm32l051r8", path = "stm32l051r8.rs")] -#[cfg_attr(feature = "stm32l051t6", path = "stm32l051t6.rs")] -#[cfg_attr(feature = "stm32l051t8", path = "stm32l051t8.rs")] -#[cfg_attr(feature = "stm32l052c6", path = "stm32l052c6.rs")] -#[cfg_attr(feature = "stm32l052c8", path = "stm32l052c8.rs")] -#[cfg_attr(feature = "stm32l052k6", path = "stm32l052k6.rs")] -#[cfg_attr(feature = "stm32l052k8", path = "stm32l052k8.rs")] -#[cfg_attr(feature = "stm32l052r6", path = "stm32l052r6.rs")] -#[cfg_attr(feature = "stm32l052r8", path = "stm32l052r8.rs")] -#[cfg_attr(feature = "stm32l052t6", path = "stm32l052t6.rs")] -#[cfg_attr(feature = "stm32l052t8", path = "stm32l052t8.rs")] -#[cfg_attr(feature = "stm32l053c6", path = "stm32l053c6.rs")] -#[cfg_attr(feature = "stm32l053c8", path = "stm32l053c8.rs")] -#[cfg_attr(feature = "stm32l053r6", path = "stm32l053r6.rs")] -#[cfg_attr(feature = "stm32l053r8", path = "stm32l053r8.rs")] -#[cfg_attr(feature = "stm32l062c8", path = "stm32l062c8.rs")] -#[cfg_attr(feature = "stm32l062k8", path = "stm32l062k8.rs")] -#[cfg_attr(feature = "stm32l063c8", path = "stm32l063c8.rs")] -#[cfg_attr(feature = "stm32l063r8", path = "stm32l063r8.rs")] -#[cfg_attr(feature = "stm32l071c8", path = "stm32l071c8.rs")] -#[cfg_attr(feature = "stm32l071cb", path = "stm32l071cb.rs")] -#[cfg_attr(feature = "stm32l071cz", path = "stm32l071cz.rs")] -#[cfg_attr(feature = "stm32l071k8", path = "stm32l071k8.rs")] -#[cfg_attr(feature = "stm32l071kb", path = "stm32l071kb.rs")] -#[cfg_attr(feature = "stm32l071kz", path = "stm32l071kz.rs")] -#[cfg_attr(feature = "stm32l071rb", path = "stm32l071rb.rs")] -#[cfg_attr(feature = "stm32l071rz", path = "stm32l071rz.rs")] -#[cfg_attr(feature = "stm32l071v8", path = "stm32l071v8.rs")] -#[cfg_attr(feature = "stm32l071vb", path = "stm32l071vb.rs")] -#[cfg_attr(feature = "stm32l071vz", path = "stm32l071vz.rs")] -#[cfg_attr(feature = "stm32l072cb", path = "stm32l072cb.rs")] -#[cfg_attr(feature = "stm32l072cz", path = "stm32l072cz.rs")] -#[cfg_attr(feature = "stm32l072kb", path = "stm32l072kb.rs")] -#[cfg_attr(feature = "stm32l072kz", path = "stm32l072kz.rs")] -#[cfg_attr(feature = "stm32l072rb", path = "stm32l072rb.rs")] -#[cfg_attr(feature = "stm32l072rz", path = "stm32l072rz.rs")] -#[cfg_attr(feature = "stm32l072v8", path = "stm32l072v8.rs")] -#[cfg_attr(feature = "stm32l072vb", path = "stm32l072vb.rs")] -#[cfg_attr(feature = "stm32l072vz", path = "stm32l072vz.rs")] -#[cfg_attr(feature = "stm32l073cb", path = "stm32l073cb.rs")] -#[cfg_attr(feature = "stm32l073cz", path = "stm32l073cz.rs")] -#[cfg_attr(feature = "stm32l073rb", path = "stm32l073rb.rs")] -#[cfg_attr(feature = "stm32l073rz", path = "stm32l073rz.rs")] -#[cfg_attr(feature = "stm32l073v8", path = "stm32l073v8.rs")] -#[cfg_attr(feature = "stm32l073vb", path = "stm32l073vb.rs")] -#[cfg_attr(feature = "stm32l073vz", path = "stm32l073vz.rs")] -#[cfg_attr(feature = "stm32l081cb", path = "stm32l081cb.rs")] -#[cfg_attr(feature = "stm32l081cz", path = "stm32l081cz.rs")] -#[cfg_attr(feature = "stm32l081kz", path = "stm32l081kz.rs")] -#[cfg_attr(feature = "stm32l082cz", path = "stm32l082cz.rs")] -#[cfg_attr(feature = "stm32l082kb", path = "stm32l082kb.rs")] -#[cfg_attr(feature = "stm32l082kz", path = "stm32l082kz.rs")] -#[cfg_attr(feature = "stm32l083cb", path = "stm32l083cb.rs")] -#[cfg_attr(feature = "stm32l083cz", path = "stm32l083cz.rs")] -#[cfg_attr(feature = "stm32l083rb", path = "stm32l083rb.rs")] -#[cfg_attr(feature = "stm32l083rz", path = "stm32l083rz.rs")] -#[cfg_attr(feature = "stm32l083v8", path = "stm32l083v8.rs")] -#[cfg_attr(feature = "stm32l083vb", path = "stm32l083vb.rs")] -#[cfg_attr(feature = "stm32l083vz", path = "stm32l083vz.rs")] -#[cfg_attr(feature = "stm32l412c8", path = "stm32l412c8.rs")] -#[cfg_attr(feature = "stm32l412cb", path = "stm32l412cb.rs")] -#[cfg_attr(feature = "stm32l412k8", path = "stm32l412k8.rs")] -#[cfg_attr(feature = "stm32l412kb", path = "stm32l412kb.rs")] -#[cfg_attr(feature = "stm32l412r8", path = "stm32l412r8.rs")] -#[cfg_attr(feature = "stm32l412rb", path = "stm32l412rb.rs")] -#[cfg_attr(feature = "stm32l412t8", path = "stm32l412t8.rs")] -#[cfg_attr(feature = "stm32l412tb", path = "stm32l412tb.rs")] -#[cfg_attr(feature = "stm32l422cb", path = "stm32l422cb.rs")] -#[cfg_attr(feature = "stm32l422kb", path = "stm32l422kb.rs")] -#[cfg_attr(feature = "stm32l422rb", path = "stm32l422rb.rs")] -#[cfg_attr(feature = "stm32l422tb", path = "stm32l422tb.rs")] -#[cfg_attr(feature = "stm32l431cb", path = "stm32l431cb.rs")] -#[cfg_attr(feature = "stm32l431cc", path = "stm32l431cc.rs")] -#[cfg_attr(feature = "stm32l431kb", path = "stm32l431kb.rs")] -#[cfg_attr(feature = "stm32l431kc", path = "stm32l431kc.rs")] -#[cfg_attr(feature = "stm32l431rb", path = "stm32l431rb.rs")] -#[cfg_attr(feature = "stm32l431rc", path = "stm32l431rc.rs")] -#[cfg_attr(feature = "stm32l431vc", path = "stm32l431vc.rs")] -#[cfg_attr(feature = "stm32l432kb", path = "stm32l432kb.rs")] -#[cfg_attr(feature = "stm32l432kc", path = "stm32l432kc.rs")] -#[cfg_attr(feature = "stm32l433cb", path = "stm32l433cb.rs")] -#[cfg_attr(feature = "stm32l433cc", path = "stm32l433cc.rs")] -#[cfg_attr(feature = "stm32l433rb", path = "stm32l433rb.rs")] -#[cfg_attr(feature = "stm32l433rc", path = "stm32l433rc.rs")] -#[cfg_attr(feature = "stm32l433vc", path = "stm32l433vc.rs")] -#[cfg_attr(feature = "stm32l442kc", path = "stm32l442kc.rs")] -#[cfg_attr(feature = "stm32l443cc", path = "stm32l443cc.rs")] -#[cfg_attr(feature = "stm32l443rc", path = "stm32l443rc.rs")] -#[cfg_attr(feature = "stm32l443vc", path = "stm32l443vc.rs")] -#[cfg_attr(feature = "stm32l451cc", path = "stm32l451cc.rs")] -#[cfg_attr(feature = "stm32l451ce", path = "stm32l451ce.rs")] -#[cfg_attr(feature = "stm32l451rc", path = "stm32l451rc.rs")] -#[cfg_attr(feature = "stm32l451re", path = "stm32l451re.rs")] -#[cfg_attr(feature = "stm32l451vc", path = "stm32l451vc.rs")] -#[cfg_attr(feature = "stm32l451ve", path = "stm32l451ve.rs")] -#[cfg_attr(feature = "stm32l452cc", path = "stm32l452cc.rs")] -#[cfg_attr(feature = "stm32l452ce", path = "stm32l452ce.rs")] -#[cfg_attr(feature = "stm32l452rc", path = "stm32l452rc.rs")] -#[cfg_attr(feature = "stm32l452re", path = "stm32l452re.rs")] -#[cfg_attr(feature = "stm32l452vc", path = "stm32l452vc.rs")] -#[cfg_attr(feature = "stm32l452ve", path = "stm32l452ve.rs")] -#[cfg_attr(feature = "stm32l462ce", path = "stm32l462ce.rs")] -#[cfg_attr(feature = "stm32l462re", path = "stm32l462re.rs")] -#[cfg_attr(feature = "stm32l462ve", path = "stm32l462ve.rs")] -#[cfg_attr(feature = "stm32l471qe", path = "stm32l471qe.rs")] -#[cfg_attr(feature = "stm32l471qg", path = "stm32l471qg.rs")] -#[cfg_attr(feature = "stm32l471re", path = "stm32l471re.rs")] -#[cfg_attr(feature = "stm32l471rg", path = "stm32l471rg.rs")] -#[cfg_attr(feature = "stm32l471ve", path = "stm32l471ve.rs")] -#[cfg_attr(feature = "stm32l471vg", path = "stm32l471vg.rs")] -#[cfg_attr(feature = "stm32l471ze", path = "stm32l471ze.rs")] -#[cfg_attr(feature = "stm32l471zg", path = "stm32l471zg.rs")] -#[cfg_attr(feature = "stm32l475rc", path = "stm32l475rc.rs")] -#[cfg_attr(feature = "stm32l475re", path = "stm32l475re.rs")] -#[cfg_attr(feature = "stm32l475rg", path = "stm32l475rg.rs")] -#[cfg_attr(feature = "stm32l475vc", path = "stm32l475vc.rs")] -#[cfg_attr(feature = "stm32l475ve", path = "stm32l475ve.rs")] -#[cfg_attr(feature = "stm32l475vg", path = "stm32l475vg.rs")] -#[cfg_attr(feature = "stm32l476je", path = "stm32l476je.rs")] -#[cfg_attr(feature = "stm32l476jg", path = "stm32l476jg.rs")] -#[cfg_attr(feature = "stm32l476me", path = "stm32l476me.rs")] -#[cfg_attr(feature = "stm32l476mg", path = "stm32l476mg.rs")] -#[cfg_attr(feature = "stm32l476qe", path = "stm32l476qe.rs")] -#[cfg_attr(feature = "stm32l476qg", path = "stm32l476qg.rs")] -#[cfg_attr(feature = "stm32l476rc", path = "stm32l476rc.rs")] -#[cfg_attr(feature = "stm32l476re", path = "stm32l476re.rs")] -#[cfg_attr(feature = "stm32l476rg", path = "stm32l476rg.rs")] -#[cfg_attr(feature = "stm32l476vc", path = "stm32l476vc.rs")] -#[cfg_attr(feature = "stm32l476ve", path = "stm32l476ve.rs")] -#[cfg_attr(feature = "stm32l476vg", path = "stm32l476vg.rs")] -#[cfg_attr(feature = "stm32l476ze", path = "stm32l476ze.rs")] -#[cfg_attr(feature = "stm32l476zg", path = "stm32l476zg.rs")] -#[cfg_attr(feature = "stm32l485jc", path = "stm32l485jc.rs")] -#[cfg_attr(feature = "stm32l485je", path = "stm32l485je.rs")] -#[cfg_attr(feature = "stm32l486jg", path = "stm32l486jg.rs")] -#[cfg_attr(feature = "stm32l486qg", path = "stm32l486qg.rs")] -#[cfg_attr(feature = "stm32l486rg", path = "stm32l486rg.rs")] -#[cfg_attr(feature = "stm32l486vg", path = "stm32l486vg.rs")] -#[cfg_attr(feature = "stm32l486zg", path = "stm32l486zg.rs")] -#[cfg_attr(feature = "stm32l496ae", path = "stm32l496ae.rs")] -#[cfg_attr(feature = "stm32l496ag", path = "stm32l496ag.rs")] -#[cfg_attr(feature = "stm32l496qe", path = "stm32l496qe.rs")] -#[cfg_attr(feature = "stm32l496qg", path = "stm32l496qg.rs")] -#[cfg_attr(feature = "stm32l496re", path = "stm32l496re.rs")] -#[cfg_attr(feature = "stm32l496rg", path = "stm32l496rg.rs")] -#[cfg_attr(feature = "stm32l496ve", path = "stm32l496ve.rs")] -#[cfg_attr(feature = "stm32l496vg", path = "stm32l496vg.rs")] -#[cfg_attr(feature = "stm32l496wg", path = "stm32l496wg.rs")] -#[cfg_attr(feature = "stm32l496ze", path = "stm32l496ze.rs")] -#[cfg_attr(feature = "stm32l496zg", path = "stm32l496zg.rs")] -#[cfg_attr(feature = "stm32l4a6ag", path = "stm32l4a6ag.rs")] -#[cfg_attr(feature = "stm32l4a6qg", path = "stm32l4a6qg.rs")] -#[cfg_attr(feature = "stm32l4a6rg", path = "stm32l4a6rg.rs")] -#[cfg_attr(feature = "stm32l4a6vg", path = "stm32l4a6vg.rs")] -#[cfg_attr(feature = "stm32l4a6zg", path = "stm32l4a6zg.rs")] -#[cfg_attr(feature = "stm32l4p5ae", path = "stm32l4p5ae.rs")] -#[cfg_attr(feature = "stm32l4p5ag", path = "stm32l4p5ag.rs")] -#[cfg_attr(feature = "stm32l4p5ce", path = "stm32l4p5ce.rs")] -#[cfg_attr(feature = "stm32l4p5cg", path = "stm32l4p5cg.rs")] -#[cfg_attr(feature = "stm32l4p5qe", path = "stm32l4p5qe.rs")] -#[cfg_attr(feature = "stm32l4p5qg", path = "stm32l4p5qg.rs")] -#[cfg_attr(feature = "stm32l4p5re", path = "stm32l4p5re.rs")] -#[cfg_attr(feature = "stm32l4p5rg", path = "stm32l4p5rg.rs")] -#[cfg_attr(feature = "stm32l4p5ve", path = "stm32l4p5ve.rs")] -#[cfg_attr(feature = "stm32l4p5vg", path = "stm32l4p5vg.rs")] -#[cfg_attr(feature = "stm32l4p5ze", path = "stm32l4p5ze.rs")] -#[cfg_attr(feature = "stm32l4p5zg", path = "stm32l4p5zg.rs")] -#[cfg_attr(feature = "stm32l4q5ag", path = "stm32l4q5ag.rs")] -#[cfg_attr(feature = "stm32l4q5cg", path = "stm32l4q5cg.rs")] -#[cfg_attr(feature = "stm32l4q5qg", path = "stm32l4q5qg.rs")] -#[cfg_attr(feature = "stm32l4q5rg", path = "stm32l4q5rg.rs")] -#[cfg_attr(feature = "stm32l4q5vg", path = "stm32l4q5vg.rs")] -#[cfg_attr(feature = "stm32l4q5zg", path = "stm32l4q5zg.rs")] -#[cfg_attr(feature = "stm32l4r5ag", path = "stm32l4r5ag.rs")] -#[cfg_attr(feature = "stm32l4r5ai", path = "stm32l4r5ai.rs")] -#[cfg_attr(feature = "stm32l4r5qg", path = "stm32l4r5qg.rs")] -#[cfg_attr(feature = "stm32l4r5qi", path = "stm32l4r5qi.rs")] -#[cfg_attr(feature = "stm32l4r5vg", path = "stm32l4r5vg.rs")] -#[cfg_attr(feature = "stm32l4r5vi", path = "stm32l4r5vi.rs")] -#[cfg_attr(feature = "stm32l4r5zg", path = "stm32l4r5zg.rs")] -#[cfg_attr(feature = "stm32l4r5zi", path = "stm32l4r5zi.rs")] -#[cfg_attr(feature = "stm32l4r7ai", path = "stm32l4r7ai.rs")] -#[cfg_attr(feature = "stm32l4r7vi", path = "stm32l4r7vi.rs")] -#[cfg_attr(feature = "stm32l4r7zi", path = "stm32l4r7zi.rs")] -#[cfg_attr(feature = "stm32l4r9ag", path = "stm32l4r9ag.rs")] -#[cfg_attr(feature = "stm32l4r9ai", path = "stm32l4r9ai.rs")] -#[cfg_attr(feature = "stm32l4r9vg", path = "stm32l4r9vg.rs")] -#[cfg_attr(feature = "stm32l4r9vi", path = "stm32l4r9vi.rs")] -#[cfg_attr(feature = "stm32l4r9zg", path = "stm32l4r9zg.rs")] -#[cfg_attr(feature = "stm32l4r9zi", path = "stm32l4r9zi.rs")] -#[cfg_attr(feature = "stm32l4s5ai", path = "stm32l4s5ai.rs")] -#[cfg_attr(feature = "stm32l4s5qi", path = "stm32l4s5qi.rs")] -#[cfg_attr(feature = "stm32l4s5vi", path = "stm32l4s5vi.rs")] -#[cfg_attr(feature = "stm32l4s5zi", path = "stm32l4s5zi.rs")] -#[cfg_attr(feature = "stm32l4s7ai", path = "stm32l4s7ai.rs")] -#[cfg_attr(feature = "stm32l4s7vi", path = "stm32l4s7vi.rs")] -#[cfg_attr(feature = "stm32l4s7zi", path = "stm32l4s7zi.rs")] -#[cfg_attr(feature = "stm32l4s9ai", path = "stm32l4s9ai.rs")] -#[cfg_attr(feature = "stm32l4s9vi", path = "stm32l4s9vi.rs")] -#[cfg_attr(feature = "stm32l4s9zi", path = "stm32l4s9zi.rs")] -mod chip; -pub use chip::*; -#[allow(dead_code, unused_imports)] -pub mod regs; diff --git a/embassy-stm32/src/pac/regs.rs b/embassy-stm32/src/pac/regs.rs deleted file mode 100644 index 3a3f5887..00000000 --- a/embassy-stm32/src/pac/regs.rs +++ /dev/null @@ -1,26994 +0,0 @@ -#![no_std] -#![doc = "Peripheral access API (generated using svd2rust v0.17.0 (22741fa 2021-04-20))"] -pub mod usart_v1 { - use crate::generic::*; - #[doc = "Universal synchronous asynchronous receiver transmitter"] - #[derive(Copy, Clone)] - pub struct Usart(pub *mut u8); - unsafe impl Send for Usart {} - unsafe impl Sync for Usart {} - impl Usart { - #[doc = "Status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Baud rate register"] - pub fn brr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Control register 3"] - pub fn cr3(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Guard time and prescaler register"] - pub fn gtpr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - } - #[doc = "Universal asynchronous receiver transmitter"] - #[derive(Copy, Clone)] - pub struct Uart(pub *mut u8); - unsafe impl Send for Uart {} - unsafe impl Sync for Uart {} - impl Uart { - #[doc = "Status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Baud rate register"] - pub fn brr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Control register 3"] - pub fn cr3(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sbk(pub u8); - impl Sbk { - #[doc = "No break character is transmitted"] - pub const NOBREAK: Self = Self(0); - #[doc = "Break character transmitted"] - pub const BREAK: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpha(pub u8); - impl Cpha { - #[doc = "The first clock transition is the first data capture edge"] - pub const FIRST: Self = Self(0); - #[doc = "The second clock transition is the first data capture edge"] - pub const SECOND: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rwu(pub u8); - impl Rwu { - #[doc = "Receiver in active mode"] - pub const ACTIVE: Self = Self(0); - #[doc = "Receiver in mute mode"] - pub const MUTE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Irlp(pub u8); - impl Irlp { - #[doc = "Normal mode"] - pub const NORMAL: Self = Self(0); - #[doc = "Low-power mode"] - pub const LOWPOWER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ps(pub u8); - impl Ps { - #[doc = "Even parity"] - pub const EVEN: Self = Self(0); - #[doc = "Odd parity"] - pub const ODD: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct M(pub u8); - impl M { - #[doc = "8 data bits"] - pub const M8: Self = Self(0); - #[doc = "9 data bits"] - pub const M9: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Stop(pub u8); - impl Stop { - #[doc = "1 stop bit"] - pub const STOP1: Self = Self(0); - #[doc = "0.5 stop bits"] - pub const STOP0P5: Self = Self(0x01); - #[doc = "2 stop bits"] - pub const STOP2: Self = Self(0x02); - #[doc = "1.5 stop bits"] - pub const STOP1P5: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Wake(pub u8); - impl Wake { - #[doc = "USART wakeup on idle line"] - pub const IDLELINE: Self = Self(0); - #[doc = "USART wakeup on address mark"] - pub const ADDRESSMARK: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hdsel(pub u8); - impl Hdsel { - #[doc = "Half duplex mode is not selected"] - pub const FULLDUPLEX: Self = Self(0); - #[doc = "Half duplex mode is selected"] - pub const HALFDUPLEX: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lbdl(pub u8); - impl Lbdl { - #[doc = "10-bit break detection"] - pub const LBDL10: Self = Self(0); - #[doc = "11-bit break detection"] - pub const LBDL11: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpol(pub u8); - impl Cpol { - #[doc = "Steady low value on CK pin outside transmission window"] - pub const LOW: Self = Self(0); - #[doc = "Steady high value on CK pin outside transmission window"] - pub const HIGH: Self = Self(0x01); - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Send break"] - pub const fn sbk(&self) -> super::vals::Sbk { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Sbk(val as u8) - } - #[doc = "Send break"] - pub fn set_sbk(&mut self, val: super::vals::Sbk) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Receiver wakeup"] - pub const fn rwu(&self) -> super::vals::Rwu { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Rwu(val as u8) - } - #[doc = "Receiver wakeup"] - pub fn set_rwu(&mut self, val: super::vals::Rwu) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Receiver enable"] - pub const fn re(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Receiver enable"] - pub fn set_re(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Transmitter enable"] - pub const fn te(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Transmitter enable"] - pub fn set_te(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "IDLE interrupt enable"] - pub const fn idleie(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IDLE interrupt enable"] - pub fn set_idleie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "RXNE interrupt enable"] - pub const fn rxneie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "RXNE interrupt enable"] - pub fn set_rxneie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transmission complete interrupt enable"] - pub const fn tcie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transmission complete interrupt enable"] - pub fn set_tcie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "TXE interrupt enable"] - pub const fn txeie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "TXE interrupt enable"] - pub fn set_txeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "PE interrupt enable"] - pub const fn peie(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "PE interrupt enable"] - pub fn set_peie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Parity selection"] - pub const fn ps(&self) -> super::vals::Ps { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Ps(val as u8) - } - #[doc = "Parity selection"] - pub fn set_ps(&mut self, val: super::vals::Ps) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Parity control enable"] - pub const fn pce(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Parity control enable"] - pub fn set_pce(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Wakeup method"] - pub const fn wake(&self) -> super::vals::Wake { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Wake(val as u8) - } - #[doc = "Wakeup method"] - pub fn set_wake(&mut self, val: super::vals::Wake) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "Word length"] - pub const fn m(&self) -> super::vals::M { - let val = (self.0 >> 12usize) & 0x01; - super::vals::M(val as u8) - } - #[doc = "Word length"] - pub fn set_m(&mut self, val: super::vals::M) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "USART enable"] - pub const fn ue(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "USART enable"] - pub fn set_ue(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - #[doc = "Guard time and prescaler register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Gtpr(pub u32); - impl Gtpr { - #[doc = "Prescaler value"] - pub const fn psc(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Prescaler value"] - pub fn set_psc(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "Guard time value"] - pub const fn gt(&self) -> u8 { - let val = (self.0 >> 8usize) & 0xff; - val as u8 - } - #[doc = "Guard time value"] - pub fn set_gt(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); - } - } - impl Default for Gtpr { - fn default() -> Gtpr { - Gtpr(0) - } - } - #[doc = "Status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Parity error"] - pub const fn pe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Parity error"] - pub fn set_pe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Framing error"] - pub const fn fe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Framing error"] - pub fn set_fe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Noise error flag"] - pub const fn ne(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Noise error flag"] - pub fn set_ne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Overrun error"] - pub const fn ore(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Overrun error"] - pub fn set_ore(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "IDLE line detected"] - pub const fn idle(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IDLE line detected"] - pub fn set_idle(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Read data register not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Read data register not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transmission complete"] - pub const fn tc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transmission complete"] - pub fn set_tc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Transmit data register empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Transmit data register empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "LIN break detection flag"] - pub const fn lbd(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection flag"] - pub fn set_lbd(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "Control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2Usart(pub u32); - impl Cr2Usart { - #[doc = "Address of the USART node"] - pub const fn add(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "Address of the USART node"] - pub fn set_add(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "lin break detection length"] - pub const fn lbdl(&self) -> super::vals::Lbdl { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lbdl(val as u8) - } - #[doc = "lin break detection length"] - pub fn set_lbdl(&mut self, val: super::vals::Lbdl) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "LIN break detection interrupt enable"] - pub const fn lbdie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection interrupt enable"] - pub fn set_lbdie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Last bit clock pulse"] - pub const fn lbcl(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Last bit clock pulse"] - pub fn set_lbcl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Clock phase"] - pub const fn cpha(&self) -> super::vals::Cpha { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Cpha(val as u8) - } - #[doc = "Clock phase"] - pub fn set_cpha(&mut self, val: super::vals::Cpha) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Clock polarity"] - pub const fn cpol(&self) -> super::vals::Cpol { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Cpol(val as u8) - } - #[doc = "Clock polarity"] - pub fn set_cpol(&mut self, val: super::vals::Cpol) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Clock enable"] - pub const fn clken(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Clock enable"] - pub fn set_clken(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "STOP bits"] - pub const fn stop(&self) -> super::vals::Stop { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Stop(val as u8) - } - #[doc = "STOP bits"] - pub fn set_stop(&mut self, val: super::vals::Stop) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "LIN mode enable"] - pub const fn linen(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "LIN mode enable"] - pub fn set_linen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for Cr2Usart { - fn default() -> Cr2Usart { - Cr2Usart(0) - } - } - #[doc = "Status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct SrUsart(pub u32); - impl SrUsart { - #[doc = "Parity error"] - pub const fn pe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Parity error"] - pub fn set_pe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Framing error"] - pub const fn fe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Framing error"] - pub fn set_fe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Noise error flag"] - pub const fn ne(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Noise error flag"] - pub fn set_ne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Overrun error"] - pub const fn ore(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Overrun error"] - pub fn set_ore(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "IDLE line detected"] - pub const fn idle(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IDLE line detected"] - pub fn set_idle(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Read data register not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Read data register not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transmission complete"] - pub const fn tc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transmission complete"] - pub fn set_tc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Transmit data register empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Transmit data register empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "LIN break detection flag"] - pub const fn lbd(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection flag"] - pub fn set_lbd(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "CTS flag"] - pub const fn cts(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "CTS flag"] - pub fn set_cts(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - } - impl Default for SrUsart { - fn default() -> SrUsart { - SrUsart(0) - } - } - #[doc = "Data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dr(pub u32); - impl Dr { - #[doc = "Data value"] - pub const fn dr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x01ff; - val as u16 - } - #[doc = "Data value"] - pub fn set_dr(&mut self, val: u16) { - self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); - } - } - impl Default for Dr { - fn default() -> Dr { - Dr(0) - } - } - #[doc = "Baud rate register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Brr(pub u32); - impl Brr { - #[doc = "fraction of USARTDIV"] - pub const fn div_fraction(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "fraction of USARTDIV"] - pub fn set_div_fraction(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "mantissa of USARTDIV"] - pub const fn div_mantissa(&self) -> u16 { - let val = (self.0 >> 4usize) & 0x0fff; - val as u16 - } - #[doc = "mantissa of USARTDIV"] - pub fn set_div_mantissa(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 4usize)) | (((val as u32) & 0x0fff) << 4usize); - } - } - impl Default for Brr { - fn default() -> Brr { - Brr(0) - } - } - #[doc = "Control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Address of the USART node"] - pub const fn add(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "Address of the USART node"] - pub fn set_add(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "lin break detection length"] - pub const fn lbdl(&self) -> super::vals::Lbdl { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lbdl(val as u8) - } - #[doc = "lin break detection length"] - pub fn set_lbdl(&mut self, val: super::vals::Lbdl) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "LIN break detection interrupt enable"] - pub const fn lbdie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection interrupt enable"] - pub fn set_lbdie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "STOP bits"] - pub const fn stop(&self) -> super::vals::Stop { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Stop(val as u8) - } - #[doc = "STOP bits"] - pub fn set_stop(&mut self, val: super::vals::Stop) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "LIN mode enable"] - pub const fn linen(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "LIN mode enable"] - pub fn set_linen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "Control register 3"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr3(pub u32); - impl Cr3 { - #[doc = "Error interrupt enable"] - pub const fn eie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_eie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "IrDA mode enable"] - pub const fn iren(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "IrDA mode enable"] - pub fn set_iren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "IrDA low-power"] - pub const fn irlp(&self) -> super::vals::Irlp { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Irlp(val as u8) - } - #[doc = "IrDA low-power"] - pub fn set_irlp(&mut self, val: super::vals::Irlp) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Half-duplex selection"] - pub const fn hdsel(&self) -> super::vals::Hdsel { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Hdsel(val as u8) - } - #[doc = "Half-duplex selection"] - pub fn set_hdsel(&mut self, val: super::vals::Hdsel) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "DMA enable receiver"] - pub const fn dmar(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "DMA enable receiver"] - pub fn set_dmar(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "DMA enable transmitter"] - pub const fn dmat(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "DMA enable transmitter"] - pub fn set_dmat(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for Cr3 { - fn default() -> Cr3 { - Cr3(0) - } - } - #[doc = "Control register 3"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr3Usart(pub u32); - impl Cr3Usart { - #[doc = "Error interrupt enable"] - pub const fn eie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_eie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "IrDA mode enable"] - pub const fn iren(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "IrDA mode enable"] - pub fn set_iren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "IrDA low-power"] - pub const fn irlp(&self) -> super::vals::Irlp { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Irlp(val as u8) - } - #[doc = "IrDA low-power"] - pub fn set_irlp(&mut self, val: super::vals::Irlp) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Half-duplex selection"] - pub const fn hdsel(&self) -> super::vals::Hdsel { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Hdsel(val as u8) - } - #[doc = "Half-duplex selection"] - pub fn set_hdsel(&mut self, val: super::vals::Hdsel) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Smartcard NACK enable"] - pub const fn nack(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Smartcard NACK enable"] - pub fn set_nack(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Smartcard mode enable"] - pub const fn scen(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Smartcard mode enable"] - pub fn set_scen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "DMA enable receiver"] - pub const fn dmar(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "DMA enable receiver"] - pub fn set_dmar(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "DMA enable transmitter"] - pub const fn dmat(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "DMA enable transmitter"] - pub fn set_dmat(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "RTS enable"] - pub const fn rtse(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "RTS enable"] - pub fn set_rtse(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "CTS enable"] - pub const fn ctse(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "CTS enable"] - pub fn set_ctse(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "CTS interrupt enable"] - pub const fn ctsie(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "CTS interrupt enable"] - pub fn set_ctsie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - } - impl Default for Cr3Usart { - fn default() -> Cr3Usart { - Cr3Usart(0) - } - } - } -} -pub mod exti_v1 { - use crate::generic::*; - #[doc = "External interrupt/event controller"] - #[derive(Copy, Clone)] - pub struct Exti(pub *mut u8); - unsafe impl Send for Exti {} - unsafe impl Sync for Exti {} - impl Exti { - #[doc = "Interrupt mask register (EXTI_IMR)"] - pub fn imr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Event mask register (EXTI_EMR)"] - pub fn emr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Rising Trigger selection register (EXTI_RTSR)"] - pub fn rtsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Falling Trigger selection register (EXTI_FTSR)"] - pub fn ftsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Software interrupt event register (EXTI_SWIER)"] - pub fn swier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Pending register (EXTI_PR)"] - pub fn pr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Rising Trigger selection register (EXTI_RTSR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rtsr(pub u32); - impl Rtsr { - #[doc = "Rising trigger event configuration of line 0"] - pub fn tr(&self, n: usize) -> super::vals::Tr { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Tr(val as u8) - } - #[doc = "Rising trigger event configuration of line 0"] - pub fn set_tr(&mut self, n: usize, val: super::vals::Tr) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Rtsr { - fn default() -> Rtsr { - Rtsr(0) - } - } - #[doc = "Software interrupt event register (EXTI_SWIER)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Swier(pub u32); - impl Swier { - #[doc = "Software Interrupt on line 0"] - pub fn swier(&self, n: usize) -> bool { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Software Interrupt on line 0"] - pub fn set_swier(&mut self, n: usize, val: bool) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Swier { - fn default() -> Swier { - Swier(0) - } - } - #[doc = "Interrupt mask register (EXTI_IMR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Imr(pub u32); - impl Imr { - #[doc = "Interrupt Mask on line 0"] - pub fn mr(&self, n: usize) -> super::vals::Mr { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Mr(val as u8) - } - #[doc = "Interrupt Mask on line 0"] - pub fn set_mr(&mut self, n: usize, val: super::vals::Mr) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Imr { - fn default() -> Imr { - Imr(0) - } - } - #[doc = "Pending register (EXTI_PR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pr(pub u32); - impl Pr { - #[doc = "Pending bit 0"] - pub fn pr(&self, n: usize) -> bool { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Pending bit 0"] - pub fn set_pr(&mut self, n: usize, val: bool) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Pr { - fn default() -> Pr { - Pr(0) - } - } - #[doc = "Event mask register (EXTI_EMR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Emr(pub u32); - impl Emr { - #[doc = "Event Mask on line 0"] - pub fn mr(&self, n: usize) -> super::vals::Mr { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Mr(val as u8) - } - #[doc = "Event Mask on line 0"] - pub fn set_mr(&mut self, n: usize, val: super::vals::Mr) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Emr { - fn default() -> Emr { - Emr(0) - } - } - #[doc = "Falling Trigger selection register (EXTI_FTSR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ftsr(pub u32); - impl Ftsr { - #[doc = "Falling trigger event configuration of line 0"] - pub fn tr(&self, n: usize) -> super::vals::Tr { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Tr(val as u8) - } - #[doc = "Falling trigger event configuration of line 0"] - pub fn set_tr(&mut self, n: usize, val: super::vals::Tr) { - assert!(n < 23usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Ftsr { - fn default() -> Ftsr { - Ftsr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Tr(pub u8); - impl Tr { - #[doc = "Falling edge trigger is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Falling edge trigger is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mr(pub u8); - impl Mr { - #[doc = "Interrupt request line is masked"] - pub const MASKED: Self = Self(0); - #[doc = "Interrupt request line is unmasked"] - pub const UNMASKED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Prr(pub u8); - impl Prr { - #[doc = "No trigger request occurred"] - pub const NOTPENDING: Self = Self(0); - #[doc = "Selected trigger request occurred"] - pub const PENDING: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Swierw(pub u8); - impl Swierw { - #[doc = "Generates an interrupt request"] - pub const PEND: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Prw(pub u8); - impl Prw { - #[doc = "Clears pending bit"] - pub const CLEAR: Self = Self(0x01); - } - } -} -pub mod gpio_v1 { - use crate::generic::*; - #[doc = "General purpose I/O"] - #[derive(Copy, Clone)] - pub struct Gpio(pub *mut u8); - unsafe impl Send for Gpio {} - unsafe impl Sync for Gpio {} - impl Gpio { - #[doc = "Port configuration register low (GPIOn_CRL)"] - pub fn cr(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(0usize + n * 4usize)) } - } - #[doc = "Port input data register (GPIOn_IDR)"] - pub fn idr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Port output data register (GPIOn_ODR)"] - pub fn odr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Port bit set/reset register (GPIOn_BSRR)"] - pub fn bsrr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Port bit reset register (GPIOn_BRR)"] - pub fn brr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Port configuration lock register"] - pub fn lckr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Port bit set/reset register (GPIOn_BSRR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Bsrr(pub u32); - impl Bsrr { - #[doc = "Set bit"] - pub fn bs(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Set bit"] - pub fn set_bs(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Reset bit"] - pub fn br(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 16usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Reset bit"] - pub fn set_br(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 16usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Bsrr { - fn default() -> Bsrr { - Bsrr(0) - } - } - #[doc = "Port configuration lock register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Lckr(pub u32); - impl Lckr { - #[doc = "Port A Lock bit"] - pub fn lck(&self, n: usize) -> super::vals::Lck { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Lck(val as u8) - } - #[doc = "Port A Lock bit"] - pub fn set_lck(&mut self, n: usize, val: super::vals::Lck) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "Lock key"] - pub const fn lckk(&self) -> super::vals::Lckk { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Lckk(val as u8) - } - #[doc = "Lock key"] - pub fn set_lckk(&mut self, val: super::vals::Lckk) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - } - impl Default for Lckr { - fn default() -> Lckr { - Lckr(0) - } - } - #[doc = "Port configuration register (GPIOn_CRx)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Port n mode bits"] - pub fn mode(&self, n: usize) -> super::vals::Mode { - assert!(n < 8usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Mode(val as u8) - } - #[doc = "Port n mode bits"] - pub fn set_mode(&mut self, n: usize, val: super::vals::Mode) { - assert!(n < 8usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - #[doc = "Port n configuration bits"] - pub fn cnf(&self, n: usize) -> super::vals::Cnf { - assert!(n < 8usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Cnf(val as u8) - } - #[doc = "Port n configuration bits"] - pub fn set_cnf(&mut self, n: usize, val: super::vals::Cnf) { - assert!(n < 8usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - #[doc = "Port bit reset register (GPIOn_BRR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Brr(pub u32); - impl Brr { - #[doc = "Reset bit"] - pub fn br(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Reset bit"] - pub fn set_br(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Brr { - fn default() -> Brr { - Brr(0) - } - } - #[doc = "Port output data register (GPIOn_ODR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Odr(pub u32); - impl Odr { - #[doc = "Port output data"] - pub fn odr(&self, n: usize) -> super::vals::Odr { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Odr(val as u8) - } - #[doc = "Port output data"] - pub fn set_odr(&mut self, n: usize, val: super::vals::Odr) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Odr { - fn default() -> Odr { - Odr(0) - } - } - #[doc = "Port input data register (GPIOn_IDR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idr(pub u32); - impl Idr { - #[doc = "Port input data"] - pub fn idr(&self, n: usize) -> super::vals::Idr { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Idr(val as u8) - } - #[doc = "Port input data"] - pub fn set_idr(&mut self, n: usize, val: super::vals::Idr) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Idr { - fn default() -> Idr { - Idr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Idr(pub u8); - impl Idr { - #[doc = "Input is logic low"] - pub const LOW: Self = Self(0); - #[doc = "Input is logic high"] - pub const HIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lck(pub u8); - impl Lck { - #[doc = "Port configuration not locked"] - pub const UNLOCKED: Self = Self(0); - #[doc = "Port configuration locked"] - pub const LOCKED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Odr(pub u8); - impl Odr { - #[doc = "Set output to logic low"] - pub const LOW: Self = Self(0); - #[doc = "Set output to logic high"] - pub const HIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cnf(pub u8); - impl Cnf { - #[doc = "Analog mode / Push-Pull mode"] - pub const PUSHPULL: Self = Self(0); - #[doc = "Floating input (reset state) / Open Drain-Mode"] - pub const OPENDRAIN: Self = Self(0x01); - #[doc = "Input with pull-up/pull-down / Alternate Function Push-Pull Mode"] - pub const ALTPUSHPULL: Self = Self(0x02); - #[doc = "Alternate Function Open-Drain Mode"] - pub const ALTOPENDRAIN: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bsw(pub u8); - impl Bsw { - #[doc = "No action on the corresponding ODx bit"] - pub const NOACTION: Self = Self(0); - #[doc = "Sets the corresponding ODRx bit"] - pub const SET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lckk(pub u8); - impl Lckk { - #[doc = "Port configuration lock key not active"] - pub const NOTACTIVE: Self = Self(0); - #[doc = "Port configuration lock key active"] - pub const ACTIVE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Brw(pub u8); - impl Brw { - #[doc = "No action on the corresponding ODx bit"] - pub const NOACTION: Self = Self(0); - #[doc = "Reset the ODx bit"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mode(pub u8); - impl Mode { - #[doc = "Input mode (reset state)"] - pub const INPUT: Self = Self(0); - #[doc = "Output mode 10 MHz"] - pub const OUTPUT: Self = Self(0x01); - #[doc = "Output mode 2 MHz"] - pub const OUTPUT2: Self = Self(0x02); - #[doc = "Output mode 50 MHz"] - pub const OUTPUT50: Self = Self(0x03); - } - } -} -pub mod usart_v2 { - use crate::generic::*; - #[doc = "Universal synchronous asynchronous receiver transmitter"] - #[derive(Copy, Clone)] - pub struct Usart(pub *mut u8); - unsafe impl Send for Usart {} - unsafe impl Sync for Usart {} - impl Usart { - #[doc = "Control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Control register 3"] - pub fn cr3(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Baud rate register"] - pub fn brr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Guard time and prescaler register"] - pub fn gtpr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Receiver timeout register"] - pub fn rtor(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Request register"] - pub fn rqr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "Interrupt & status register"] - pub fn isr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "Interrupt flag clear register"] - pub fn icr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "Receive data register"] - pub fn rdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "Transmit data register"] - pub fn tdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Interrupt & status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ixr(pub u32); - impl Ixr { - #[doc = "Parity error"] - pub const fn pe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Parity error"] - pub fn set_pe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Framing error"] - pub const fn fe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Framing error"] - pub fn set_fe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Noise detected flag"] - pub const fn nf(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Noise detected flag"] - pub fn set_nf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Overrun error"] - pub const fn ore(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Overrun error"] - pub fn set_ore(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Idle line detected"] - pub const fn idle(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Idle line detected"] - pub fn set_idle(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Read data register not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Read data register not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transmission complete"] - pub const fn tc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transmission complete"] - pub fn set_tc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Transmit data register empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Transmit data register empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "LIN break detection flag"] - pub const fn lbdf(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection flag"] - pub fn set_lbdf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "CTS interrupt flag"] - pub const fn ctsif(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "CTS interrupt flag"] - pub fn set_ctsif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "CTS flag"] - pub const fn cts(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "CTS flag"] - pub fn set_cts(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Receiver timeout"] - pub const fn rtof(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Receiver timeout"] - pub fn set_rtof(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "End of block flag"] - pub const fn eobf(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "End of block flag"] - pub fn set_eobf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Auto baud rate error"] - pub const fn abre(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Auto baud rate error"] - pub fn set_abre(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Auto baud rate flag"] - pub const fn abrf(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Auto baud rate flag"] - pub fn set_abrf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "Busy flag"] - pub const fn busy(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Busy flag"] - pub fn set_busy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "character match flag"] - pub const fn cmf(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "character match flag"] - pub fn set_cmf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Send break flag"] - pub const fn sbkf(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Send break flag"] - pub fn set_sbkf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Receiver wakeup from Mute mode"] - pub const fn rwu(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Receiver wakeup from Mute mode"] - pub fn set_rwu(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "Wakeup from Stop mode flag"] - pub const fn wuf(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "Wakeup from Stop mode flag"] - pub fn set_wuf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "Transmit enable acknowledge flag"] - pub const fn teack(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "Transmit enable acknowledge flag"] - pub fn set_teack(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "Receive enable acknowledge flag"] - pub const fn reack(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Receive enable acknowledge flag"] - pub fn set_reack(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - } - impl Default for Ixr { - fn default() -> Ixr { - Ixr(0) - } - } - #[doc = "Control register 3"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr3(pub u32); - impl Cr3 { - #[doc = "Error interrupt enable"] - pub const fn eie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_eie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "IrDA mode enable"] - pub const fn iren(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "IrDA mode enable"] - pub fn set_iren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "IrDA low-power"] - pub const fn irlp(&self) -> super::vals::Irlp { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Irlp(val as u8) - } - #[doc = "IrDA low-power"] - pub fn set_irlp(&mut self, val: super::vals::Irlp) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Half-duplex selection"] - pub const fn hdsel(&self) -> super::vals::Hdsel { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Hdsel(val as u8) - } - #[doc = "Half-duplex selection"] - pub fn set_hdsel(&mut self, val: super::vals::Hdsel) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Smartcard NACK enable"] - pub const fn nack(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Smartcard NACK enable"] - pub fn set_nack(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Smartcard mode enable"] - pub const fn scen(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Smartcard mode enable"] - pub fn set_scen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "DMA enable receiver"] - pub const fn dmar(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "DMA enable receiver"] - pub fn set_dmar(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "DMA enable transmitter"] - pub const fn dmat(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "DMA enable transmitter"] - pub fn set_dmat(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "RTS enable"] - pub const fn rtse(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "RTS enable"] - pub fn set_rtse(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "CTS enable"] - pub const fn ctse(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "CTS enable"] - pub fn set_ctse(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "CTS interrupt enable"] - pub const fn ctsie(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "CTS interrupt enable"] - pub fn set_ctsie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "One sample bit method enable"] - pub const fn onebit(&self) -> super::vals::Onebit { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Onebit(val as u8) - } - #[doc = "One sample bit method enable"] - pub fn set_onebit(&mut self, val: super::vals::Onebit) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "Overrun Disable"] - pub const fn ovrdis(&self) -> super::vals::Ovrdis { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Ovrdis(val as u8) - } - #[doc = "Overrun Disable"] - pub fn set_ovrdis(&mut self, val: super::vals::Ovrdis) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "DMA Disable on Reception Error"] - pub const fn ddre(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "DMA Disable on Reception Error"] - pub fn set_ddre(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Driver enable mode"] - pub const fn dem(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Driver enable mode"] - pub fn set_dem(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Driver enable polarity selection"] - pub const fn dep(&self) -> super::vals::Dep { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Dep(val as u8) - } - #[doc = "Driver enable polarity selection"] - pub fn set_dep(&mut self, val: super::vals::Dep) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Smartcard auto-retry count"] - pub const fn scarcnt(&self) -> u8 { - let val = (self.0 >> 17usize) & 0x07; - val as u8 - } - #[doc = "Smartcard auto-retry count"] - pub fn set_scarcnt(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 17usize)) | (((val as u32) & 0x07) << 17usize); - } - #[doc = "Wakeup from Stop mode interrupt flag selection"] - pub const fn wus(&self) -> super::vals::Wus { - let val = (self.0 >> 20usize) & 0x03; - super::vals::Wus(val as u8) - } - #[doc = "Wakeup from Stop mode interrupt flag selection"] - pub fn set_wus(&mut self, val: super::vals::Wus) { - self.0 = (self.0 & !(0x03 << 20usize)) | (((val.0 as u32) & 0x03) << 20usize); - } - #[doc = "Wakeup from Stop mode interrupt enable"] - pub const fn wufie(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Wakeup from Stop mode interrupt enable"] - pub fn set_wufie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - } - impl Default for Cr3 { - fn default() -> Cr3 { - Cr3(0) - } - } - #[doc = "Control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "USART enable"] - pub const fn ue(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "USART enable"] - pub fn set_ue(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "USART enable in Stop mode"] - pub const fn uesm(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "USART enable in Stop mode"] - pub fn set_uesm(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Receiver enable"] - pub const fn re(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Receiver enable"] - pub fn set_re(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Transmitter enable"] - pub const fn te(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Transmitter enable"] - pub fn set_te(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "IDLE interrupt enable"] - pub const fn idleie(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IDLE interrupt enable"] - pub fn set_idleie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "RXNE interrupt enable"] - pub const fn rxneie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "RXNE interrupt enable"] - pub fn set_rxneie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transmission complete interrupt enable"] - pub const fn tcie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transmission complete interrupt enable"] - pub fn set_tcie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "interrupt enable"] - pub const fn txeie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "interrupt enable"] - pub fn set_txeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "PE interrupt enable"] - pub const fn peie(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "PE interrupt enable"] - pub fn set_peie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Parity selection"] - pub const fn ps(&self) -> super::vals::Ps { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Ps(val as u8) - } - #[doc = "Parity selection"] - pub fn set_ps(&mut self, val: super::vals::Ps) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Parity control enable"] - pub const fn pce(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Parity control enable"] - pub fn set_pce(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Receiver wakeup method"] - pub const fn wake(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Receiver wakeup method"] - pub fn set_wake(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Word length"] - pub const fn m0(&self) -> super::vals::M0 { - let val = (self.0 >> 12usize) & 0x01; - super::vals::M0(val as u8) - } - #[doc = "Word length"] - pub fn set_m0(&mut self, val: super::vals::M0) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Word length"] - pub const fn m1(&self) -> super::vals::M1 { - let val = (self.0 >> 12usize) & 0x01; - super::vals::M1(val as u8) - } - #[doc = "Word length"] - pub fn set_m1(&mut self, val: super::vals::M1) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Mute mode enable"] - pub const fn mme(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Mute mode enable"] - pub fn set_mme(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Character match interrupt enable"] - pub const fn cmie(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Character match interrupt enable"] - pub fn set_cmie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Oversampling mode"] - pub fn over(&self, n: usize) -> super::vals::Over { - assert!(n < 1usize); - let offs = 15usize + n * 0usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Over(val as u8) - } - #[doc = "Oversampling mode"] - pub fn set_over(&mut self, n: usize, val: super::vals::Over) { - assert!(n < 1usize); - let offs = 15usize + n * 0usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "Driver Enable deassertion time"] - pub const fn dedt(&self) -> u8 { - let val = (self.0 >> 16usize) & 0x1f; - val as u8 - } - #[doc = "Driver Enable deassertion time"] - pub fn set_dedt(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 16usize)) | (((val as u32) & 0x1f) << 16usize); - } - #[doc = "Driver Enable assertion time"] - pub const fn deat(&self) -> u8 { - let val = (self.0 >> 21usize) & 0x1f; - val as u8 - } - #[doc = "Driver Enable assertion time"] - pub fn set_deat(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 21usize)) | (((val as u32) & 0x1f) << 21usize); - } - #[doc = "Receiver timeout interrupt enable"] - pub const fn rtoie(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "Receiver timeout interrupt enable"] - pub fn set_rtoie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "End of Block interrupt enable"] - pub const fn eobie(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "End of Block interrupt enable"] - pub fn set_eobie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - #[doc = "Request register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rqr(pub u32); - impl Rqr { - #[doc = "Auto baud rate request"] - pub const fn abrrq(&self) -> super::vals::Abrrq { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Abrrq(val as u8) - } - #[doc = "Auto baud rate request"] - pub fn set_abrrq(&mut self, val: super::vals::Abrrq) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Send break request"] - pub const fn sbkrq(&self) -> super::vals::Sbkrq { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Sbkrq(val as u8) - } - #[doc = "Send break request"] - pub fn set_sbkrq(&mut self, val: super::vals::Sbkrq) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Mute mode request"] - pub const fn mmrq(&self) -> super::vals::Mmrq { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Mmrq(val as u8) - } - #[doc = "Mute mode request"] - pub fn set_mmrq(&mut self, val: super::vals::Mmrq) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Receive data flush request"] - pub const fn rxfrq(&self) -> super::vals::Rxfrq { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Rxfrq(val as u8) - } - #[doc = "Receive data flush request"] - pub fn set_rxfrq(&mut self, val: super::vals::Rxfrq) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Transmit data flush request"] - pub const fn txfrq(&self) -> super::vals::Txfrq { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Txfrq(val as u8) - } - #[doc = "Transmit data flush request"] - pub fn set_txfrq(&mut self, val: super::vals::Txfrq) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - } - impl Default for Rqr { - fn default() -> Rqr { - Rqr(0) - } - } - #[doc = "Guard time and prescaler register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Gtpr(pub u32); - impl Gtpr { - #[doc = "Prescaler value"] - pub const fn psc(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Prescaler value"] - pub fn set_psc(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "Guard time value"] - pub const fn gt(&self) -> u8 { - let val = (self.0 >> 8usize) & 0xff; - val as u8 - } - #[doc = "Guard time value"] - pub fn set_gt(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); - } - } - impl Default for Gtpr { - fn default() -> Gtpr { - Gtpr(0) - } - } - #[doc = "Data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dr(pub u32); - impl Dr { - #[doc = "data value"] - pub const fn dr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x01ff; - val as u16 - } - #[doc = "data value"] - pub fn set_dr(&mut self, val: u16) { - self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); - } - } - impl Default for Dr { - fn default() -> Dr { - Dr(0) - } - } - #[doc = "Baud rate register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Brr(pub u32); - impl Brr { - #[doc = "mantissa of USARTDIV"] - pub const fn brr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "mantissa of USARTDIV"] - pub fn set_brr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Brr { - fn default() -> Brr { - Brr(0) - } - } - #[doc = "Control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "7-bit Address Detection/4-bit Address Detection"] - pub fn addm(&self, n: usize) -> super::vals::Addm { - assert!(n < 1usize); - let offs = 4usize + n * 0usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Addm(val as u8) - } - #[doc = "7-bit Address Detection/4-bit Address Detection"] - pub fn set_addm(&mut self, n: usize, val: super::vals::Addm) { - assert!(n < 1usize); - let offs = 4usize + n * 0usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "LIN break detection length"] - pub const fn lbdl(&self) -> super::vals::Lbdl { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lbdl(val as u8) - } - #[doc = "LIN break detection length"] - pub fn set_lbdl(&mut self, val: super::vals::Lbdl) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "LIN break detection interrupt enable"] - pub const fn lbdie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "LIN break detection interrupt enable"] - pub fn set_lbdie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Last bit clock pulse"] - pub const fn lbcl(&self) -> super::vals::Lbcl { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Lbcl(val as u8) - } - #[doc = "Last bit clock pulse"] - pub fn set_lbcl(&mut self, val: super::vals::Lbcl) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "Clock phase"] - pub const fn cpha(&self) -> super::vals::Cpha { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Cpha(val as u8) - } - #[doc = "Clock phase"] - pub fn set_cpha(&mut self, val: super::vals::Cpha) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Clock polarity"] - pub const fn cpol(&self) -> super::vals::Cpol { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Cpol(val as u8) - } - #[doc = "Clock polarity"] - pub fn set_cpol(&mut self, val: super::vals::Cpol) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Clock enable"] - pub const fn clken(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Clock enable"] - pub fn set_clken(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "STOP bits"] - pub const fn stop(&self) -> super::vals::Stop { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Stop(val as u8) - } - #[doc = "STOP bits"] - pub fn set_stop(&mut self, val: super::vals::Stop) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "LIN mode enable"] - pub const fn linen(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "LIN mode enable"] - pub fn set_linen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Swap TX/RX pins"] - pub const fn swap(&self) -> super::vals::Swap { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Swap(val as u8) - } - #[doc = "Swap TX/RX pins"] - pub fn set_swap(&mut self, val: super::vals::Swap) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "RX pin active level inversion"] - pub const fn rxinv(&self) -> super::vals::Rxinv { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Rxinv(val as u8) - } - #[doc = "RX pin active level inversion"] - pub fn set_rxinv(&mut self, val: super::vals::Rxinv) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "TX pin active level inversion"] - pub const fn txinv(&self) -> super::vals::Txinv { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Txinv(val as u8) - } - #[doc = "TX pin active level inversion"] - pub fn set_txinv(&mut self, val: super::vals::Txinv) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "Binary data inversion"] - pub const fn datainv(&self) -> super::vals::Datainv { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Datainv(val as u8) - } - #[doc = "Binary data inversion"] - pub fn set_datainv(&mut self, val: super::vals::Datainv) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "Most significant bit first"] - pub const fn msbfirst(&self) -> super::vals::Msbfirst { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Msbfirst(val as u8) - } - #[doc = "Most significant bit first"] - pub fn set_msbfirst(&mut self, val: super::vals::Msbfirst) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "Auto baud rate enable"] - pub const fn abren(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "Auto baud rate enable"] - pub fn set_abren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "Auto baud rate mode"] - pub const fn abrmod(&self) -> super::vals::Abrmod { - let val = (self.0 >> 21usize) & 0x03; - super::vals::Abrmod(val as u8) - } - #[doc = "Auto baud rate mode"] - pub fn set_abrmod(&mut self, val: super::vals::Abrmod) { - self.0 = (self.0 & !(0x03 << 21usize)) | (((val.0 as u32) & 0x03) << 21usize); - } - #[doc = "Receiver timeout enable"] - pub const fn rtoen(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Receiver timeout enable"] - pub fn set_rtoen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "Address of the USART node"] - pub const fn add(&self) -> u8 { - let val = (self.0 >> 24usize) & 0xff; - val as u8 - } - #[doc = "Address of the USART node"] - pub fn set_add(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "Receiver timeout register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rtor(pub u32); - impl Rtor { - #[doc = "Receiver timeout value"] - pub const fn rto(&self) -> u32 { - let val = (self.0 >> 0usize) & 0x00ff_ffff; - val as u32 - } - #[doc = "Receiver timeout value"] - pub fn set_rto(&mut self, val: u32) { - self.0 = - (self.0 & !(0x00ff_ffff << 0usize)) | (((val as u32) & 0x00ff_ffff) << 0usize); - } - #[doc = "Block Length"] - pub const fn blen(&self) -> u8 { - let val = (self.0 >> 24usize) & 0xff; - val as u8 - } - #[doc = "Block Length"] - pub fn set_blen(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize); - } - } - impl Default for Rtor { - fn default() -> Rtor { - Rtor(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Stop(pub u8); - impl Stop { - #[doc = "1 stop bit"] - pub const STOP1: Self = Self(0); - #[doc = "0.5 stop bit"] - pub const STOP0P5: Self = Self(0x01); - #[doc = "2 stop bit"] - pub const STOP2: Self = Self(0x02); - #[doc = "1.5 stop bit"] - pub const STOP1P5: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sbkrq(pub u8); - impl Sbkrq { - #[doc = "sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available"] - pub const BREAK: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Txinv(pub u8); - impl Txinv { - #[doc = "TX pin signal works using the standard logic levels"] - pub const STANDARD: Self = Self(0); - #[doc = "TX pin signal values are inverted"] - pub const INVERTED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpol(pub u8); - impl Cpol { - #[doc = "Steady low value on CK pin outside transmission window"] - pub const LOW: Self = Self(0); - #[doc = "Steady high value on CK pin outside transmission window"] - pub const HIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Onebit(pub u8); - impl Onebit { - #[doc = "Three sample bit method"] - pub const SAMPLE3: Self = Self(0); - #[doc = "One sample bit method"] - pub const SAMPLE1: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Irlp(pub u8); - impl Irlp { - #[doc = "Normal mode"] - pub const NORMAL: Self = Self(0); - #[doc = "Low-power mode"] - pub const LOWPOWER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Abrrq(pub u8); - impl Abrrq { - #[doc = "resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame"] - pub const REQUEST: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Abrmod(pub u8); - impl Abrmod { - #[doc = "Measurement of the start bit is used to detect the baud rate"] - pub const START: Self = Self(0); - #[doc = "Falling edge to falling edge measurement"] - pub const EDGE: Self = Self(0x01); - #[doc = "0x7F frame detection"] - pub const FRAME7F: Self = Self(0x02); - #[doc = "0x55 frame detection"] - pub const FRAME55: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ovrdis(pub u8); - impl Ovrdis { - #[doc = "Overrun Error Flag, ORE, is set when received data is not read before receiving new data"] - pub const ENABLED: Self = Self(0); - #[doc = "Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register"] - pub const DISABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ps(pub u8); - impl Ps { - #[doc = "Even parity"] - pub const EVEN: Self = Self(0); - #[doc = "Odd parity"] - pub const ODD: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Msbfirst(pub u8); - impl Msbfirst { - #[doc = "data is transmitted/received with data bit 0 first, following the start bit"] - pub const LSB: Self = Self(0); - #[doc = "data is transmitted/received with MSB (bit 7/8/9) first, following the start bit"] - pub const MSB: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Wake(pub u8); - impl Wake { - #[doc = "Idle line"] - pub const IDLE: Self = Self(0); - #[doc = "Address mask"] - pub const ADDRESS: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hdsel(pub u8); - impl Hdsel { - #[doc = "Half duplex mode is not selected"] - pub const NOTSELECTED: Self = Self(0); - #[doc = "Half duplex mode is selected"] - pub const SELECTED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lbcl(pub u8); - impl Lbcl { - #[doc = "The clock pulse of the last data bit is not output to the CK pin"] - pub const NOTOUTPUT: Self = Self(0); - #[doc = "The clock pulse of the last data bit is output to the CK pin"] - pub const OUTPUT: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mmrq(pub u8); - impl Mmrq { - #[doc = "Puts the USART in mute mode and sets the RWU flag"] - pub const MUTE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Datainv(pub u8); - impl Datainv { - #[doc = "Logical data from the data register are send/received in positive/direct logic"] - pub const POSITIVE: Self = Self(0); - #[doc = "Logical data from the data register are send/received in negative/inverse logic"] - pub const NEGATIVE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rxfrq(pub u8); - impl Rxfrq { - #[doc = "clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition"] - pub const DISCARD: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct M1(pub u8); - impl M1 { - #[doc = "Use M0 to set the data bits"] - pub const M0: Self = Self(0); - #[doc = "1 start bit, 7 data bits, n stop bits"] - pub const BIT7: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Over(pub u8); - impl Over { - #[doc = "Oversampling by 16"] - pub const OVERSAMPLING16: Self = Self(0); - #[doc = "Oversampling by 8"] - pub const OVERSAMPLING8: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Swap(pub u8); - impl Swap { - #[doc = "TX/RX pins are used as defined in standard pinout"] - pub const STANDARD: Self = Self(0); - #[doc = "The TX and RX pins functions are swapped"] - pub const SWAPPED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct M0(pub u8); - impl M0 { - #[doc = "1 start bit, 8 data bits, n stop bits"] - pub const BIT8: Self = Self(0); - #[doc = "1 start bit, 9 data bits, n stop bits"] - pub const BIT9: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rxinv(pub u8); - impl Rxinv { - #[doc = "RX pin signal works using the standard logic levels"] - pub const STANDARD: Self = Self(0); - #[doc = "RX pin signal values are inverted"] - pub const INVERTED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Addm(pub u8); - impl Addm { - #[doc = "4-bit address detection"] - pub const BIT4: Self = Self(0); - #[doc = "7-bit address detection"] - pub const BIT7: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ddre(pub u8); - impl Ddre { - #[doc = "DMA is not disabled in case of reception error"] - pub const NOTDISABLED: Self = Self(0); - #[doc = "DMA is disabled following a reception error"] - pub const DISABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dep(pub u8); - impl Dep { - #[doc = "DE signal is active high"] - pub const HIGH: Self = Self(0); - #[doc = "DE signal is active low"] - pub const LOW: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpha(pub u8); - impl Cpha { - #[doc = "The first clock transition is the first data capture edge"] - pub const FIRST: Self = Self(0); - #[doc = "The second clock transition is the first data capture edge"] - pub const SECOND: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Txfrq(pub u8); - impl Txfrq { - #[doc = "Set the TXE flags. This allows to discard the transmit data"] - pub const DISCARD: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Wus(pub u8); - impl Wus { - #[doc = "WUF active on address match"] - pub const ADDRESS: Self = Self(0); - #[doc = "WuF active on Start bit detection"] - pub const START: Self = Self(0x02); - #[doc = "WUF active on RXNE"] - pub const RXNE: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lbdl(pub u8); - impl Lbdl { - #[doc = "10-bit break detection"] - pub const BIT10: Self = Self(0); - #[doc = "11-bit break detection"] - pub const BIT11: Self = Self(0x01); - } - } -} -pub mod pwr_h7 { - use crate::generic::*; - #[doc = "PWR"] - #[derive(Copy, Clone)] - pub struct Pwr(pub *mut u8); - unsafe impl Send for Pwr {} - unsafe impl Sync for Pwr {} - impl Pwr { - #[doc = "PWR control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "PWR control status register 1"] - pub fn csr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "This register is not reset by wakeup from Standby mode, RESET signal and VDD POR. It is only reset by VSW POR and VSWRST reset. This register shall not be accessed when VSWRST bit in RCC_BDCR register resets the VSW domain.After reset, PWR_CR2 register is write-protected. Prior to modifying its content, the DBP bit in PWR_CR1 register must be set to disable the write protection."] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Reset only by POR only, not reset by wakeup from Standby mode and RESET pad. The lower byte of this register is written once after POR and shall be written before changing VOS level or ck_sys clock frequency. No limitation applies to the upper bytes.Programming data corresponding to an invalid combination of SDLEVEL, SDEXTHP, SDEN, LDOEN and BYPASS bits (see Table9) will be ignored: data will not be written, the written-once mechanism will lock the register and any further write access will be ignored. The default supply configuration will be kept and the ACTVOSRDY bit in PWR control status register 1 (PWR_CSR1) will go on indicating invalid voltage levels. The system shall be power cycled before writing a new value."] - pub fn cr3(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "This register allows controlling CPU1 power."] - pub fn cpucr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "This register allows controlling D3 domain power.Following reset VOSRDY will be read 1 by software"] - pub fn d3cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "reset only by system reset, not reset by wakeup from Standby mode5 wait states are required when writing this register (when clearing a WKUPF bit in PWR_WKUPFR, the AHB write access will complete after the WKUPF has been cleared)."] - pub fn wkupcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "reset only by system reset, not reset by wakeup from Standby mode"] - pub fn wkupfr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "Reset only by system reset, not reset by wakeup from Standby mode"] - pub fn wkupepr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "This register allows controlling D3 domain power.Following reset VOSRDY will be read 1 by software"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D3cr(pub u32); - impl D3cr { - #[doc = "VOS Ready bit for VCORE voltage scaling output selection. This bit is set to 1 by hardware when Bypass mode is selected in PWR control register 3 (PWR_CR3)."] - pub const fn vosrdy(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "VOS Ready bit for VCORE voltage scaling output selection. This bit is set to 1 by hardware when Bypass mode is selected in PWR control register 3 (PWR_CR3)."] - pub fn set_vosrdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Voltage scaling selection according to performance These bits control the VCORE voltage level and allow to obtains the best trade-off between power consumption and performance: When increasing the performance, the voltage scaling shall be changed before increasing the system frequency. When decreasing performance, the system frequency shall first be decreased before changing the voltage scaling."] - pub const fn vos(&self) -> u8 { - let val = (self.0 >> 14usize) & 0x03; - val as u8 - } - #[doc = "Voltage scaling selection according to performance These bits control the VCORE voltage level and allow to obtains the best trade-off between power consumption and performance: When increasing the performance, the voltage scaling shall be changed before increasing the system frequency. When decreasing performance, the system frequency shall first be decreased before changing the voltage scaling."] - pub fn set_vos(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 14usize)) | (((val as u32) & 0x03) << 14usize); - } - } - impl Default for D3cr { - fn default() -> D3cr { - D3cr(0) - } - } - #[doc = "This register is not reset by wakeup from Standby mode, RESET signal and VDD POR. It is only reset by VSW POR and VSWRST reset. This register shall not be accessed when VSWRST bit in RCC_BDCR register resets the VSW domain.After reset, PWR_CR2 register is write-protected. Prior to modifying its content, the DBP bit in PWR_CR1 register must be set to disable the write protection."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Backup regulator enable When set, the Backup regulator (used to maintain the backup RAM content in Standby and VBAT modes) is enabled. If BREN is reset, the backup regulator is switched off. The backup RAM can still be used in Run and Stop modes. However, its content will be lost in Standby and VBAT modes. If BREN is set, the application must wait till the Backup Regulator Ready flag (BRRDY) is set to indicate that the data written into the SRAM will be maintained in Standby and VBAT modes."] - pub const fn bren(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Backup regulator enable When set, the Backup regulator (used to maintain the backup RAM content in Standby and VBAT modes) is enabled. If BREN is reset, the backup regulator is switched off. The backup RAM can still be used in Run and Stop modes. However, its content will be lost in Standby and VBAT modes. If BREN is set, the application must wait till the Backup Regulator Ready flag (BRRDY) is set to indicate that the data written into the SRAM will be maintained in Standby and VBAT modes."] - pub fn set_bren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "VBAT and temperature monitoring enable When set, the VBAT supply and temperature monitoring is enabled."] - pub const fn monen(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "VBAT and temperature monitoring enable When set, the VBAT supply and temperature monitoring is enabled."] - pub fn set_monen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Backup regulator ready This bit is set by hardware to indicate that the Backup regulator is ready."] - pub const fn brrdy(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Backup regulator ready This bit is set by hardware to indicate that the Backup regulator is ready."] - pub fn set_brrdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "VBAT level monitoring versus low threshold"] - pub const fn vbatl(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "VBAT level monitoring versus low threshold"] - pub fn set_vbatl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "VBAT level monitoring versus high threshold"] - pub const fn vbath(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "VBAT level monitoring versus high threshold"] - pub fn set_vbath(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "Temperature level monitoring versus low threshold"] - pub const fn templ(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Temperature level monitoring versus low threshold"] - pub fn set_templ(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Temperature level monitoring versus high threshold"] - pub const fn temph(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Temperature level monitoring versus high threshold"] - pub fn set_temph(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "This register allows controlling CPU1 power."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cpucr(pub u32); - impl Cpucr { - #[doc = "D1 domain Power Down Deepsleep selection. This bit allows CPU1 to define the Deepsleep mode for D1 domain."] - pub const fn pdds_d1(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "D1 domain Power Down Deepsleep selection. This bit allows CPU1 to define the Deepsleep mode for D1 domain."] - pub fn set_pdds_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "D2 domain Power Down Deepsleep. This bit allows CPU1 to define the Deepsleep mode for D2 domain."] - pub const fn pdds_d2(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "D2 domain Power Down Deepsleep. This bit allows CPU1 to define the Deepsleep mode for D2 domain."] - pub fn set_pdds_d2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "System D3 domain Power Down Deepsleep. This bit allows CPU1 to define the Deepsleep mode for System D3 domain."] - pub const fn pdds_d3(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "System D3 domain Power Down Deepsleep. This bit allows CPU1 to define the Deepsleep mode for System D3 domain."] - pub fn set_pdds_d3(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "STOP flag This bit is set by hardware and cleared only by any reset or by setting the CPU1 CSSF bit."] - pub const fn stopf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "STOP flag This bit is set by hardware and cleared only by any reset or by setting the CPU1 CSSF bit."] - pub fn set_stopf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "System Standby flag This bit is set by hardware and cleared only by a POR (Power-on Reset) or by setting the CPU1 CSSF bit"] - pub const fn sbf(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "System Standby flag This bit is set by hardware and cleared only by a POR (Power-on Reset) or by setting the CPU1 CSSF bit"] - pub fn set_sbf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "D1 domain DStandby flag This bit is set by hardware and cleared by any system reset or by setting the CPU1 CSSF bit. Once set, this bit can be cleared only when the D1 domain is no longer in DStandby mode."] - pub const fn sbf_d1(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "D1 domain DStandby flag This bit is set by hardware and cleared by any system reset or by setting the CPU1 CSSF bit. Once set, this bit can be cleared only when the D1 domain is no longer in DStandby mode."] - pub fn set_sbf_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "D2 domain DStandby flag This bit is set by hardware and cleared by any system reset or by setting the CPU1 CSSF bit. Once set, this bit can be cleared only when the D2 domain is no longer in DStandby mode."] - pub const fn sbf_d2(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "D2 domain DStandby flag This bit is set by hardware and cleared by any system reset or by setting the CPU1 CSSF bit. Once set, this bit can be cleared only when the D2 domain is no longer in DStandby mode."] - pub fn set_sbf_d2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Clear D1 domain CPU1 Standby, Stop and HOLD flags (always read as 0) This bit is cleared to 0 by hardware."] - pub const fn cssf(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Clear D1 domain CPU1 Standby, Stop and HOLD flags (always read as 0) This bit is cleared to 0 by hardware."] - pub fn set_cssf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Keep system D3 domain in Run mode regardless of the CPU sub-systems modes"] - pub const fn run_d3(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Keep system D3 domain in Run mode regardless of the CPU sub-systems modes"] - pub fn set_run_d3(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - } - impl Default for Cpucr { - fn default() -> Cpucr { - Cpucr(0) - } - } - #[doc = "PWR control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Low-power Deepsleep with SVOS3 (SVOS4 and SVOS5 always use low-power, regardless of the setting of this bit)"] - pub const fn lpds(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Low-power Deepsleep with SVOS3 (SVOS4 and SVOS5 always use low-power, regardless of the setting of this bit)"] - pub fn set_lpds(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Programmable voltage detector enable"] - pub const fn pvde(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Programmable voltage detector enable"] - pub fn set_pvde(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Programmable voltage detector level selection These bits select the voltage threshold detected by the PVD. Note: Refer to Section Electrical characteristics of the product datasheet for more details."] - pub const fn pls(&self) -> u8 { - let val = (self.0 >> 5usize) & 0x07; - val as u8 - } - #[doc = "Programmable voltage detector level selection These bits select the voltage threshold detected by the PVD. Note: Refer to Section Electrical characteristics of the product datasheet for more details."] - pub fn set_pls(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 5usize)) | (((val as u32) & 0x07) << 5usize); - } - #[doc = "Disable backup domain write protection In reset state, the RCC_BDCR register, the RTC registers (including the backup registers), BREN and MOEN bits in PWR_CR2 register, are protected against parasitic write access. This bit must be set to enable write access to these registers."] - pub const fn dbp(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Disable backup domain write protection In reset state, the RCC_BDCR register, the RTC registers (including the backup registers), BREN and MOEN bits in PWR_CR2 register, are protected against parasitic write access. This bit must be set to enable write access to these registers."] - pub fn set_dbp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Flash low-power mode in DStop mode This bit allows to obtain the best trade-off between low-power consumption and restart time when exiting from DStop mode. When it is set, the Flash memory enters low-power mode when D1 domain is in DStop mode."] - pub const fn flps(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Flash low-power mode in DStop mode This bit allows to obtain the best trade-off between low-power consumption and restart time when exiting from DStop mode. When it is set, the Flash memory enters low-power mode when D1 domain is in DStop mode."] - pub fn set_flps(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "System Stop mode voltage scaling selection These bits control the VCORE voltage level in system Stop mode, to obtain the best trade-off between power consumption and performance."] - pub const fn svos(&self) -> u8 { - let val = (self.0 >> 14usize) & 0x03; - val as u8 - } - #[doc = "System Stop mode voltage scaling selection These bits control the VCORE voltage level in system Stop mode, to obtain the best trade-off between power consumption and performance."] - pub fn set_svos(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 14usize)) | (((val as u32) & 0x03) << 14usize); - } - #[doc = "Peripheral voltage monitor on VDDA enable"] - pub const fn avden(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Peripheral voltage monitor on VDDA enable"] - pub fn set_avden(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Analog voltage detector level selection These bits select the voltage threshold detected by the AVD."] - pub const fn als(&self) -> u8 { - let val = (self.0 >> 17usize) & 0x03; - val as u8 - } - #[doc = "Analog voltage detector level selection These bits select the voltage threshold detected by the AVD."] - pub fn set_als(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 17usize)) | (((val as u32) & 0x03) << 17usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - #[doc = "Reset only by system reset, not reset by wakeup from Standby mode"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Wkupepr(pub u32); - impl Wkupepr { - #[doc = "Enable Wakeup Pin WKUPn+1 Each bit is set and cleared by software. Note: An additional wakeup event is detected if WKUPn+1 pin is enabled (by setting the WKUPENn+1 bit) when WKUPn+1 pin level is already high when WKUPPn+1 selects rising edge, or low when WKUPPn+1 selects falling edge."] - pub fn wkupen(&self, n: usize) -> bool { - assert!(n < 6usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Enable Wakeup Pin WKUPn+1 Each bit is set and cleared by software. Note: An additional wakeup event is detected if WKUPn+1 pin is enabled (by setting the WKUPENn+1 bit) when WKUPn+1 pin level is already high when WKUPPn+1 selects rising edge, or low when WKUPPn+1 selects falling edge."] - pub fn set_wkupen(&mut self, n: usize, val: bool) { - assert!(n < 6usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Wakeup pin polarity bit for WKUPn-7 These bits define the polarity used for event detection on WKUPn-7 external wakeup pin."] - pub fn wkupp(&self, n: usize) -> bool { - assert!(n < 6usize); - let offs = 8usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Wakeup pin polarity bit for WKUPn-7 These bits define the polarity used for event detection on WKUPn-7 external wakeup pin."] - pub fn set_wkupp(&mut self, n: usize, val: bool) { - assert!(n < 6usize); - let offs = 8usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Wakeup pin pull configuration"] - pub fn wkuppupd(&self, n: usize) -> u8 { - assert!(n < 6usize); - let offs = 16usize + n * 2usize; - let val = (self.0 >> offs) & 0x03; - val as u8 - } - #[doc = "Wakeup pin pull configuration"] - pub fn set_wkuppupd(&mut self, n: usize, val: u8) { - assert!(n < 6usize); - let offs = 16usize + n * 2usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val as u32) & 0x03) << offs); - } - } - impl Default for Wkupepr { - fn default() -> Wkupepr { - Wkupepr(0) - } - } - #[doc = "reset only by system reset, not reset by wakeup from Standby mode"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Wkupfr(pub u32); - impl Wkupfr { - #[doc = "Wakeup pin WKUPF flag. This bit is set by hardware and cleared only by a Reset pin or by setting the WKUPCn+1 bit in the PWR wakeup clear register (PWR_WKUPCR)."] - pub fn wkupf(&self, n: usize) -> bool { - assert!(n < 6usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Wakeup pin WKUPF flag. This bit is set by hardware and cleared only by a Reset pin or by setting the WKUPCn+1 bit in the PWR wakeup clear register (PWR_WKUPCR)."] - pub fn set_wkupf(&mut self, n: usize, val: bool) { - assert!(n < 6usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Wkupfr { - fn default() -> Wkupfr { - Wkupfr(0) - } - } - #[doc = "Reset only by POR only, not reset by wakeup from Standby mode and RESET pad. The lower byte of this register is written once after POR and shall be written before changing VOS level or ck_sys clock frequency. No limitation applies to the upper bytes.Programming data corresponding to an invalid combination of SDLEVEL, SDEXTHP, SDEN, LDOEN and BYPASS bits (see Table9) will be ignored: data will not be written, the written-once mechanism will lock the register and any further write access will be ignored. The default supply configuration will be kept and the ACTVOSRDY bit in PWR control status register 1 (PWR_CSR1) will go on indicating invalid voltage levels. The system shall be power cycled before writing a new value."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr3(pub u32); - impl Cr3 { - #[doc = "Power management unit bypass"] - pub const fn bypass(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Power management unit bypass"] - pub fn set_bypass(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Low drop-out regulator enable"] - pub const fn ldoen(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Low drop-out regulator enable"] - pub fn set_ldoen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "SD converter Enable"] - pub const fn scuen(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "SD converter Enable"] - pub fn set_scuen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "VBAT charging enable"] - pub const fn vbe(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "VBAT charging enable"] - pub fn set_vbe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "VBAT charging resistor selection"] - pub const fn vbrs(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "VBAT charging resistor selection"] - pub fn set_vbrs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "VDD33USB voltage level detector enable."] - pub const fn usb33den(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "VDD33USB voltage level detector enable."] - pub fn set_usb33den(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "USB regulator enable."] - pub const fn usbregen(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "USB regulator enable."] - pub fn set_usbregen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "USB supply ready."] - pub const fn usb33rdy(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "USB supply ready."] - pub fn set_usb33rdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - } - impl Default for Cr3 { - fn default() -> Cr3 { - Cr3(0) - } - } - #[doc = "PWR control status register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Csr1(pub u32); - impl Csr1 { - #[doc = "Programmable voltage detect output This bit is set and cleared by hardware. It is valid only if the PVD has been enabled by the PVDE bit. Note: since the PVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the PVDE bit is set."] - pub const fn pvdo(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Programmable voltage detect output This bit is set and cleared by hardware. It is valid only if the PVD has been enabled by the PVDE bit. Note: since the PVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the PVDE bit is set."] - pub fn set_pvdo(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Voltage levels ready bit for currently used VOS and SDLEVEL This bit is set to 1 by hardware when the voltage regulator and the SD converter are both disabled and Bypass mode is selected in PWR control register 3 (PWR_CR3)."] - pub const fn actvosrdy(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Voltage levels ready bit for currently used VOS and SDLEVEL This bit is set to 1 by hardware when the voltage regulator and the SD converter are both disabled and Bypass mode is selected in PWR control register 3 (PWR_CR3)."] - pub fn set_actvosrdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "VOS currently applied for VCORE voltage scaling selection. These bits reflect the last VOS value applied to the PMU."] - pub const fn actvos(&self) -> u8 { - let val = (self.0 >> 14usize) & 0x03; - val as u8 - } - #[doc = "VOS currently applied for VCORE voltage scaling selection. These bits reflect the last VOS value applied to the PMU."] - pub fn set_actvos(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 14usize)) | (((val as u32) & 0x03) << 14usize); - } - #[doc = "Analog voltage detector output on VDDA This bit is set and cleared by hardware. It is valid only if AVD on VDDA is enabled by the AVDEN bit. Note: Since the AVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the AVDEN bit is set."] - pub const fn avdo(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Analog voltage detector output on VDDA This bit is set and cleared by hardware. It is valid only if AVD on VDDA is enabled by the AVDEN bit. Note: Since the AVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the AVDEN bit is set."] - pub fn set_avdo(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Csr1 { - fn default() -> Csr1 { - Csr1(0) - } - } - #[doc = "reset only by system reset, not reset by wakeup from Standby mode5 wait states are required when writing this register (when clearing a WKUPF bit in PWR_WKUPFR, the AHB write access will complete after the WKUPF has been cleared)."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Wkupcr(pub u32); - impl Wkupcr { - #[doc = "Clear Wakeup pin flag for WKUP. These bits are always read as 0."] - pub const fn wkupc(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x3f; - val as u8 - } - #[doc = "Clear Wakeup pin flag for WKUP. These bits are always read as 0."] - pub fn set_wkupc(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); - } - } - impl Default for Wkupcr { - fn default() -> Wkupcr { - Wkupcr(0) - } - } - } -} -pub mod generic { - use core::marker::PhantomData; - #[derive(Copy, Clone)] - pub struct RW; - #[derive(Copy, Clone)] - pub struct R; - #[derive(Copy, Clone)] - pub struct W; - mod sealed { - use super::*; - pub trait Access {} - impl Access for R {} - impl Access for W {} - impl Access for RW {} - } - pub trait Access: sealed::Access + Copy {} - impl Access for R {} - impl Access for W {} - impl Access for RW {} - pub trait Read: Access {} - impl Read for RW {} - impl Read for R {} - pub trait Write: Access {} - impl Write for RW {} - impl Write for W {} - #[derive(Copy, Clone)] - pub struct Reg { - ptr: *mut u8, - phantom: PhantomData<*mut (T, A)>, - } - unsafe impl Send for Reg {} - unsafe impl Sync for Reg {} - impl Reg { - pub fn from_ptr(ptr: *mut u8) -> Self { - Self { - ptr, - phantom: PhantomData, - } - } - pub fn ptr(&self) -> *mut T { - self.ptr as _ - } - } - impl Reg { - pub unsafe fn read(&self) -> T { - (self.ptr as *mut T).read_volatile() - } - } - impl Reg { - pub unsafe fn write_value(&self, val: T) { - (self.ptr as *mut T).write_volatile(val) - } - } - impl Reg { - pub unsafe fn write(&self, f: impl FnOnce(&mut T) -> R) -> R { - let mut val = Default::default(); - let res = f(&mut val); - self.write_value(val); - res - } - } - impl Reg { - pub unsafe fn modify(&self, f: impl FnOnce(&mut T) -> R) -> R { - let mut val = self.read(); - let res = f(&mut val); - self.write_value(val); - res - } - } -} -pub mod rcc_l0 { - use crate::generic::*; - #[doc = "Reset and clock control"] - #[derive(Copy, Clone)] - pub struct Rcc(pub *mut u8); - unsafe impl Send for Rcc {} - unsafe impl Sync for Rcc {} - impl Rcc { - #[doc = "Clock control register"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Internal clock sources calibration register"] - pub fn icscr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Clock recovery RC register"] - pub fn crrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Clock configuration register"] - pub fn cfgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Clock interrupt enable register"] - pub fn cier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Clock interrupt flag register"] - pub fn cifr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Clock interrupt clear register"] - pub fn cicr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "GPIO reset register"] - pub fn ioprstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "AHB peripheral reset register"] - pub fn ahbrstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "APB2 peripheral reset register"] - pub fn apb2rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "APB1 peripheral reset register"] - pub fn apb1rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "GPIO clock enable register"] - pub fn iopenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "AHB peripheral clock enable register"] - pub fn ahbenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(48usize)) } - } - #[doc = "APB2 peripheral clock enable register"] - pub fn apb2enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(52usize)) } - } - #[doc = "APB1 peripheral clock enable register"] - pub fn apb1enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(56usize)) } - } - #[doc = "GPIO clock enable in sleep mode register"] - pub fn iopsmen(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(60usize)) } - } - #[doc = "AHB peripheral clock enable in sleep mode register"] - pub fn ahbsmenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(64usize)) } - } - #[doc = "APB2 peripheral clock enable in sleep mode register"] - pub fn apb2smenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(68usize)) } - } - #[doc = "APB1 peripheral clock enable in sleep mode register"] - pub fn apb1smenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(72usize)) } - } - #[doc = "Clock configuration register"] - pub fn ccipr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - #[doc = "Control and status register"] - pub fn csr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(80usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "GPIO clock enable in sleep mode register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Iopsmen(pub u32); - impl Iopsmen { - #[doc = "IOPASMEN"] - pub const fn iopasmen(&self) -> super::vals::Iophsmen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Iophsmen(val as u8) - } - #[doc = "IOPASMEN"] - pub fn set_iopasmen(&mut self, val: super::vals::Iophsmen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "IOPBSMEN"] - pub const fn iopbsmen(&self) -> super::vals::Iophsmen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Iophsmen(val as u8) - } - #[doc = "IOPBSMEN"] - pub fn set_iopbsmen(&mut self, val: super::vals::Iophsmen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "IOPCSMEN"] - pub const fn iopcsmen(&self) -> super::vals::Iophsmen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Iophsmen(val as u8) - } - #[doc = "IOPCSMEN"] - pub fn set_iopcsmen(&mut self, val: super::vals::Iophsmen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "IOPDSMEN"] - pub const fn iopdsmen(&self) -> super::vals::Iophsmen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Iophsmen(val as u8) - } - #[doc = "IOPDSMEN"] - pub fn set_iopdsmen(&mut self, val: super::vals::Iophsmen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Port E clock enable during Sleep mode bit"] - pub const fn iopesmen(&self) -> super::vals::Iophsmen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Iophsmen(val as u8) - } - #[doc = "Port E clock enable during Sleep mode bit"] - pub fn set_iopesmen(&mut self, val: super::vals::Iophsmen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "IOPHSMEN"] - pub const fn iophsmen(&self) -> super::vals::Iophsmen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Iophsmen(val as u8) - } - #[doc = "IOPHSMEN"] - pub fn set_iophsmen(&mut self, val: super::vals::Iophsmen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - } - impl Default for Iopsmen { - fn default() -> Iopsmen { - Iopsmen(0) - } - } - #[doc = "Clock interrupt flag register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cifr(pub u32); - impl Cifr { - #[doc = "LSI ready interrupt flag"] - pub const fn lsirdyf(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "LSI ready interrupt flag"] - pub fn set_lsirdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "LSE ready interrupt flag"] - pub const fn lserdyf(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "LSE ready interrupt flag"] - pub fn set_lserdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "HSI16 ready interrupt flag"] - pub const fn hsi16rdyf(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "HSI16 ready interrupt flag"] - pub fn set_hsi16rdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "HSE ready interrupt flag"] - pub const fn hserdyf(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "HSE ready interrupt flag"] - pub fn set_hserdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "PLL ready interrupt flag"] - pub const fn pllrdyf(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "PLL ready interrupt flag"] - pub fn set_pllrdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "MSI ready interrupt flag"] - pub const fn msirdyf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "MSI ready interrupt flag"] - pub fn set_msirdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "HSI48 ready interrupt flag"] - pub const fn hsi48rdyf(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "HSI48 ready interrupt flag"] - pub fn set_hsi48rdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "LSE Clock Security System Interrupt flag"] - pub const fn csslsef(&self) -> super::vals::Csslsef { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Csslsef(val as u8) - } - #[doc = "LSE Clock Security System Interrupt flag"] - pub fn set_csslsef(&mut self, val: super::vals::Csslsef) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Clock Security System Interrupt flag"] - pub const fn csshsef(&self) -> super::vals::Csshsef { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Csshsef(val as u8) - } - #[doc = "Clock Security System Interrupt flag"] - pub fn set_csshsef(&mut self, val: super::vals::Csshsef) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - } - impl Default for Cifr { - fn default() -> Cifr { - Cifr(0) - } - } - #[doc = "GPIO clock enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Iopenr(pub u32); - impl Iopenr { - #[doc = "IO port A clock enable bit"] - pub const fn iopaen(&self) -> super::vals::Iophen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Iophen(val as u8) - } - #[doc = "IO port A clock enable bit"] - pub fn set_iopaen(&mut self, val: super::vals::Iophen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "IO port B clock enable bit"] - pub const fn iopben(&self) -> super::vals::Iophen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Iophen(val as u8) - } - #[doc = "IO port B clock enable bit"] - pub fn set_iopben(&mut self, val: super::vals::Iophen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "IO port A clock enable bit"] - pub const fn iopcen(&self) -> super::vals::Iophen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Iophen(val as u8) - } - #[doc = "IO port A clock enable bit"] - pub fn set_iopcen(&mut self, val: super::vals::Iophen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "I/O port D clock enable bit"] - pub const fn iopden(&self) -> super::vals::Iophen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Iophen(val as u8) - } - #[doc = "I/O port D clock enable bit"] - pub fn set_iopden(&mut self, val: super::vals::Iophen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "I/O port E clock enable bit"] - pub const fn iopeen(&self) -> super::vals::Iophen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Iophen(val as u8) - } - #[doc = "I/O port E clock enable bit"] - pub fn set_iopeen(&mut self, val: super::vals::Iophen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "I/O port H clock enable bit"] - pub const fn iophen(&self) -> super::vals::Iophen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Iophen(val as u8) - } - #[doc = "I/O port H clock enable bit"] - pub fn set_iophen(&mut self, val: super::vals::Iophen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - } - impl Default for Iopenr { - fn default() -> Iopenr { - Iopenr(0) - } - } - #[doc = "Internal clock sources calibration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Icscr(pub u32); - impl Icscr { - #[doc = "nternal high speed clock calibration"] - pub const fn hsi16cal(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "nternal high speed clock calibration"] - pub fn set_hsi16cal(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "High speed internal clock trimming"] - pub const fn hsi16trim(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x1f; - val as u8 - } - #[doc = "High speed internal clock trimming"] - pub fn set_hsi16trim(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 8usize)) | (((val as u32) & 0x1f) << 8usize); - } - #[doc = "MSI clock ranges"] - pub const fn msirange(&self) -> super::vals::Msirange { - let val = (self.0 >> 13usize) & 0x07; - super::vals::Msirange(val as u8) - } - #[doc = "MSI clock ranges"] - pub fn set_msirange(&mut self, val: super::vals::Msirange) { - self.0 = (self.0 & !(0x07 << 13usize)) | (((val.0 as u32) & 0x07) << 13usize); - } - #[doc = "MSI clock calibration"] - pub const fn msical(&self) -> u8 { - let val = (self.0 >> 16usize) & 0xff; - val as u8 - } - #[doc = "MSI clock calibration"] - pub fn set_msical(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 16usize)) | (((val as u32) & 0xff) << 16usize); - } - #[doc = "MSI clock trimming"] - pub const fn msitrim(&self) -> u8 { - let val = (self.0 >> 24usize) & 0xff; - val as u8 - } - #[doc = "MSI clock trimming"] - pub fn set_msitrim(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize); - } - } - impl Default for Icscr { - fn default() -> Icscr { - Icscr(0) - } - } - #[doc = "AHB peripheral reset register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahbrstr(pub u32); - impl Ahbrstr { - #[doc = "DMA reset"] - pub const fn dmarst(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "DMA reset"] - pub fn set_dmarst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Memory interface reset"] - pub const fn mifrst(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Memory interface reset"] - pub fn set_mifrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Test integration module reset"] - pub const fn crcrst(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Test integration module reset"] - pub fn set_crcrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Touch Sensing reset"] - pub const fn touchrst(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Touch Sensing reset"] - pub fn set_touchrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Random Number Generator module reset"] - pub const fn rngrst(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "Random Number Generator module reset"] - pub fn set_rngrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "Crypto module reset"] - pub const fn cryprst(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "Crypto module reset"] - pub fn set_cryprst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - } - impl Default for Ahbrstr { - fn default() -> Ahbrstr { - Ahbrstr(0) - } - } - #[doc = "Clock control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "16 MHz high-speed internal clock enable"] - pub const fn hsi16on(&self) -> super::vals::Pllon { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Pllon(val as u8) - } - #[doc = "16 MHz high-speed internal clock enable"] - pub fn set_hsi16on(&mut self, val: super::vals::Pllon) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "High-speed internal clock enable bit for some IP kernels"] - pub const fn hsi16keron(&self) -> super::vals::Pllon { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Pllon(val as u8) - } - #[doc = "High-speed internal clock enable bit for some IP kernels"] - pub fn set_hsi16keron(&mut self, val: super::vals::Pllon) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Internal high-speed clock ready flag"] - pub const fn hsi16rdyf(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Internal high-speed clock ready flag"] - pub fn set_hsi16rdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "HSI16DIVEN"] - pub const fn hsi16diven(&self) -> super::vals::Hsidiven { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Hsidiven(val as u8) - } - #[doc = "HSI16DIVEN"] - pub fn set_hsi16diven(&mut self, val: super::vals::Hsidiven) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "HSI16DIVF"] - pub const fn hsi16divf(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "HSI16DIVF"] - pub fn set_hsi16divf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "16 MHz high-speed internal clock output enable"] - pub const fn hsi16outen(&self) -> super::vals::Hsiouten { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Hsiouten(val as u8) - } - #[doc = "16 MHz high-speed internal clock output enable"] - pub fn set_hsi16outen(&mut self, val: super::vals::Hsiouten) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "MSI clock enable bit"] - pub const fn msion(&self) -> super::vals::Pllon { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Pllon(val as u8) - } - #[doc = "MSI clock enable bit"] - pub fn set_msion(&mut self, val: super::vals::Pllon) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "MSI clock ready flag"] - pub const fn msirdy(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "MSI clock ready flag"] - pub fn set_msirdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "HSE clock enable bit"] - pub const fn hseon(&self) -> super::vals::Pllon { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Pllon(val as u8) - } - #[doc = "HSE clock enable bit"] - pub fn set_hseon(&mut self, val: super::vals::Pllon) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "HSE clock ready flag"] - pub const fn hserdy(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "HSE clock ready flag"] - pub fn set_hserdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "HSE clock bypass bit"] - pub const fn hsebyp(&self) -> super::vals::Hsebyp { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Hsebyp(val as u8) - } - #[doc = "HSE clock bypass bit"] - pub fn set_hsebyp(&mut self, val: super::vals::Hsebyp) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "Clock security system on HSE enable bit"] - pub const fn csshseon(&self) -> super::vals::Pllon { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Pllon(val as u8) - } - #[doc = "Clock security system on HSE enable bit"] - pub fn set_csshseon(&mut self, val: super::vals::Pllon) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "TC/LCD prescaler"] - pub const fn rtcpre(&self) -> super::vals::Rtcpre { - let val = (self.0 >> 20usize) & 0x03; - super::vals::Rtcpre(val as u8) - } - #[doc = "TC/LCD prescaler"] - pub fn set_rtcpre(&mut self, val: super::vals::Rtcpre) { - self.0 = (self.0 & !(0x03 << 20usize)) | (((val.0 as u32) & 0x03) << 20usize); - } - #[doc = "PLL enable bit"] - pub const fn pllon(&self) -> super::vals::Pllon { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Pllon(val as u8) - } - #[doc = "PLL enable bit"] - pub fn set_pllon(&mut self, val: super::vals::Pllon) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "PLL clock ready flag"] - pub const fn pllrdy(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "PLL clock ready flag"] - pub fn set_pllrdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - #[doc = "Clock recovery RC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crrcr(pub u32); - impl Crrcr { - #[doc = "48MHz HSI clock enable bit"] - pub const fn hsi48on(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "48MHz HSI clock enable bit"] - pub fn set_hsi48on(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "48MHz HSI clock ready flag"] - pub const fn hsi48rdy(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "48MHz HSI clock ready flag"] - pub fn set_hsi48rdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "48 MHz HSI clock divided by 6 output enable"] - pub const fn hsi48div6en(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "48 MHz HSI clock divided by 6 output enable"] - pub fn set_hsi48div6en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "48 MHz HSI clock calibration"] - pub const fn hsi48cal(&self) -> u8 { - let val = (self.0 >> 8usize) & 0xff; - val as u8 - } - #[doc = "48 MHz HSI clock calibration"] - pub fn set_hsi48cal(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); - } - } - impl Default for Crrcr { - fn default() -> Crrcr { - Crrcr(0) - } - } - #[doc = "APB2 peripheral reset register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb2rstr(pub u32); - impl Apb2rstr { - #[doc = "System configuration controller reset"] - pub const fn syscfgrst(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "System configuration controller reset"] - pub fn set_syscfgrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "TIM21 timer reset"] - pub const fn tim21rst(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "TIM21 timer reset"] - pub fn set_tim21rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "TIM22 timer reset"] - pub const fn tim22rst(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "TIM22 timer reset"] - pub fn set_tim22rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "ADC interface reset"] - pub const fn adcrst(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "ADC interface reset"] - pub fn set_adcrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "SPI 1 reset"] - pub const fn spi1rst(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "SPI 1 reset"] - pub fn set_spi1rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "USART1 reset"] - pub const fn usart1rst(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "USART1 reset"] - pub fn set_usart1rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "DBG reset"] - pub const fn dbgrst(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "DBG reset"] - pub fn set_dbgrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - } - impl Default for Apb2rstr { - fn default() -> Apb2rstr { - Apb2rstr(0) - } - } - #[doc = "AHB peripheral clock enable in sleep mode register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahbsmenr(pub u32); - impl Ahbsmenr { - #[doc = "DMA clock enable during sleep mode bit"] - pub const fn dmasmen(&self) -> super::vals::Dmasmen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Dmasmen(val as u8) - } - #[doc = "DMA clock enable during sleep mode bit"] - pub fn set_dmasmen(&mut self, val: super::vals::Dmasmen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "NVM interface clock enable during sleep mode bit"] - pub const fn mifsmen(&self) -> super::vals::Mifsmen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Mifsmen(val as u8) - } - #[doc = "NVM interface clock enable during sleep mode bit"] - pub fn set_mifsmen(&mut self, val: super::vals::Mifsmen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "SRAM interface clock enable during sleep mode bit"] - pub const fn sramsmen(&self) -> super::vals::Sramsmen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Sramsmen(val as u8) - } - #[doc = "SRAM interface clock enable during sleep mode bit"] - pub fn set_sramsmen(&mut self, val: super::vals::Sramsmen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "CRC clock enable during sleep mode bit"] - pub const fn crcsmen(&self) -> super::vals::Crcsmen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Crcsmen(val as u8) - } - #[doc = "CRC clock enable during sleep mode bit"] - pub fn set_crcsmen(&mut self, val: super::vals::Crcsmen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Touch Sensing clock enable during sleep mode bit"] - pub const fn touchsmen(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Touch Sensing clock enable during sleep mode bit"] - pub fn set_touchsmen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Random Number Generator clock enable during sleep mode bit"] - pub const fn rngsmen(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "Random Number Generator clock enable during sleep mode bit"] - pub fn set_rngsmen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "Crypto clock enable during sleep mode bit"] - pub const fn crypsmen(&self) -> super::vals::Crypsmen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Crypsmen(val as u8) - } - #[doc = "Crypto clock enable during sleep mode bit"] - pub fn set_crypsmen(&mut self, val: super::vals::Crypsmen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - } - impl Default for Ahbsmenr { - fn default() -> Ahbsmenr { - Ahbsmenr(0) - } - } - #[doc = "APB1 peripheral clock enable in sleep mode register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1smenr(pub u32); - impl Apb1smenr { - #[doc = "Timer2 clock enable during sleep mode bit"] - pub const fn tim2smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "Timer2 clock enable during sleep mode bit"] - pub fn set_tim2smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Timer3 clock enable during Sleep mode bit"] - pub const fn tim3smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "Timer3 clock enable during Sleep mode bit"] - pub fn set_tim3smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Timer 6 clock enable during sleep mode bit"] - pub const fn tim6smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "Timer 6 clock enable during sleep mode bit"] - pub fn set_tim6smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Timer 7 clock enable during Sleep mode bit"] - pub const fn tim7smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "Timer 7 clock enable during Sleep mode bit"] - pub fn set_tim7smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Window watchdog clock enable during sleep mode bit"] - pub const fn wwdgsmen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "Window watchdog clock enable during sleep mode bit"] - pub fn set_wwdgsmen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "SPI2 clock enable during sleep mode bit"] - pub const fn spi2smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "SPI2 clock enable during sleep mode bit"] - pub fn set_spi2smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "UART2 clock enable during sleep mode bit"] - pub const fn usart2smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "UART2 clock enable during sleep mode bit"] - pub fn set_usart2smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "LPUART1 clock enable during sleep mode bit"] - pub const fn lpuart1smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "LPUART1 clock enable during sleep mode bit"] - pub fn set_lpuart1smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "USART4 clock enable during Sleep mode bit"] - pub const fn usart4smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "USART4 clock enable during Sleep mode bit"] - pub fn set_usart4smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "USART5 clock enable during Sleep mode bit"] - pub const fn usart5smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "USART5 clock enable during Sleep mode bit"] - pub fn set_usart5smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "I2C1 clock enable during sleep mode bit"] - pub const fn i2c1smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "I2C1 clock enable during sleep mode bit"] - pub fn set_i2c1smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 clock enable during sleep mode bit"] - pub const fn i2c2smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "I2C2 clock enable during sleep mode bit"] - pub fn set_i2c2smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "USB clock enable during sleep mode bit"] - pub const fn usbsmen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "USB clock enable during sleep mode bit"] - pub fn set_usbsmen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "Clock recovery system clock enable during sleep mode bit"] - pub const fn crssmen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 27usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "Clock recovery system clock enable during sleep mode bit"] - pub fn set_crssmen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "Power interface clock enable during sleep mode bit"] - pub const fn pwrsmen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "Power interface clock enable during sleep mode bit"] - pub fn set_pwrsmen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "DAC interface clock enable during sleep mode bit"] - pub const fn dacsmen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "DAC interface clock enable during sleep mode bit"] - pub fn set_dacsmen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "2C3 clock enable during Sleep mode bit"] - pub const fn i2c3smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "2C3 clock enable during Sleep mode bit"] - pub fn set_i2c3smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "Low power timer clock enable during sleep mode bit"] - pub const fn lptim1smen(&self) -> super::vals::Lptimsmen { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Lptimsmen(val as u8) - } - #[doc = "Low power timer clock enable during sleep mode bit"] - pub fn set_lptim1smen(&mut self, val: super::vals::Lptimsmen) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Apb1smenr { - fn default() -> Apb1smenr { - Apb1smenr(0) - } - } - #[doc = "Clock configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr(pub u32); - impl Cfgr { - #[doc = "System clock switch"] - pub const fn sw(&self) -> super::vals::Sw { - let val = (self.0 >> 0usize) & 0x03; - super::vals::Sw(val as u8) - } - #[doc = "System clock switch"] - pub fn set_sw(&mut self, val: super::vals::Sw) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val.0 as u32) & 0x03) << 0usize); - } - #[doc = "System clock switch status"] - pub const fn sws(&self) -> super::vals::Sws { - let val = (self.0 >> 2usize) & 0x03; - super::vals::Sws(val as u8) - } - #[doc = "System clock switch status"] - pub fn set_sws(&mut self, val: super::vals::Sws) { - self.0 = (self.0 & !(0x03 << 2usize)) | (((val.0 as u32) & 0x03) << 2usize); - } - #[doc = "AHB prescaler"] - pub const fn hpre(&self) -> super::vals::Hpre { - let val = (self.0 >> 4usize) & 0x0f; - super::vals::Hpre(val as u8) - } - #[doc = "AHB prescaler"] - pub fn set_hpre(&mut self, val: super::vals::Hpre) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val.0 as u32) & 0x0f) << 4usize); - } - #[doc = "APB low-speed prescaler (APB1)"] - pub fn ppre(&self, n: usize) -> super::vals::Ppre { - assert!(n < 2usize); - let offs = 8usize + n * 3usize; - let val = (self.0 >> offs) & 0x07; - super::vals::Ppre(val as u8) - } - #[doc = "APB low-speed prescaler (APB1)"] - pub fn set_ppre(&mut self, n: usize, val: super::vals::Ppre) { - assert!(n < 2usize); - let offs = 8usize + n * 3usize; - self.0 = (self.0 & !(0x07 << offs)) | (((val.0 as u32) & 0x07) << offs); - } - #[doc = "Wake-up from stop clock selection"] - pub const fn stopwuck(&self) -> super::vals::Stopwuck { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Stopwuck(val as u8) - } - #[doc = "Wake-up from stop clock selection"] - pub fn set_stopwuck(&mut self, val: super::vals::Stopwuck) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "PLL entry clock source"] - pub const fn pllsrc(&self) -> super::vals::Pllsrc { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Pllsrc(val as u8) - } - #[doc = "PLL entry clock source"] - pub fn set_pllsrc(&mut self, val: super::vals::Pllsrc) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "PLL multiplication factor"] - pub const fn pllmul(&self) -> super::vals::Pllmul { - let val = (self.0 >> 18usize) & 0x0f; - super::vals::Pllmul(val as u8) - } - #[doc = "PLL multiplication factor"] - pub fn set_pllmul(&mut self, val: super::vals::Pllmul) { - self.0 = (self.0 & !(0x0f << 18usize)) | (((val.0 as u32) & 0x0f) << 18usize); - } - #[doc = "PLL output division"] - pub const fn plldiv(&self) -> super::vals::Plldiv { - let val = (self.0 >> 22usize) & 0x03; - super::vals::Plldiv(val as u8) - } - #[doc = "PLL output division"] - pub fn set_plldiv(&mut self, val: super::vals::Plldiv) { - self.0 = (self.0 & !(0x03 << 22usize)) | (((val.0 as u32) & 0x03) << 22usize); - } - #[doc = "Microcontroller clock output selection"] - pub const fn mcosel(&self) -> super::vals::Mcosel { - let val = (self.0 >> 24usize) & 0x0f; - super::vals::Mcosel(val as u8) - } - #[doc = "Microcontroller clock output selection"] - pub fn set_mcosel(&mut self, val: super::vals::Mcosel) { - self.0 = (self.0 & !(0x0f << 24usize)) | (((val.0 as u32) & 0x0f) << 24usize); - } - #[doc = "Microcontroller clock output prescaler"] - pub const fn mcopre(&self) -> super::vals::Mcopre { - let val = (self.0 >> 28usize) & 0x07; - super::vals::Mcopre(val as u8) - } - #[doc = "Microcontroller clock output prescaler"] - pub fn set_mcopre(&mut self, val: super::vals::Mcopre) { - self.0 = (self.0 & !(0x07 << 28usize)) | (((val.0 as u32) & 0x07) << 28usize); - } - } - impl Default for Cfgr { - fn default() -> Cfgr { - Cfgr(0) - } - } - #[doc = "APB1 peripheral clock enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1enr(pub u32); - impl Apb1enr { - #[doc = "Timer2 clock enable bit"] - pub const fn tim2en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "Timer2 clock enable bit"] - pub fn set_tim2en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Timer3 clock enable bit"] - pub const fn tim3en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "Timer3 clock enable bit"] - pub fn set_tim3en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Timer 6 clock enable bit"] - pub const fn tim6en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "Timer 6 clock enable bit"] - pub fn set_tim6en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Timer 7 clock enable bit"] - pub const fn tim7en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "Timer 7 clock enable bit"] - pub fn set_tim7en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Window watchdog clock enable bit"] - pub const fn wwdgen(&self) -> super::vals::Lptimen { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "Window watchdog clock enable bit"] - pub fn set_wwdgen(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "SPI2 clock enable bit"] - pub const fn spi2en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "SPI2 clock enable bit"] - pub fn set_spi2en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "UART2 clock enable bit"] - pub const fn usart2en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "UART2 clock enable bit"] - pub fn set_usart2en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "LPUART1 clock enable bit"] - pub const fn lpuart1en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "LPUART1 clock enable bit"] - pub fn set_lpuart1en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "USART4 clock enable bit"] - pub const fn usart4en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "USART4 clock enable bit"] - pub fn set_usart4en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "USART5 clock enable bit"] - pub const fn usart5en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "USART5 clock enable bit"] - pub fn set_usart5en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "I2C1 clock enable bit"] - pub const fn i2c1en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "I2C1 clock enable bit"] - pub fn set_i2c1en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 clock enable bit"] - pub const fn i2c2en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "I2C2 clock enable bit"] - pub fn set_i2c2en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "USB clock enable bit"] - pub const fn usben(&self) -> super::vals::Lptimen { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "USB clock enable bit"] - pub fn set_usben(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "Clock recovery system clock enable bit"] - pub const fn crsen(&self) -> super::vals::Lptimen { - let val = (self.0 >> 27usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "Clock recovery system clock enable bit"] - pub fn set_crsen(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "Power interface clock enable bit"] - pub const fn pwren(&self) -> super::vals::Lptimen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "Power interface clock enable bit"] - pub fn set_pwren(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "DAC interface clock enable bit"] - pub const fn dacen(&self) -> super::vals::Lptimen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "DAC interface clock enable bit"] - pub fn set_dacen(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "I2C3 clock enable bit"] - pub const fn i2c3en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "I2C3 clock enable bit"] - pub fn set_i2c3en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "Low power timer clock enable bit"] - pub const fn lptim1en(&self) -> super::vals::Lptimen { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Lptimen(val as u8) - } - #[doc = "Low power timer clock enable bit"] - pub fn set_lptim1en(&mut self, val: super::vals::Lptimen) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Apb1enr { - fn default() -> Apb1enr { - Apb1enr(0) - } - } - #[doc = "Clock interrupt enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cier(pub u32); - impl Cier { - #[doc = "LSI ready interrupt flag"] - pub const fn lsirdyie(&self) -> super::vals::Hsirdyie { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Hsirdyie(val as u8) - } - #[doc = "LSI ready interrupt flag"] - pub fn set_lsirdyie(&mut self, val: super::vals::Hsirdyie) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "LSE ready interrupt flag"] - pub const fn lserdyie(&self) -> super::vals::Hsirdyie { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Hsirdyie(val as u8) - } - #[doc = "LSE ready interrupt flag"] - pub fn set_lserdyie(&mut self, val: super::vals::Hsirdyie) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "HSI16 ready interrupt flag"] - pub const fn hsi16rdyie(&self) -> super::vals::Hsirdyie { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Hsirdyie(val as u8) - } - #[doc = "HSI16 ready interrupt flag"] - pub fn set_hsi16rdyie(&mut self, val: super::vals::Hsirdyie) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "HSE ready interrupt flag"] - pub const fn hserdyie(&self) -> super::vals::Hsirdyie { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Hsirdyie(val as u8) - } - #[doc = "HSE ready interrupt flag"] - pub fn set_hserdyie(&mut self, val: super::vals::Hsirdyie) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "PLL ready interrupt flag"] - pub const fn pllrdyie(&self) -> super::vals::Hsirdyie { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Hsirdyie(val as u8) - } - #[doc = "PLL ready interrupt flag"] - pub fn set_pllrdyie(&mut self, val: super::vals::Hsirdyie) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "MSI ready interrupt flag"] - pub const fn msirdyie(&self) -> super::vals::Hsirdyie { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Hsirdyie(val as u8) - } - #[doc = "MSI ready interrupt flag"] - pub fn set_msirdyie(&mut self, val: super::vals::Hsirdyie) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "HSI48 ready interrupt flag"] - pub const fn hsi48rdyie(&self) -> super::vals::Hsirdyie { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Hsirdyie(val as u8) - } - #[doc = "HSI48 ready interrupt flag"] - pub fn set_hsi48rdyie(&mut self, val: super::vals::Hsirdyie) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "LSE CSS interrupt flag"] - pub const fn csslse(&self) -> super::vals::Csslse { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Csslse(val as u8) - } - #[doc = "LSE CSS interrupt flag"] - pub fn set_csslse(&mut self, val: super::vals::Csslse) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - } - impl Default for Cier { - fn default() -> Cier { - Cier(0) - } - } - #[doc = "Clock configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ccipr(pub u32); - impl Ccipr { - #[doc = "USART1 clock source selection bits"] - pub const fn usart1sel(&self) -> super::vals::Lpuartsel { - let val = (self.0 >> 0usize) & 0x03; - super::vals::Lpuartsel(val as u8) - } - #[doc = "USART1 clock source selection bits"] - pub fn set_usart1sel(&mut self, val: super::vals::Lpuartsel) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val.0 as u32) & 0x03) << 0usize); - } - #[doc = "USART2 clock source selection bits"] - pub const fn usart2sel(&self) -> super::vals::Lpuartsel { - let val = (self.0 >> 2usize) & 0x03; - super::vals::Lpuartsel(val as u8) - } - #[doc = "USART2 clock source selection bits"] - pub fn set_usart2sel(&mut self, val: super::vals::Lpuartsel) { - self.0 = (self.0 & !(0x03 << 2usize)) | (((val.0 as u32) & 0x03) << 2usize); - } - #[doc = "LPUART1 clock source selection bits"] - pub const fn lpuart1sel(&self) -> super::vals::Lpuartsel { - let val = (self.0 >> 10usize) & 0x03; - super::vals::Lpuartsel(val as u8) - } - #[doc = "LPUART1 clock source selection bits"] - pub fn set_lpuart1sel(&mut self, val: super::vals::Lpuartsel) { - self.0 = (self.0 & !(0x03 << 10usize)) | (((val.0 as u32) & 0x03) << 10usize); - } - #[doc = "I2C1 clock source selection bits"] - pub const fn i2c1sel(&self) -> super::vals::Icsel { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Icsel(val as u8) - } - #[doc = "I2C1 clock source selection bits"] - pub fn set_i2c1sel(&mut self, val: super::vals::Icsel) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "I2C3 clock source selection bits"] - pub const fn i2c3sel(&self) -> super::vals::Icsel { - let val = (self.0 >> 16usize) & 0x03; - super::vals::Icsel(val as u8) - } - #[doc = "I2C3 clock source selection bits"] - pub fn set_i2c3sel(&mut self, val: super::vals::Icsel) { - self.0 = (self.0 & !(0x03 << 16usize)) | (((val.0 as u32) & 0x03) << 16usize); - } - #[doc = "Low Power Timer clock source selection bits"] - pub const fn lptim1sel(&self) -> super::vals::Lptimsel { - let val = (self.0 >> 18usize) & 0x03; - super::vals::Lptimsel(val as u8) - } - #[doc = "Low Power Timer clock source selection bits"] - pub fn set_lptim1sel(&mut self, val: super::vals::Lptimsel) { - self.0 = (self.0 & !(0x03 << 18usize)) | (((val.0 as u32) & 0x03) << 18usize); - } - #[doc = "48 MHz HSI48 clock source selection bit"] - pub const fn hsi48msel(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "48 MHz HSI48 clock source selection bit"] - pub fn set_hsi48msel(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - } - impl Default for Ccipr { - fn default() -> Ccipr { - Ccipr(0) - } - } - #[doc = "AHB peripheral clock enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahbenr(pub u32); - impl Ahbenr { - #[doc = "DMA clock enable bit"] - pub const fn dmaen(&self) -> super::vals::Crypen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Crypen(val as u8) - } - #[doc = "DMA clock enable bit"] - pub fn set_dmaen(&mut self, val: super::vals::Crypen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "NVM interface clock enable bit"] - pub const fn mifen(&self) -> super::vals::Crypen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Crypen(val as u8) - } - #[doc = "NVM interface clock enable bit"] - pub fn set_mifen(&mut self, val: super::vals::Crypen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "CRC clock enable bit"] - pub const fn crcen(&self) -> super::vals::Crypen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Crypen(val as u8) - } - #[doc = "CRC clock enable bit"] - pub fn set_crcen(&mut self, val: super::vals::Crypen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Touch Sensing clock enable bit"] - pub const fn touchen(&self) -> super::vals::Crypen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Crypen(val as u8) - } - #[doc = "Touch Sensing clock enable bit"] - pub fn set_touchen(&mut self, val: super::vals::Crypen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "Random Number Generator clock enable bit"] - pub const fn rngen(&self) -> super::vals::Crypen { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Crypen(val as u8) - } - #[doc = "Random Number Generator clock enable bit"] - pub fn set_rngen(&mut self, val: super::vals::Crypen) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "Crypto clock enable bit"] - pub const fn crypen(&self) -> super::vals::Crypen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Crypen(val as u8) - } - #[doc = "Crypto clock enable bit"] - pub fn set_crypen(&mut self, val: super::vals::Crypen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - } - impl Default for Ahbenr { - fn default() -> Ahbenr { - Ahbenr(0) - } - } - #[doc = "APB2 peripheral clock enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb2enr(pub u32); - impl Apb2enr { - #[doc = "System configuration controller clock enable bit"] - pub const fn syscfgen(&self) -> super::vals::Dbgen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Dbgen(val as u8) - } - #[doc = "System configuration controller clock enable bit"] - pub fn set_syscfgen(&mut self, val: super::vals::Dbgen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM21 timer clock enable bit"] - pub const fn tim21en(&self) -> super::vals::Dbgen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Dbgen(val as u8) - } - #[doc = "TIM21 timer clock enable bit"] - pub fn set_tim21en(&mut self, val: super::vals::Dbgen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "TIM22 timer clock enable bit"] - pub const fn tim22en(&self) -> super::vals::Dbgen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Dbgen(val as u8) - } - #[doc = "TIM22 timer clock enable bit"] - pub fn set_tim22en(&mut self, val: super::vals::Dbgen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "MiFaRe Firewall clock enable bit"] - pub const fn mifien(&self) -> super::vals::Dbgen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Dbgen(val as u8) - } - #[doc = "MiFaRe Firewall clock enable bit"] - pub fn set_mifien(&mut self, val: super::vals::Dbgen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "ADC clock enable bit"] - pub const fn adcen(&self) -> super::vals::Dbgen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Dbgen(val as u8) - } - #[doc = "ADC clock enable bit"] - pub fn set_adcen(&mut self, val: super::vals::Dbgen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SPI1 clock enable bit"] - pub const fn spi1en(&self) -> super::vals::Dbgen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Dbgen(val as u8) - } - #[doc = "SPI1 clock enable bit"] - pub fn set_spi1en(&mut self, val: super::vals::Dbgen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "USART1 clock enable bit"] - pub const fn usart1en(&self) -> super::vals::Dbgen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Dbgen(val as u8) - } - #[doc = "USART1 clock enable bit"] - pub fn set_usart1en(&mut self, val: super::vals::Dbgen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "DBG clock enable bit"] - pub const fn dbgen(&self) -> super::vals::Dbgen { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Dbgen(val as u8) - } - #[doc = "DBG clock enable bit"] - pub fn set_dbgen(&mut self, val: super::vals::Dbgen) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - } - impl Default for Apb2enr { - fn default() -> Apb2enr { - Apb2enr(0) - } - } - #[doc = "Clock interrupt clear register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cicr(pub u32); - impl Cicr { - #[doc = "LSI ready Interrupt clear"] - pub const fn lsirdyc(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "LSI ready Interrupt clear"] - pub fn set_lsirdyc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "LSE ready Interrupt clear"] - pub const fn lserdyc(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "LSE ready Interrupt clear"] - pub fn set_lserdyc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "HSI16 ready Interrupt clear"] - pub const fn hsi16rdyc(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "HSI16 ready Interrupt clear"] - pub fn set_hsi16rdyc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "HSE ready Interrupt clear"] - pub const fn hserdyc(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "HSE ready Interrupt clear"] - pub fn set_hserdyc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "PLL ready Interrupt clear"] - pub const fn pllrdyc(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "PLL ready Interrupt clear"] - pub fn set_pllrdyc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "MSI ready Interrupt clear"] - pub const fn msirdyc(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "MSI ready Interrupt clear"] - pub fn set_msirdyc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "HSI48 ready Interrupt clear"] - pub const fn hsi48rdyc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "HSI48 ready Interrupt clear"] - pub fn set_hsi48rdyc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "LSE Clock Security System Interrupt clear"] - pub const fn csslsec(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "LSE Clock Security System Interrupt clear"] - pub fn set_csslsec(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Clock Security System Interrupt clear"] - pub const fn csshsec(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Clock Security System Interrupt clear"] - pub fn set_csshsec(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Cicr { - fn default() -> Cicr { - Cicr(0) - } - } - #[doc = "GPIO reset register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ioprstr(pub u32); - impl Ioprstr { - #[doc = "I/O port A reset"] - pub const fn ioparst(&self) -> super::vals::Iophrst { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Iophrst(val as u8) - } - #[doc = "I/O port A reset"] - pub fn set_ioparst(&mut self, val: super::vals::Iophrst) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "I/O port B reset"] - pub const fn iopbrst(&self) -> super::vals::Iophrst { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Iophrst(val as u8) - } - #[doc = "I/O port B reset"] - pub fn set_iopbrst(&mut self, val: super::vals::Iophrst) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "I/O port A reset"] - pub const fn iopcrst(&self) -> super::vals::Iophrst { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Iophrst(val as u8) - } - #[doc = "I/O port A reset"] - pub fn set_iopcrst(&mut self, val: super::vals::Iophrst) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "I/O port D reset"] - pub const fn iopdrst(&self) -> super::vals::Iophrst { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Iophrst(val as u8) - } - #[doc = "I/O port D reset"] - pub fn set_iopdrst(&mut self, val: super::vals::Iophrst) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "I/O port E reset"] - pub const fn ioperst(&self) -> super::vals::Iophrst { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Iophrst(val as u8) - } - #[doc = "I/O port E reset"] - pub fn set_ioperst(&mut self, val: super::vals::Iophrst) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "I/O port H reset"] - pub const fn iophrst(&self) -> super::vals::Iophrst { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Iophrst(val as u8) - } - #[doc = "I/O port H reset"] - pub fn set_iophrst(&mut self, val: super::vals::Iophrst) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - } - impl Default for Ioprstr { - fn default() -> Ioprstr { - Ioprstr(0) - } - } - #[doc = "Control and status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Csr(pub u32); - impl Csr { - #[doc = "Internal low-speed oscillator enable"] - pub const fn lsion(&self) -> super::vals::Csslseon { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Csslseon(val as u8) - } - #[doc = "Internal low-speed oscillator enable"] - pub fn set_lsion(&mut self, val: super::vals::Csslseon) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Internal low-speed oscillator ready bit"] - pub const fn lsirdy(&self) -> super::vals::Lserdy { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Lserdy(val as u8) - } - #[doc = "Internal low-speed oscillator ready bit"] - pub fn set_lsirdy(&mut self, val: super::vals::Lserdy) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "External low-speed oscillator enable bit"] - pub const fn lseon(&self) -> super::vals::Csslseon { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Csslseon(val as u8) - } - #[doc = "External low-speed oscillator enable bit"] - pub fn set_lseon(&mut self, val: super::vals::Csslseon) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "External low-speed oscillator ready bit"] - pub const fn lserdy(&self) -> super::vals::Lserdy { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Lserdy(val as u8) - } - #[doc = "External low-speed oscillator ready bit"] - pub fn set_lserdy(&mut self, val: super::vals::Lserdy) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "External low-speed oscillator bypass bit"] - pub const fn lsebyp(&self) -> super::vals::Lsebyp { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Lsebyp(val as u8) - } - #[doc = "External low-speed oscillator bypass bit"] - pub fn set_lsebyp(&mut self, val: super::vals::Lsebyp) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "LSEDRV"] - pub const fn lsedrv(&self) -> super::vals::Lsedrv { - let val = (self.0 >> 11usize) & 0x03; - super::vals::Lsedrv(val as u8) - } - #[doc = "LSEDRV"] - pub fn set_lsedrv(&mut self, val: super::vals::Lsedrv) { - self.0 = (self.0 & !(0x03 << 11usize)) | (((val.0 as u32) & 0x03) << 11usize); - } - #[doc = "CSSLSEON"] - pub const fn csslseon(&self) -> super::vals::Csslseon { - let val = (self.0 >> 13usize) & 0x01; - super::vals::Csslseon(val as u8) - } - #[doc = "CSSLSEON"] - pub fn set_csslseon(&mut self, val: super::vals::Csslseon) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "CSS on LSE failure detection flag"] - pub const fn csslsed(&self) -> super::vals::Csslsed { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Csslsed(val as u8) - } - #[doc = "CSS on LSE failure detection flag"] - pub fn set_csslsed(&mut self, val: super::vals::Csslsed) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "RTC and LCD clock source selection bits"] - pub const fn rtcsel(&self) -> super::vals::Rtcsel { - let val = (self.0 >> 16usize) & 0x03; - super::vals::Rtcsel(val as u8) - } - #[doc = "RTC and LCD clock source selection bits"] - pub fn set_rtcsel(&mut self, val: super::vals::Rtcsel) { - self.0 = (self.0 & !(0x03 << 16usize)) | (((val.0 as u32) & 0x03) << 16usize); - } - #[doc = "RTC clock enable bit"] - pub const fn rtcen(&self) -> super::vals::Rtcen { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Rtcen(val as u8) - } - #[doc = "RTC clock enable bit"] - pub fn set_rtcen(&mut self, val: super::vals::Rtcen) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "RTC software reset bit"] - pub const fn rtcrst(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "RTC software reset bit"] - pub fn set_rtcrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "Remove reset flag"] - pub const fn rmvf(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "Remove reset flag"] - pub fn set_rmvf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "OBLRSTF"] - pub const fn oblrstf(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "OBLRSTF"] - pub fn set_oblrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "PIN reset flag"] - pub const fn pinrstf(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "PIN reset flag"] - pub fn set_pinrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "POR/PDR reset flag"] - pub const fn porrstf(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "POR/PDR reset flag"] - pub fn set_porrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - #[doc = "Software reset flag"] - pub const fn sftrstf(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "Software reset flag"] - pub fn set_sftrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - #[doc = "Independent watchdog reset flag"] - pub const fn iwdgrstf(&self) -> bool { - let val = (self.0 >> 29usize) & 0x01; - val != 0 - } - #[doc = "Independent watchdog reset flag"] - pub fn set_iwdgrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); - } - #[doc = "Window watchdog reset flag"] - pub const fn wwdgrstf(&self) -> bool { - let val = (self.0 >> 30usize) & 0x01; - val != 0 - } - #[doc = "Window watchdog reset flag"] - pub fn set_wwdgrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); - } - #[doc = "Low-power reset flag"] - pub const fn lpwrrstf(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Low-power reset flag"] - pub fn set_lpwrrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for Csr { - fn default() -> Csr { - Csr(0) - } - } - #[doc = "APB1 peripheral reset register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1rstr(pub u32); - impl Apb1rstr { - #[doc = "Timer2 reset"] - pub const fn tim2rst(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Timer2 reset"] - pub fn set_tim2rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Timer3 reset"] - pub const fn tim3rst(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Timer3 reset"] - pub fn set_tim3rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Timer 6 reset"] - pub const fn tim6rst(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Timer 6 reset"] - pub fn set_tim6rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Timer 7 reset"] - pub const fn tim7rst(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Timer 7 reset"] - pub fn set_tim7rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Window watchdog reset"] - pub const fn wwdrst(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Window watchdog reset"] - pub fn set_wwdrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "SPI2 reset"] - pub const fn spi2rst(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "SPI2 reset"] - pub fn set_spi2rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "UART2 reset"] - pub const fn lpuart12rst(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "UART2 reset"] - pub fn set_lpuart12rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "LPUART1 reset"] - pub const fn lpuart1rst(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "LPUART1 reset"] - pub fn set_lpuart1rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "USART4 reset"] - pub const fn usart4rst(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "USART4 reset"] - pub fn set_usart4rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "USART5 reset"] - pub const fn usart5rst(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "USART5 reset"] - pub fn set_usart5rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "I2C1 reset"] - pub const fn i2c1rst(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "I2C1 reset"] - pub fn set_i2c1rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 reset"] - pub const fn i2c2rst(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "I2C2 reset"] - pub fn set_i2c2rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "USB reset"] - pub const fn usbrst(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "USB reset"] - pub fn set_usbrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "Clock recovery system reset"] - pub const fn crsrst(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "Clock recovery system reset"] - pub fn set_crsrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - #[doc = "Power interface reset"] - pub const fn pwrrst(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "Power interface reset"] - pub fn set_pwrrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - #[doc = "DAC interface reset"] - pub const fn dacrst(&self) -> bool { - let val = (self.0 >> 29usize) & 0x01; - val != 0 - } - #[doc = "DAC interface reset"] - pub fn set_dacrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); - } - #[doc = "I2C3 reset"] - pub const fn i2c3rst(&self) -> bool { - let val = (self.0 >> 30usize) & 0x01; - val != 0 - } - #[doc = "I2C3 reset"] - pub fn set_i2c3rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); - } - #[doc = "Low power timer reset"] - pub const fn lptim1rst(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Low power timer reset"] - pub fn set_lptim1rst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for Apb1rstr { - fn default() -> Apb1rstr { - Apb1rstr(0) - } - } - #[doc = "APB2 peripheral clock enable in sleep mode register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb2smenr(pub u32); - impl Apb2smenr { - #[doc = "System configuration controller clock enable during sleep mode bit"] - pub const fn syscfgsmen(&self) -> super::vals::Dbgsmen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Dbgsmen(val as u8) - } - #[doc = "System configuration controller clock enable during sleep mode bit"] - pub fn set_syscfgsmen(&mut self, val: super::vals::Dbgsmen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM21 timer clock enable during sleep mode bit"] - pub const fn tim21smen(&self) -> super::vals::Dbgsmen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Dbgsmen(val as u8) - } - #[doc = "TIM21 timer clock enable during sleep mode bit"] - pub fn set_tim21smen(&mut self, val: super::vals::Dbgsmen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "TIM22 timer clock enable during sleep mode bit"] - pub const fn tim22smen(&self) -> super::vals::Dbgsmen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Dbgsmen(val as u8) - } - #[doc = "TIM22 timer clock enable during sleep mode bit"] - pub fn set_tim22smen(&mut self, val: super::vals::Dbgsmen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "ADC clock enable during sleep mode bit"] - pub const fn adcsmen(&self) -> super::vals::Dbgsmen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Dbgsmen(val as u8) - } - #[doc = "ADC clock enable during sleep mode bit"] - pub fn set_adcsmen(&mut self, val: super::vals::Dbgsmen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SPI1 clock enable during sleep mode bit"] - pub const fn spi1smen(&self) -> super::vals::Dbgsmen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Dbgsmen(val as u8) - } - #[doc = "SPI1 clock enable during sleep mode bit"] - pub fn set_spi1smen(&mut self, val: super::vals::Dbgsmen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "USART1 clock enable during sleep mode bit"] - pub const fn usart1smen(&self) -> super::vals::Dbgsmen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Dbgsmen(val as u8) - } - #[doc = "USART1 clock enable during sleep mode bit"] - pub fn set_usart1smen(&mut self, val: super::vals::Dbgsmen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "DBG clock enable during sleep mode bit"] - pub const fn dbgsmen(&self) -> super::vals::Dbgsmen { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Dbgsmen(val as u8) - } - #[doc = "DBG clock enable during sleep mode bit"] - pub fn set_dbgsmen(&mut self, val: super::vals::Dbgsmen) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - } - impl Default for Apb2smenr { - fn default() -> Apb2smenr { - Apb2smenr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rtcen(pub u8); - impl Rtcen { - #[doc = "RTC clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "RTC clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crypen(pub u8); - impl Crypen { - #[doc = "Clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Stopwuck(pub u8); - impl Stopwuck { - #[doc = "Internal 64 KHz to 4 MHz (MSI) oscillator selected as wake-up from Stop clock"] - pub const MSI: Self = Self(0); - #[doc = "Internal 16 MHz (HSI) oscillator selected as wake-up from Stop clock (or HSI16/4 if HSI16DIVEN=1)"] - pub const HSI16: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsedrv(pub u8); - impl Lsedrv { - #[doc = "Lowest drive"] - pub const LOW: Self = Self(0); - #[doc = "Medium low drive"] - pub const MEDIUMLOW: Self = Self(0x01); - #[doc = "Medium high drive"] - pub const MEDIUMHIGH: Self = Self(0x02); - #[doc = "Highest drive"] - pub const HIGH: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lpwrrstfr(pub u8); - impl Lpwrrstfr { - #[doc = "No reset has occured"] - pub const NORESET: Self = Self(0); - #[doc = "A reset has occured"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pllmul(pub u8); - impl Pllmul { - #[doc = "PLL clock entry x 3"] - pub const MUL3: Self = Self(0); - #[doc = "PLL clock entry x 4"] - pub const MUL4: Self = Self(0x01); - #[doc = "PLL clock entry x 6"] - pub const MUL6: Self = Self(0x02); - #[doc = "PLL clock entry x 8"] - pub const MUL8: Self = Self(0x03); - #[doc = "PLL clock entry x 12"] - pub const MUL12: Self = Self(0x04); - #[doc = "PLL clock entry x 16"] - pub const MUL16: Self = Self(0x05); - #[doc = "PLL clock entry x 24"] - pub const MUL24: Self = Self(0x06); - #[doc = "PLL clock entry x 32"] - pub const MUL32: Self = Self(0x07); - #[doc = "PLL clock entry x 48"] - pub const MUL48: Self = Self(0x08); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsirdyie(pub u8); - impl Hsirdyie { - #[doc = "Ready interrupt disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Ready interrupt enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lptimen(pub u8); - impl Lptimen { - #[doc = "Clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hpre(pub u8); - impl Hpre { - #[doc = "system clock not divided"] - pub const DIV1: Self = Self(0); - #[doc = "system clock divided by 2"] - pub const DIV2: Self = Self(0x08); - #[doc = "system clock divided by 4"] - pub const DIV4: Self = Self(0x09); - #[doc = "system clock divided by 8"] - pub const DIV8: Self = Self(0x0a); - #[doc = "system clock divided by 16"] - pub const DIV16: Self = Self(0x0b); - #[doc = "system clock divided by 64"] - pub const DIV64: Self = Self(0x0c); - #[doc = "system clock divided by 128"] - pub const DIV128: Self = Self(0x0d); - #[doc = "system clock divided by 256"] - pub const DIV256: Self = Self(0x0e); - #[doc = "system clock divided by 512"] - pub const DIV512: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Csshsecw(pub u8); - impl Csshsecw { - #[doc = "Clear interrupt flag"] - pub const CLEAR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cryprstw(pub u8); - impl Cryprstw { - #[doc = "Reset the module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sws(pub u8); - impl Sws { - #[doc = "MSI oscillator used as system clock"] - pub const MSI: Self = Self(0); - #[doc = "HSI oscillator used as system clock"] - pub const HSI16: Self = Self(0x01); - #[doc = "HSE oscillator used as system clock"] - pub const HSE: Self = Self(0x02); - #[doc = "PLL used as system clock"] - pub const PLL: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsebyp(pub u8); - impl Lsebyp { - #[doc = "LSE oscillator not bypassed"] - pub const NOTBYPASSED: Self = Self(0); - #[doc = "LSE oscillator bypassed"] - pub const BYPASSED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sramsmen(pub u8); - impl Sramsmen { - #[doc = "NVM interface clock disabled in Sleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "NVM interface clock enabled in Sleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsi16rdyfr(pub u8); - impl Hsi16rdyfr { - #[doc = "HSI 16 MHz oscillator not ready"] - pub const NOTREADY: Self = Self(0); - #[doc = "HSI 16 MHz oscillator ready"] - pub const READY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsebyp(pub u8); - impl Hsebyp { - #[doc = "HSE oscillator not bypassed"] - pub const NOTBYPASSED: Self = Self(0); - #[doc = "HSE oscillator bypassed"] - pub const BYPASSED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crypsmen(pub u8); - impl Crypsmen { - #[doc = "Crypto clock disabled in Sleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "Crypto clock enabled in Sleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pllrdyr(pub u8); - impl Pllrdyr { - #[doc = "PLL unlocked"] - pub const UNLOCKED: Self = Self(0); - #[doc = "PLL locked"] - pub const LOCKED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pllon(pub u8); - impl Pllon { - #[doc = "Clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Csshsef(pub u8); - impl Csshsef { - #[doc = "No clock security interrupt caused by HSE clock failure"] - pub const NOCLOCK: Self = Self(0); - #[doc = "Clock security interrupt caused by HSE clock failure"] - pub const CLOCK: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lptimrstw(pub u8); - impl Lptimrstw { - #[doc = "Reset the module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Msirange(pub u8); - impl Msirange { - #[doc = "range 0 around 65.536 kHz"] - pub const RANGE0: Self = Self(0); - #[doc = "range 1 around 131.072 kHz"] - pub const RANGE1: Self = Self(0x01); - #[doc = "range 2 around 262.144 kHz"] - pub const RANGE2: Self = Self(0x02); - #[doc = "range 3 around 524.288 kHz"] - pub const RANGE3: Self = Self(0x03); - #[doc = "range 4 around 1.048 MHz"] - pub const RANGE4: Self = Self(0x04); - #[doc = "range 5 around 2.097 MHz (reset value)"] - pub const RANGE5: Self = Self(0x05); - #[doc = "range 6 around 4.194 MHz"] - pub const RANGE6: Self = Self(0x06); - #[doc = "not allowed"] - pub const RANGE7: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Plldiv(pub u8); - impl Plldiv { - #[doc = "PLLVCO / 2"] - pub const DIV2: Self = Self(0x01); - #[doc = "PLLVCO / 3"] - pub const DIV3: Self = Self(0x02); - #[doc = "PLLVCO / 4"] - pub const DIV4: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rtcsel(pub u8); - impl Rtcsel { - #[doc = "No clock"] - pub const NOCLOCK: Self = Self(0); - #[doc = "LSE oscillator clock used as RTC clock"] - pub const LSE: Self = Self(0x01); - #[doc = "LSI oscillator clock used as RTC clock"] - pub const LSI: Self = Self(0x02); - #[doc = "HSE oscillator clock divided by a programmable prescaler (selection through the RTCPRE[1:0] -bits in the RCC clock control register (RCC_CR)) used as the RTC clock"] - pub const HSE: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dbgrstw(pub u8); - impl Dbgrstw { - #[doc = "Reset the module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hserdyr(pub u8); - impl Hserdyr { - #[doc = "Oscillator is not stable"] - pub const NOTREADY: Self = Self(0); - #[doc = "Oscillator is stable"] - pub const READY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Csslseon(pub u8); - impl Csslseon { - #[doc = "Oscillator OFF"] - pub const OFF: Self = Self(0); - #[doc = "Oscillator ON"] - pub const ON: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Iophen(pub u8); - impl Iophen { - #[doc = "Port clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Port clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sw(pub u8); - impl Sw { - #[doc = "MSI oscillator used as system clock"] - pub const MSI: Self = Self(0); - #[doc = "HSI oscillator used as system clock"] - pub const HSI16: Self = Self(0x01); - #[doc = "HSE oscillator used as system clock"] - pub const HSE: Self = Self(0x02); - #[doc = "PLL used as system clock"] - pub const PLL: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Iophrst(pub u8); - impl Iophrst { - #[doc = "Reset I/O port"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Icsel(pub u8); - impl Icsel { - #[doc = "APB clock selected as peripheral clock"] - pub const APB: Self = Self(0); - #[doc = "System clock selected as peripheral clock"] - pub const SYSTEM: Self = Self(0x01); - #[doc = "HSI16 clock selected as peripheral clock"] - pub const HSI16: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rtcrstw(pub u8); - impl Rtcrstw { - #[doc = "Resets the RTC peripheral"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mcopre(pub u8); - impl Mcopre { - #[doc = "No division"] - pub const DIV1: Self = Self(0); - #[doc = "Division by 2"] - pub const DIV2: Self = Self(0x01); - #[doc = "Division by 4"] - pub const DIV4: Self = Self(0x02); - #[doc = "Division by 8"] - pub const DIV8: Self = Self(0x03); - #[doc = "Division by 16"] - pub const DIV16: Self = Self(0x04); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dbgen(pub u8); - impl Dbgen { - #[doc = "Clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsidiven(pub u8); - impl Hsidiven { - #[doc = "no 16 MHz HSI division requested"] - pub const NOTDIVIDED: Self = Self(0); - #[doc = "16 MHz HSI division by 4 requested"] - pub const DIV4: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Csslsed(pub u8); - impl Csslsed { - #[doc = "No failure detected on LSE (32 kHz oscillator)"] - pub const NOFAILURE: Self = Self(0); - #[doc = "Failure detected on LSE (32 kHz oscillator)"] - pub const FAILURE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsiouten(pub u8); - impl Hsiouten { - #[doc = "HSI output clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "HSI output clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rmvfw(pub u8); - impl Rmvfw { - #[doc = "Clears the reset flag"] - pub const CLEAR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crcsmen(pub u8); - impl Crcsmen { - #[doc = "Test integration module clock disabled in Sleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "Test integration module clock enabled in Sleep mode (if enabled by CRCEN)"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Csslsef(pub u8); - impl Csslsef { - #[doc = "No failure detected on LSE clock failure"] - pub const NOFAILURE: Self = Self(0); - #[doc = "Failure detected on LSE clock failure"] - pub const FAILURE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pllsrc(pub u8); - impl Pllsrc { - #[doc = "HSI selected as PLL input clock"] - pub const HSI16: Self = Self(0); - #[doc = "HSE selected as PLL input clock"] - pub const HSE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dmasmen(pub u8); - impl Dmasmen { - #[doc = "DMA clock disabled in Sleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "DMA clock enabled in Sleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsidivfr(pub u8); - impl Hsidivfr { - #[doc = "16 MHz HSI clock not divided"] - pub const NOTDIVIDED: Self = Self(0); - #[doc = "16 MHz HSI clock divided by 4"] - pub const DIV4: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lpuartsel(pub u8); - impl Lpuartsel { - #[doc = "APB clock selected as peripheral clock"] - pub const APB: Self = Self(0); - #[doc = "System clock selected as peripheral clock"] - pub const SYSTEM: Self = Self(0x01); - #[doc = "HSI16 clock selected as peripheral clock"] - pub const HSI16: Self = Self(0x02); - #[doc = "LSE clock selected as peripheral clock"] - pub const LSE: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Iophsmen(pub u8); - impl Iophsmen { - #[doc = "Port x clock is disabled in Sleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "Port x clock is enabled in Sleep mode (if enabled by IOPHEN)"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsi48rdyfr(pub u8); - impl Hsi48rdyfr { - #[doc = "No clock ready interrupt"] - pub const NOTINTERRUPTED: Self = Self(0); - #[doc = "Clock ready interrupt"] - pub const INTERRUPTED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ppre(pub u8); - impl Ppre { - #[doc = "HCLK not divided"] - pub const DIV1: Self = Self(0); - #[doc = "HCLK divided by 2"] - pub const DIV2: Self = Self(0x04); - #[doc = "HCLK divided by 4"] - pub const DIV4: Self = Self(0x05); - #[doc = "HCLK divided by 8"] - pub const DIV8: Self = Self(0x06); - #[doc = "HCLK divided by 16"] - pub const DIV16: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lptimsel(pub u8); - impl Lptimsel { - #[doc = "APB clock selected as Timer clock"] - pub const APB: Self = Self(0); - #[doc = "LSI clock selected as Timer clock"] - pub const LSI: Self = Self(0x01); - #[doc = "HSI16 clock selected as Timer clock"] - pub const HSI16: Self = Self(0x02); - #[doc = "LSE clock selected as Timer clock"] - pub const LSE: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rtcpre(pub u8); - impl Rtcpre { - #[doc = "HSE divided by 2"] - pub const DIV2: Self = Self(0); - #[doc = "HSE divided by 4"] - pub const DIV4: Self = Self(0x01); - #[doc = "HSE divided by 8"] - pub const DIV8: Self = Self(0x02); - #[doc = "HSE divided by 16"] - pub const DIV16: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Csslse(pub u8); - impl Csslse { - #[doc = "LSE CSS interrupt disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "LSE CSS interrupt enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lptimsmen(pub u8); - impl Lptimsmen { - #[doc = "Clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mifsmen(pub u8); - impl Mifsmen { - #[doc = "NVM interface clock disabled in Sleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "NVM interface clock enabled in Sleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dbgsmen(pub u8); - impl Dbgsmen { - #[doc = "Clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mcosel(pub u8); - impl Mcosel { - #[doc = "No clock"] - pub const NOCLOCK: Self = Self(0); - #[doc = "SYSCLK clock selected"] - pub const SYSCLK: Self = Self(0x01); - #[doc = "HSI oscillator clock selected"] - pub const HSI16: Self = Self(0x02); - #[doc = "MSI oscillator clock selected"] - pub const MSI: Self = Self(0x03); - #[doc = "HSE oscillator clock selected"] - pub const HSE: Self = Self(0x04); - #[doc = "PLL clock selected"] - pub const PLL: Self = Self(0x05); - #[doc = "LSI oscillator clock selected"] - pub const LSI: Self = Self(0x06); - #[doc = "LSE oscillator clock selected"] - pub const LSE: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lserdy(pub u8); - impl Lserdy { - #[doc = "Oscillator not ready"] - pub const NOTREADY: Self = Self(0); - #[doc = "Oscillator ready"] - pub const READY: Self = Self(0x01); - } - } -} -pub mod i2c_v2 { - use crate::generic::*; - #[doc = "Inter-integrated circuit"] - #[derive(Copy, Clone)] - pub struct I2c(pub *mut u8); - unsafe impl Send for I2c {} - unsafe impl Sync for I2c {} - impl I2c { - #[doc = "Control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Own address register 1"] - pub fn oar1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Own address register 2"] - pub fn oar2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Timing register"] - pub fn timingr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Status register 1"] - pub fn timeoutr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Interrupt and Status register"] - pub fn isr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "Interrupt clear register"] - pub fn icr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "PEC register"] - pub fn pecr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "Receive data register"] - pub fn rxdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "Transmit data register"] - pub fn txdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dir(pub u8); - impl Dir { - #[doc = "Write transfer, slave enters receiver mode"] - pub const WRITE: Self = Self(0); - #[doc = "Read transfer, slave enters transmitter mode"] - pub const READ: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Oamode(pub u8); - impl Oamode { - #[doc = "Own address 1 is a 7-bit address"] - pub const BIT7: Self = Self(0); - #[doc = "Own address 1 is a 10-bit address"] - pub const BIT10: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pecbyte(pub u8); - impl Pecbyte { - #[doc = "No PEC transfer"] - pub const NOPEC: Self = Self(0); - #[doc = "PEC transmission/reception is requested"] - pub const PEC: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Nack(pub u8); - impl Nack { - #[doc = "an ACK is sent after current received byte"] - pub const ACK: Self = Self(0); - #[doc = "a NACK is sent after current received byte"] - pub const NACK: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Oamsk(pub u8); - impl Oamsk { - #[doc = "No mask"] - pub const NOMASK: Self = Self(0); - #[doc = "OA2[1] -is masked and don’t care. Only OA2[7:2] -are compared"] - pub const MASK1: Self = Self(0x01); - #[doc = "OA2[2:1] -are masked and don’t care. Only OA2[7:3] -are compared"] - pub const MASK2: Self = Self(0x02); - #[doc = "OA2[3:1] -are masked and don’t care. Only OA2[7:4] -are compared"] - pub const MASK3: Self = Self(0x03); - #[doc = "OA2[4:1] -are masked and don’t care. Only OA2[7:5] -are compared"] - pub const MASK4: Self = Self(0x04); - #[doc = "OA2[5:1] -are masked and don’t care. Only OA2[7:6] -are compared"] - pub const MASK5: Self = Self(0x05); - #[doc = "OA2[6:1] -are masked and don’t care. Only OA2[7] -is compared."] - pub const MASK6: Self = Self(0x06); - #[doc = "OA2[7:1] -are masked and don’t care. No comparison is done, and all (except reserved) 7-bit received addresses are acknowledged"] - pub const MASK7: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Stop(pub u8); - impl Stop { - #[doc = "No Stop generation"] - pub const NOSTOP: Self = Self(0); - #[doc = "Stop generation after current byte transfer"] - pub const STOP: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Reload(pub u8); - impl Reload { - #[doc = "The transfer is completed after the NBYTES data transfer (STOP or RESTART will follow)"] - pub const COMPLETED: Self = Self(0); - #[doc = "The transfer is not completed after the NBYTES data transfer (NBYTES will be reloaded)"] - pub const NOTCOMPLETED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pecerr(pub u8); - impl Pecerr { - #[doc = "Received PEC does match with PEC register"] - pub const MATCH: Self = Self(0); - #[doc = "Received PEC does not match with PEC register"] - pub const NOMATCH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Autoend(pub u8); - impl Autoend { - #[doc = "Software end mode: TC flag is set when NBYTES data are transferred, stretching SCL low"] - pub const SOFTWARE: Self = Self(0); - #[doc = "Automatic end mode: a STOP condition is automatically sent when NBYTES data are transferred"] - pub const AUTOMATIC: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Start(pub u8); - impl Start { - #[doc = "No Start generation"] - pub const NOSTART: Self = Self(0); - #[doc = "Restart/Start generation"] - pub const START: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Headr(pub u8); - impl Headr { - #[doc = "The master sends the complete 10 bit slave address read sequence"] - pub const COMPLETE: Self = Self(0); - #[doc = "The master only sends the 1st 7 bits of the 10 bit address, followed by Read direction"] - pub const PARTIAL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct RdWrn(pub u8); - impl RdWrn { - #[doc = "Master requests a write transfer"] - pub const WRITE: Self = Self(0); - #[doc = "Master requests a read transfer"] - pub const READ: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dnf(pub u8); - impl Dnf { - #[doc = "Digital filter disabled"] - pub const NOFILTER: Self = Self(0); - #[doc = "Digital filter enabled and filtering capability up to 1 tI2CCLK"] - pub const FILTER1: Self = Self(0x01); - #[doc = "Digital filter enabled and filtering capability up to 2 tI2CCLK"] - pub const FILTER2: Self = Self(0x02); - #[doc = "Digital filter enabled and filtering capability up to 3 tI2CCLK"] - pub const FILTER3: Self = Self(0x03); - #[doc = "Digital filter enabled and filtering capability up to 4 tI2CCLK"] - pub const FILTER4: Self = Self(0x04); - #[doc = "Digital filter enabled and filtering capability up to 5 tI2CCLK"] - pub const FILTER5: Self = Self(0x05); - #[doc = "Digital filter enabled and filtering capability up to 6 tI2CCLK"] - pub const FILTER6: Self = Self(0x06); - #[doc = "Digital filter enabled and filtering capability up to 7 tI2CCLK"] - pub const FILTER7: Self = Self(0x07); - #[doc = "Digital filter enabled and filtering capability up to 8 tI2CCLK"] - pub const FILTER8: Self = Self(0x08); - #[doc = "Digital filter enabled and filtering capability up to 9 tI2CCLK"] - pub const FILTER9: Self = Self(0x09); - #[doc = "Digital filter enabled and filtering capability up to 10 tI2CCLK"] - pub const FILTER10: Self = Self(0x0a); - #[doc = "Digital filter enabled and filtering capability up to 11 tI2CCLK"] - pub const FILTER11: Self = Self(0x0b); - #[doc = "Digital filter enabled and filtering capability up to 12 tI2CCLK"] - pub const FILTER12: Self = Self(0x0c); - #[doc = "Digital filter enabled and filtering capability up to 13 tI2CCLK"] - pub const FILTER13: Self = Self(0x0d); - #[doc = "Digital filter enabled and filtering capability up to 14 tI2CCLK"] - pub const FILTER14: Self = Self(0x0e); - #[doc = "Digital filter enabled and filtering capability up to 15 tI2CCLK"] - pub const FILTER15: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Add(pub u8); - impl Add { - #[doc = "The master operates in 7-bit addressing mode"] - pub const BIT7: Self = Self(0); - #[doc = "The master operates in 10-bit addressing mode"] - pub const BIT10: Self = Self(0x01); - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Interrupt and Status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Isr(pub u32); - impl Isr { - #[doc = "Transmit data register empty (transmitters)"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Transmit data register empty (transmitters)"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Transmit interrupt status (transmitters)"] - pub const fn txis(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Transmit interrupt status (transmitters)"] - pub fn set_txis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Receive data register not empty (receivers)"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Receive data register not empty (receivers)"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Address matched (slave mode)"] - pub const fn addr(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Address matched (slave mode)"] - pub fn set_addr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Not acknowledge received flag"] - pub const fn nackf(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Not acknowledge received flag"] - pub fn set_nackf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Stop detection flag"] - pub const fn stopf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Stop detection flag"] - pub fn set_stopf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transfer Complete (master mode)"] - pub const fn tc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transfer Complete (master mode)"] - pub fn set_tc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Transfer Complete Reload"] - pub const fn tcr(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Transfer Complete Reload"] - pub fn set_tcr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Bus error"] - pub const fn berr(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Bus error"] - pub fn set_berr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Arbitration lost"] - pub const fn arlo(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Arbitration lost"] - pub fn set_arlo(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Overrun/Underrun (slave mode)"] - pub const fn ovr(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Overrun/Underrun (slave mode)"] - pub fn set_ovr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "PEC Error in reception"] - pub const fn pecerr(&self) -> super::vals::Pecerr { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Pecerr(val as u8) - } - #[doc = "PEC Error in reception"] - pub fn set_pecerr(&mut self, val: super::vals::Pecerr) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "Timeout or t_low detection flag"] - pub const fn timeout(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Timeout or t_low detection flag"] - pub fn set_timeout(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "SMBus alert"] - pub const fn alert(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "SMBus alert"] - pub fn set_alert(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Bus busy"] - pub const fn busy(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Bus busy"] - pub fn set_busy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "Transfer direction (Slave mode)"] - pub const fn dir(&self) -> super::vals::Dir { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Dir(val as u8) - } - #[doc = "Transfer direction (Slave mode)"] - pub fn set_dir(&mut self, val: super::vals::Dir) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "Address match code (Slave mode)"] - pub const fn addcode(&self) -> u8 { - let val = (self.0 >> 17usize) & 0x7f; - val as u8 - } - #[doc = "Address match code (Slave mode)"] - pub fn set_addcode(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 17usize)) | (((val as u32) & 0x7f) << 17usize); - } - } - impl Default for Isr { - fn default() -> Isr { - Isr(0) - } - } - #[doc = "Control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Peripheral enable"] - pub const fn pe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Peripheral enable"] - pub fn set_pe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "TX Interrupt enable"] - pub const fn txie(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "TX Interrupt enable"] - pub fn set_txie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "RX Interrupt enable"] - pub const fn rxie(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "RX Interrupt enable"] - pub fn set_rxie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Address match interrupt enable (slave only)"] - pub const fn addrie(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Address match interrupt enable (slave only)"] - pub fn set_addrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Not acknowledge received interrupt enable"] - pub const fn nackie(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Not acknowledge received interrupt enable"] - pub fn set_nackie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "STOP detection Interrupt enable"] - pub const fn stopie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "STOP detection Interrupt enable"] - pub fn set_stopie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Transfer Complete interrupt enable"] - pub const fn tcie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Transfer Complete interrupt enable"] - pub fn set_tcie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Error interrupts enable"] - pub const fn errie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Error interrupts enable"] - pub fn set_errie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Digital noise filter"] - pub const fn dnf(&self) -> super::vals::Dnf { - let val = (self.0 >> 8usize) & 0x0f; - super::vals::Dnf(val as u8) - } - #[doc = "Digital noise filter"] - pub fn set_dnf(&mut self, val: super::vals::Dnf) { - self.0 = (self.0 & !(0x0f << 8usize)) | (((val.0 as u32) & 0x0f) << 8usize); - } - #[doc = "Analog noise filter OFF"] - pub const fn anfoff(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Analog noise filter OFF"] - pub fn set_anfoff(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "DMA transmission requests enable"] - pub const fn txdmaen(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "DMA transmission requests enable"] - pub fn set_txdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "DMA reception requests enable"] - pub const fn rxdmaen(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "DMA reception requests enable"] - pub fn set_rxdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "Slave byte control"] - pub const fn sbc(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Slave byte control"] - pub fn set_sbc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Clock stretching disable"] - pub const fn nostretch(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Clock stretching disable"] - pub fn set_nostretch(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "General call enable"] - pub const fn gcen(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "General call enable"] - pub fn set_gcen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "SMBus Host address enable"] - pub const fn smbhen(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "SMBus Host address enable"] - pub fn set_smbhen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "SMBus Device Default address enable"] - pub const fn smbden(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "SMBus Device Default address enable"] - pub fn set_smbden(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "SMBUS alert enable"] - pub const fn alerten(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "SMBUS alert enable"] - pub fn set_alerten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "PEC enable"] - pub const fn pecen(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "PEC enable"] - pub fn set_pecen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - #[doc = "Status register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Timeoutr(pub u32); - impl Timeoutr { - #[doc = "Bus timeout A"] - pub const fn timeouta(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Bus timeout A"] - pub fn set_timeouta(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Idle clock timeout detection"] - pub const fn tidle(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Idle clock timeout detection"] - pub fn set_tidle(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Clock timeout enable"] - pub const fn timouten(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Clock timeout enable"] - pub fn set_timouten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "Bus timeout B"] - pub const fn timeoutb(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Bus timeout B"] - pub fn set_timeoutb(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - #[doc = "Extended clock timeout enable"] - pub const fn texten(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Extended clock timeout enable"] - pub fn set_texten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for Timeoutr { - fn default() -> Timeoutr { - Timeoutr(0) - } - } - #[doc = "Own address register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Oar2(pub u32); - impl Oar2 { - #[doc = "Interface address"] - pub const fn oa2(&self) -> u8 { - let val = (self.0 >> 1usize) & 0x7f; - val as u8 - } - #[doc = "Interface address"] - pub fn set_oa2(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 1usize)) | (((val as u32) & 0x7f) << 1usize); - } - #[doc = "Own Address 2 masks"] - pub const fn oa2msk(&self) -> super::vals::Oamsk { - let val = (self.0 >> 8usize) & 0x07; - super::vals::Oamsk(val as u8) - } - #[doc = "Own Address 2 masks"] - pub fn set_oa2msk(&mut self, val: super::vals::Oamsk) { - self.0 = (self.0 & !(0x07 << 8usize)) | (((val.0 as u32) & 0x07) << 8usize); - } - #[doc = "Own Address 2 enable"] - pub const fn oa2en(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Own Address 2 enable"] - pub fn set_oa2en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - } - impl Default for Oar2 { - fn default() -> Oar2 { - Oar2(0) - } - } - #[doc = "Interrupt clear register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Icr(pub u32); - impl Icr { - #[doc = "Address Matched flag clear"] - pub const fn addrcf(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Address Matched flag clear"] - pub fn set_addrcf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Not Acknowledge flag clear"] - pub const fn nackcf(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Not Acknowledge flag clear"] - pub fn set_nackcf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Stop detection flag clear"] - pub const fn stopcf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Stop detection flag clear"] - pub fn set_stopcf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Bus error flag clear"] - pub const fn berrcf(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Bus error flag clear"] - pub fn set_berrcf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Arbitration lost flag clear"] - pub const fn arlocf(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Arbitration lost flag clear"] - pub fn set_arlocf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Overrun/Underrun flag clear"] - pub const fn ovrcf(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Overrun/Underrun flag clear"] - pub fn set_ovrcf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "PEC Error flag clear"] - pub const fn peccf(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "PEC Error flag clear"] - pub fn set_peccf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Timeout detection flag clear"] - pub const fn timoutcf(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Timeout detection flag clear"] - pub fn set_timoutcf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Alert flag clear"] - pub const fn alertcf(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Alert flag clear"] - pub fn set_alertcf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - } - impl Default for Icr { - fn default() -> Icr { - Icr(0) - } - } - #[doc = "PEC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pecr(pub u32); - impl Pecr { - #[doc = "Packet error checking register"] - pub const fn pec(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Packet error checking register"] - pub fn set_pec(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for Pecr { - fn default() -> Pecr { - Pecr(0) - } - } - #[doc = "Own address register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Oar1(pub u32); - impl Oar1 { - #[doc = "Interface address"] - pub const fn oa1(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x03ff; - val as u16 - } - #[doc = "Interface address"] - pub fn set_oa1(&mut self, val: u16) { - self.0 = (self.0 & !(0x03ff << 0usize)) | (((val as u32) & 0x03ff) << 0usize); - } - #[doc = "Own Address 1 10-bit mode"] - pub const fn oa1mode(&self) -> super::vals::Oamode { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Oamode(val as u8) - } - #[doc = "Own Address 1 10-bit mode"] - pub fn set_oa1mode(&mut self, val: super::vals::Oamode) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Own Address 1 enable"] - pub const fn oa1en(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Own Address 1 enable"] - pub fn set_oa1en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - } - impl Default for Oar1 { - fn default() -> Oar1 { - Oar1(0) - } - } - #[doc = "Receive data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rxdr(pub u32); - impl Rxdr { - #[doc = "8-bit receive data"] - pub const fn rxdata(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "8-bit receive data"] - pub fn set_rxdata(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for Rxdr { - fn default() -> Rxdr { - Rxdr(0) - } - } - #[doc = "Control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Slave address bit (master mode)"] - pub const fn sadd(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x03ff; - val as u16 - } - #[doc = "Slave address bit (master mode)"] - pub fn set_sadd(&mut self, val: u16) { - self.0 = (self.0 & !(0x03ff << 0usize)) | (((val as u32) & 0x03ff) << 0usize); - } - #[doc = "Transfer direction (master mode)"] - pub const fn rd_wrn(&self) -> super::vals::RdWrn { - let val = (self.0 >> 10usize) & 0x01; - super::vals::RdWrn(val as u8) - } - #[doc = "Transfer direction (master mode)"] - pub fn set_rd_wrn(&mut self, val: super::vals::RdWrn) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "10-bit addressing mode (master mode)"] - pub const fn add10(&self) -> super::vals::Add { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Add(val as u8) - } - #[doc = "10-bit addressing mode (master mode)"] - pub fn set_add10(&mut self, val: super::vals::Add) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "10-bit address header only read direction (master receiver mode)"] - pub const fn head10r(&self) -> super::vals::Headr { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Headr(val as u8) - } - #[doc = "10-bit address header only read direction (master receiver mode)"] - pub fn set_head10r(&mut self, val: super::vals::Headr) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Start generation"] - pub const fn start(&self) -> super::vals::Start { - let val = (self.0 >> 13usize) & 0x01; - super::vals::Start(val as u8) - } - #[doc = "Start generation"] - pub fn set_start(&mut self, val: super::vals::Start) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "Stop generation (master mode)"] - pub const fn stop(&self) -> super::vals::Stop { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Stop(val as u8) - } - #[doc = "Stop generation (master mode)"] - pub fn set_stop(&mut self, val: super::vals::Stop) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "NACK generation (slave mode)"] - pub const fn nack(&self) -> super::vals::Nack { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Nack(val as u8) - } - #[doc = "NACK generation (slave mode)"] - pub fn set_nack(&mut self, val: super::vals::Nack) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Number of bytes"] - pub const fn nbytes(&self) -> u8 { - let val = (self.0 >> 16usize) & 0xff; - val as u8 - } - #[doc = "Number of bytes"] - pub fn set_nbytes(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 16usize)) | (((val as u32) & 0xff) << 16usize); - } - #[doc = "NBYTES reload mode"] - pub const fn reload(&self) -> super::vals::Reload { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Reload(val as u8) - } - #[doc = "NBYTES reload mode"] - pub fn set_reload(&mut self, val: super::vals::Reload) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "Automatic end mode (master mode)"] - pub const fn autoend(&self) -> super::vals::Autoend { - let val = (self.0 >> 25usize) & 0x01; - super::vals::Autoend(val as u8) - } - #[doc = "Automatic end mode (master mode)"] - pub fn set_autoend(&mut self, val: super::vals::Autoend) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "Packet error checking byte"] - pub const fn pecbyte(&self) -> super::vals::Pecbyte { - let val = (self.0 >> 26usize) & 0x01; - super::vals::Pecbyte(val as u8) - } - #[doc = "Packet error checking byte"] - pub fn set_pecbyte(&mut self, val: super::vals::Pecbyte) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val.0 as u32) & 0x01) << 26usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "Timing register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Timingr(pub u32); - impl Timingr { - #[doc = "SCL low period (master mode)"] - pub const fn scll(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "SCL low period (master mode)"] - pub fn set_scll(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "SCL high period (master mode)"] - pub const fn sclh(&self) -> u8 { - let val = (self.0 >> 8usize) & 0xff; - val as u8 - } - #[doc = "SCL high period (master mode)"] - pub fn set_sclh(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); - } - #[doc = "Data hold time"] - pub const fn sdadel(&self) -> u8 { - let val = (self.0 >> 16usize) & 0x0f; - val as u8 - } - #[doc = "Data hold time"] - pub fn set_sdadel(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 16usize)) | (((val as u32) & 0x0f) << 16usize); - } - #[doc = "Data setup time"] - pub const fn scldel(&self) -> u8 { - let val = (self.0 >> 20usize) & 0x0f; - val as u8 - } - #[doc = "Data setup time"] - pub fn set_scldel(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 20usize)) | (((val as u32) & 0x0f) << 20usize); - } - #[doc = "Timing prescaler"] - pub const fn presc(&self) -> u8 { - let val = (self.0 >> 28usize) & 0x0f; - val as u8 - } - #[doc = "Timing prescaler"] - pub fn set_presc(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 28usize)) | (((val as u32) & 0x0f) << 28usize); - } - } - impl Default for Timingr { - fn default() -> Timingr { - Timingr(0) - } - } - #[doc = "Transmit data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Txdr(pub u32); - impl Txdr { - #[doc = "8-bit transmit data"] - pub const fn txdata(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "8-bit transmit data"] - pub fn set_txdata(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for Txdr { - fn default() -> Txdr { - Txdr(0) - } - } - } -} -pub mod timer_v1 { - use crate::generic::*; - #[doc = "General purpose 32-bit timer"] - #[derive(Copy, Clone)] - pub struct TimGp32(pub *mut u8); - unsafe impl Send for TimGp32 {} - unsafe impl Sync for TimGp32 {} - impl TimGp32 { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "slave mode control register"] - pub fn smcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "DMA/Interrupt enable register"] - pub fn dier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "event generation register"] - pub fn egr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "capture/compare mode register 1 (input mode)"] - pub fn ccmr_input(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare mode register 1 (output mode)"] - pub fn ccmr_output(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare enable register"] - pub fn ccer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "counter"] - pub fn cnt(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "prescaler"] - pub fn psc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "auto-reload register"] - pub fn arr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "capture/compare register"] - pub fn ccr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } - } - #[doc = "DMA control register"] - pub fn dcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(72usize)) } - } - #[doc = "DMA address for full transfer"] - pub fn dmar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - } - #[doc = "Advanced-timers"] - #[derive(Copy, Clone)] - pub struct TimAdv(pub *mut u8); - unsafe impl Send for TimAdv {} - unsafe impl Sync for TimAdv {} - impl TimAdv { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "slave mode control register"] - pub fn smcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "DMA/Interrupt enable register"] - pub fn dier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "event generation register"] - pub fn egr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "capture/compare mode register 1 (input mode)"] - pub fn ccmr_input(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare mode register 1 (output mode)"] - pub fn ccmr_output(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare enable register"] - pub fn ccer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "counter"] - pub fn cnt(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "prescaler"] - pub fn psc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "auto-reload register"] - pub fn arr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "repetition counter register"] - pub fn rcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(48usize)) } - } - #[doc = "capture/compare register"] - pub fn ccr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } - } - #[doc = "break and dead-time register"] - pub fn bdtr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(68usize)) } - } - #[doc = "DMA control register"] - pub fn dcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(72usize)) } - } - #[doc = "DMA address for full transfer"] - pub fn dmar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - } - #[doc = "Basic timer"] - #[derive(Copy, Clone)] - pub struct TimBasic(pub *mut u8); - unsafe impl Send for TimBasic {} - unsafe impl Sync for TimBasic {} - impl TimBasic { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "DMA/Interrupt enable register"] - pub fn dier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "event generation register"] - pub fn egr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "counter"] - pub fn cnt(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "prescaler"] - pub fn psc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "auto-reload register"] - pub fn arr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - } - #[doc = "General purpose 16-bit timer"] - #[derive(Copy, Clone)] - pub struct TimGp16(pub *mut u8); - unsafe impl Send for TimGp16 {} - unsafe impl Sync for TimGp16 {} - impl TimGp16 { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "slave mode control register"] - pub fn smcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "DMA/Interrupt enable register"] - pub fn dier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "event generation register"] - pub fn egr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "capture/compare mode register 1 (input mode)"] - pub fn ccmr_input(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare mode register 1 (output mode)"] - pub fn ccmr_output(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(24usize + n * 4usize)) } - } - #[doc = "capture/compare enable register"] - pub fn ccer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "counter"] - pub fn cnt(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "prescaler"] - pub fn psc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "auto-reload register"] - pub fn arr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "capture/compare register"] - pub fn ccr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(52usize + n * 4usize)) } - } - #[doc = "DMA control register"] - pub fn dcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(72usize)) } - } - #[doc = "DMA address for full transfer"] - pub fn dmar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "repetition counter register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rcr(pub u32); - impl Rcr { - #[doc = "Repetition counter value"] - pub const fn rep(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Repetition counter value"] - pub fn set_rep(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for Rcr { - fn default() -> Rcr { - Rcr(0) - } - } - #[doc = "capture/compare enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CcerAdv(pub u32); - impl CcerAdv { - #[doc = "Capture/Compare 1 output enable"] - pub fn cce(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output enable"] - pub fn set_cce(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn ccp(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn set_ccp(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 complementary output enable"] - pub fn ccne(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 complementary output enable"] - pub fn set_ccne(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn ccnp(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 3usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn set_ccnp(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 3usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for CcerAdv { - fn default() -> CcerAdv { - CcerAdv(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct SrBasic(pub u32); - impl SrBasic { - #[doc = "Update interrupt flag"] - pub const fn uif(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt flag"] - pub fn set_uif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - } - impl Default for SrBasic { - fn default() -> SrBasic { - SrBasic(0) - } - } - #[doc = "DMA address for full transfer"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dmar(pub u32); - impl Dmar { - #[doc = "DMA register for burst accesses"] - pub const fn dmab(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "DMA register for burst accesses"] - pub fn set_dmab(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Dmar { - fn default() -> Dmar { - Dmar(0) - } - } - #[doc = "counter"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cnt16(pub u32); - impl Cnt16 { - #[doc = "counter value"] - pub const fn cnt(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "counter value"] - pub fn set_cnt(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Cnt16 { - fn default() -> Cnt16 { - Cnt16(0) - } - } - #[doc = "DMA/Interrupt enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct DierAdv(pub u32); - impl DierAdv { - #[doc = "Update interrupt enable"] - pub const fn uie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt enable"] - pub fn set_uie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/Compare 1 interrupt enable"] - pub fn ccie(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 interrupt enable"] - pub fn set_ccie(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "COM interrupt enable"] - pub const fn comie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "COM interrupt enable"] - pub fn set_comie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger interrupt enable"] - pub const fn tie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger interrupt enable"] - pub fn set_tie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break interrupt enable"] - pub const fn bie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break interrupt enable"] - pub fn set_bie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Update DMA request enable"] - pub const fn ude(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Update DMA request enable"] - pub fn set_ude(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Capture/Compare 1 DMA request enable"] - pub fn ccde(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 DMA request enable"] - pub fn set_ccde(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "COM DMA request enable"] - pub const fn comde(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "COM DMA request enable"] - pub fn set_comde(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Trigger DMA request enable"] - pub const fn tde(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Trigger DMA request enable"] - pub fn set_tde(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for DierAdv { - fn default() -> DierAdv { - DierAdv(0) - } - } - #[doc = "control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1Basic(pub u32); - impl Cr1Basic { - #[doc = "Counter enable"] - pub const fn cen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Counter enable"] - pub fn set_cen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Update disable"] - pub const fn udis(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Update disable"] - pub fn set_udis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Update request source"] - pub const fn urs(&self) -> super::vals::Urs { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Urs(val as u8) - } - #[doc = "Update request source"] - pub fn set_urs(&mut self, val: super::vals::Urs) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "One-pulse mode"] - pub const fn opm(&self) -> super::vals::Opm { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Opm(val as u8) - } - #[doc = "One-pulse mode"] - pub fn set_opm(&mut self, val: super::vals::Opm) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Auto-reload preload enable"] - pub const fn arpe(&self) -> super::vals::Arpe { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Arpe(val as u8) - } - #[doc = "Auto-reload preload enable"] - pub fn set_arpe(&mut self, val: super::vals::Arpe) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - } - impl Default for Cr1Basic { - fn default() -> Cr1Basic { - Cr1Basic(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct SrGp(pub u32); - impl SrGp { - #[doc = "Update interrupt flag"] - pub const fn uif(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt flag"] - pub fn set_uif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare 1 interrupt flag"] - pub fn ccif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/compare 1 interrupt flag"] - pub fn set_ccif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "COM interrupt flag"] - pub const fn comif(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "COM interrupt flag"] - pub fn set_comif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger interrupt flag"] - pub const fn tif(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger interrupt flag"] - pub fn set_tif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break interrupt flag"] - pub const fn bif(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break interrupt flag"] - pub fn set_bif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Capture/Compare 1 overcapture flag"] - pub fn ccof(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 overcapture flag"] - pub fn set_ccof(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for SrGp { - fn default() -> SrGp { - SrGp(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2Adv(pub u32); - impl Cr2Adv { - #[doc = "Capture/compare preloaded control"] - pub const fn ccpc(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Capture/compare preloaded control"] - pub fn set_ccpc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare control update selection"] - pub const fn ccus(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Capture/compare control update selection"] - pub fn set_ccus(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Capture/compare DMA selection"] - pub const fn ccds(&self) -> super::vals::Ccds { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Ccds(val as u8) - } - #[doc = "Capture/compare DMA selection"] - pub fn set_ccds(&mut self, val: super::vals::Ccds) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Master mode selection"] - pub const fn mms(&self) -> super::vals::Mms { - let val = (self.0 >> 4usize) & 0x07; - super::vals::Mms(val as u8) - } - #[doc = "Master mode selection"] - pub fn set_mms(&mut self, val: super::vals::Mms) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - #[doc = "TI1 selection"] - pub const fn ti1s(&self) -> super::vals::Tis { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Tis(val as u8) - } - #[doc = "TI1 selection"] - pub fn set_ti1s(&mut self, val: super::vals::Tis) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Output Idle state 1"] - pub fn ois(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 8usize + n * 2usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Output Idle state 1"] - pub fn set_ois(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 8usize + n * 2usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Output Idle state 1"] - pub const fn ois1n(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Output Idle state 1"] - pub fn set_ois1n(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Output Idle state 2"] - pub const fn ois2n(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Output Idle state 2"] - pub fn set_ois2n(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Output Idle state 3"] - pub const fn ois3n(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Output Idle state 3"] - pub fn set_ois3n(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - } - impl Default for Cr2Adv { - fn default() -> Cr2Adv { - Cr2Adv(0) - } - } - #[doc = "prescaler"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Psc(pub u32); - impl Psc { - #[doc = "Prescaler value"] - pub const fn psc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Prescaler value"] - pub fn set_psc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Psc { - fn default() -> Psc { - Psc(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2Gp(pub u32); - impl Cr2Gp { - #[doc = "Capture/compare DMA selection"] - pub const fn ccds(&self) -> super::vals::Ccds { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Ccds(val as u8) - } - #[doc = "Capture/compare DMA selection"] - pub fn set_ccds(&mut self, val: super::vals::Ccds) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Master mode selection"] - pub const fn mms(&self) -> super::vals::Mms { - let val = (self.0 >> 4usize) & 0x07; - super::vals::Mms(val as u8) - } - #[doc = "Master mode selection"] - pub fn set_mms(&mut self, val: super::vals::Mms) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - #[doc = "TI1 selection"] - pub const fn ti1s(&self) -> super::vals::Tis { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Tis(val as u8) - } - #[doc = "TI1 selection"] - pub fn set_ti1s(&mut self, val: super::vals::Tis) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - } - impl Default for Cr2Gp { - fn default() -> Cr2Gp { - Cr2Gp(0) - } - } - #[doc = "control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1Gp(pub u32); - impl Cr1Gp { - #[doc = "Counter enable"] - pub const fn cen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Counter enable"] - pub fn set_cen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Update disable"] - pub const fn udis(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Update disable"] - pub fn set_udis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Update request source"] - pub const fn urs(&self) -> super::vals::Urs { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Urs(val as u8) - } - #[doc = "Update request source"] - pub fn set_urs(&mut self, val: super::vals::Urs) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "One-pulse mode"] - pub const fn opm(&self) -> super::vals::Opm { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Opm(val as u8) - } - #[doc = "One-pulse mode"] - pub fn set_opm(&mut self, val: super::vals::Opm) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "Direction"] - pub const fn dir(&self) -> super::vals::Dir { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Dir(val as u8) - } - #[doc = "Direction"] - pub fn set_dir(&mut self, val: super::vals::Dir) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Center-aligned mode selection"] - pub const fn cms(&self) -> super::vals::Cms { - let val = (self.0 >> 5usize) & 0x03; - super::vals::Cms(val as u8) - } - #[doc = "Center-aligned mode selection"] - pub fn set_cms(&mut self, val: super::vals::Cms) { - self.0 = (self.0 & !(0x03 << 5usize)) | (((val.0 as u32) & 0x03) << 5usize); - } - #[doc = "Auto-reload preload enable"] - pub const fn arpe(&self) -> super::vals::Arpe { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Arpe(val as u8) - } - #[doc = "Auto-reload preload enable"] - pub fn set_arpe(&mut self, val: super::vals::Arpe) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Clock division"] - pub const fn ckd(&self) -> super::vals::Ckd { - let val = (self.0 >> 8usize) & 0x03; - super::vals::Ckd(val as u8) - } - #[doc = "Clock division"] - pub fn set_ckd(&mut self, val: super::vals::Ckd) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val.0 as u32) & 0x03) << 8usize); - } - } - impl Default for Cr1Gp { - fn default() -> Cr1Gp { - Cr1Gp(0) - } - } - #[doc = "capture/compare mode register 1 (input mode)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CcmrInput(pub u32); - impl CcmrInput { - #[doc = "Capture/Compare 1 selection"] - pub fn ccs(&self, n: usize) -> super::vals::CcmrInputCcs { - assert!(n < 2usize); - let offs = 0usize + n * 8usize; - let val = (self.0 >> offs) & 0x03; - super::vals::CcmrInputCcs(val as u8) - } - #[doc = "Capture/Compare 1 selection"] - pub fn set_ccs(&mut self, n: usize, val: super::vals::CcmrInputCcs) { - assert!(n < 2usize); - let offs = 0usize + n * 8usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - #[doc = "Input capture 1 prescaler"] - pub fn icpsc(&self, n: usize) -> u8 { - assert!(n < 2usize); - let offs = 2usize + n * 8usize; - let val = (self.0 >> offs) & 0x03; - val as u8 - } - #[doc = "Input capture 1 prescaler"] - pub fn set_icpsc(&mut self, n: usize, val: u8) { - assert!(n < 2usize); - let offs = 2usize + n * 8usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val as u32) & 0x03) << offs); - } - #[doc = "Input capture 1 filter"] - pub fn icf(&self, n: usize) -> super::vals::Icf { - assert!(n < 2usize); - let offs = 4usize + n * 8usize; - let val = (self.0 >> offs) & 0x0f; - super::vals::Icf(val as u8) - } - #[doc = "Input capture 1 filter"] - pub fn set_icf(&mut self, n: usize, val: super::vals::Icf) { - assert!(n < 2usize); - let offs = 4usize + n * 8usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val.0 as u32) & 0x0f) << offs); - } - } - impl Default for CcmrInput { - fn default() -> CcmrInput { - CcmrInput(0) - } - } - #[doc = "auto-reload register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Arr32(pub u32); - impl Arr32 { - #[doc = "Auto-reload value"] - pub const fn arr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Auto-reload value"] - pub fn set_arr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Arr32 { - fn default() -> Arr32 { - Arr32(0) - } - } - #[doc = "counter"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cnt32(pub u32); - impl Cnt32 { - #[doc = "counter value"] - pub const fn cnt(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "counter value"] - pub fn set_cnt(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Cnt32 { - fn default() -> Cnt32 { - Cnt32(0) - } - } - #[doc = "capture/compare register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ccr16(pub u32); - impl Ccr16 { - #[doc = "Capture/Compare 1 value"] - pub const fn ccr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Capture/Compare 1 value"] - pub fn set_ccr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Ccr16 { - fn default() -> Ccr16 { - Ccr16(0) - } - } - #[doc = "DMA control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dcr(pub u32); - impl Dcr { - #[doc = "DMA base address"] - pub const fn dba(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x1f; - val as u8 - } - #[doc = "DMA base address"] - pub fn set_dba(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 0usize)) | (((val as u32) & 0x1f) << 0usize); - } - #[doc = "DMA burst length"] - pub const fn dbl(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x1f; - val as u8 - } - #[doc = "DMA burst length"] - pub fn set_dbl(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 8usize)) | (((val as u32) & 0x1f) << 8usize); - } - } - impl Default for Dcr { - fn default() -> Dcr { - Dcr(0) - } - } - #[doc = "auto-reload register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Arr16(pub u32); - impl Arr16 { - #[doc = "Auto-reload value"] - pub const fn arr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Auto-reload value"] - pub fn set_arr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Arr16 { - fn default() -> Arr16 { - Arr16(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2Basic(pub u32); - impl Cr2Basic { - #[doc = "Master mode selection"] - pub const fn mms(&self) -> super::vals::Mms { - let val = (self.0 >> 4usize) & 0x07; - super::vals::Mms(val as u8) - } - #[doc = "Master mode selection"] - pub fn set_mms(&mut self, val: super::vals::Mms) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - } - impl Default for Cr2Basic { - fn default() -> Cr2Basic { - Cr2Basic(0) - } - } - #[doc = "DMA/Interrupt enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct DierGp(pub u32); - impl DierGp { - #[doc = "Update interrupt enable"] - pub const fn uie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt enable"] - pub fn set_uie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/Compare 1 interrupt enable"] - pub fn ccie(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 interrupt enable"] - pub fn set_ccie(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Trigger interrupt enable"] - pub const fn tie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger interrupt enable"] - pub fn set_tie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Update DMA request enable"] - pub const fn ude(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Update DMA request enable"] - pub fn set_ude(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Capture/Compare 1 DMA request enable"] - pub fn ccde(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 DMA request enable"] - pub fn set_ccde(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Trigger DMA request enable"] - pub const fn tde(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Trigger DMA request enable"] - pub fn set_tde(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for DierGp { - fn default() -> DierGp { - DierGp(0) - } - } - #[doc = "DMA/Interrupt enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct DierBasic(pub u32); - impl DierBasic { - #[doc = "Update interrupt enable"] - pub const fn uie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt enable"] - pub fn set_uie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Update DMA request enable"] - pub const fn ude(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Update DMA request enable"] - pub fn set_ude(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for DierBasic { - fn default() -> DierBasic { - DierBasic(0) - } - } - #[doc = "capture/compare mode register 2 (output mode)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CcmrOutput(pub u32); - impl CcmrOutput { - #[doc = "Capture/Compare 3 selection"] - pub fn ccs(&self, n: usize) -> super::vals::CcmrOutputCcs { - assert!(n < 2usize); - let offs = 0usize + n * 8usize; - let val = (self.0 >> offs) & 0x03; - super::vals::CcmrOutputCcs(val as u8) - } - #[doc = "Capture/Compare 3 selection"] - pub fn set_ccs(&mut self, n: usize, val: super::vals::CcmrOutputCcs) { - assert!(n < 2usize); - let offs = 0usize + n * 8usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - #[doc = "Output compare 3 fast enable"] - pub fn ocfe(&self, n: usize) -> bool { - assert!(n < 2usize); - let offs = 2usize + n * 8usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Output compare 3 fast enable"] - pub fn set_ocfe(&mut self, n: usize, val: bool) { - assert!(n < 2usize); - let offs = 2usize + n * 8usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Output compare 3 preload enable"] - pub fn ocpe(&self, n: usize) -> super::vals::Ocpe { - assert!(n < 2usize); - let offs = 3usize + n * 8usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Ocpe(val as u8) - } - #[doc = "Output compare 3 preload enable"] - pub fn set_ocpe(&mut self, n: usize, val: super::vals::Ocpe) { - assert!(n < 2usize); - let offs = 3usize + n * 8usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "Output compare 3 mode"] - pub fn ocm(&self, n: usize) -> super::vals::Ocm { - assert!(n < 2usize); - let offs = 4usize + n * 8usize; - let val = (self.0 >> offs) & 0x07; - super::vals::Ocm(val as u8) - } - #[doc = "Output compare 3 mode"] - pub fn set_ocm(&mut self, n: usize, val: super::vals::Ocm) { - assert!(n < 2usize); - let offs = 4usize + n * 8usize; - self.0 = (self.0 & !(0x07 << offs)) | (((val.0 as u32) & 0x07) << offs); - } - #[doc = "Output compare 3 clear enable"] - pub fn occe(&self, n: usize) -> bool { - assert!(n < 2usize); - let offs = 7usize + n * 8usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Output compare 3 clear enable"] - pub fn set_occe(&mut self, n: usize, val: bool) { - assert!(n < 2usize); - let offs = 7usize + n * 8usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for CcmrOutput { - fn default() -> CcmrOutput { - CcmrOutput(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct SrAdv(pub u32); - impl SrAdv { - #[doc = "Update interrupt flag"] - pub const fn uif(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update interrupt flag"] - pub fn set_uif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare 1 interrupt flag"] - pub fn ccif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/compare 1 interrupt flag"] - pub fn set_ccif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "COM interrupt flag"] - pub const fn comif(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "COM interrupt flag"] - pub fn set_comif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger interrupt flag"] - pub const fn tif(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger interrupt flag"] - pub fn set_tif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break interrupt flag"] - pub const fn bif(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break interrupt flag"] - pub fn set_bif(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Capture/Compare 1 overcapture flag"] - pub fn ccof(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 overcapture flag"] - pub fn set_ccof(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 9usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for SrAdv { - fn default() -> SrAdv { - SrAdv(0) - } - } - #[doc = "capture/compare enable register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CcerGp(pub u32); - impl CcerGp { - #[doc = "Capture/Compare 1 output enable"] - pub fn cce(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output enable"] - pub fn set_cce(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn ccp(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn set_ccp(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn ccnp(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 3usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/Compare 1 output Polarity"] - pub fn set_ccnp(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 3usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for CcerGp { - fn default() -> CcerGp { - CcerGp(0) - } - } - #[doc = "break and dead-time register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Bdtr(pub u32); - impl Bdtr { - #[doc = "Dead-time generator setup"] - pub const fn dtg(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Dead-time generator setup"] - pub fn set_dtg(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "Lock configuration"] - pub const fn lock(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x03; - val as u8 - } - #[doc = "Lock configuration"] - pub fn set_lock(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val as u32) & 0x03) << 8usize); - } - #[doc = "Off-state selection for Idle mode"] - pub const fn ossi(&self) -> super::vals::Ossi { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Ossi(val as u8) - } - #[doc = "Off-state selection for Idle mode"] - pub fn set_ossi(&mut self, val: super::vals::Ossi) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Off-state selection for Run mode"] - pub const fn ossr(&self) -> super::vals::Ossr { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Ossr(val as u8) - } - #[doc = "Off-state selection for Run mode"] - pub fn set_ossr(&mut self, val: super::vals::Ossr) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "Break enable"] - pub const fn bke(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Break enable"] - pub fn set_bke(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Break polarity"] - pub const fn bkp(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Break polarity"] - pub fn set_bkp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Automatic output enable"] - pub const fn aoe(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Automatic output enable"] - pub fn set_aoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Main output enable"] - pub const fn moe(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Main output enable"] - pub fn set_moe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - } - impl Default for Bdtr { - fn default() -> Bdtr { - Bdtr(0) - } - } - #[doc = "event generation register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EgrBasic(pub u32); - impl EgrBasic { - #[doc = "Update generation"] - pub const fn ug(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update generation"] - pub fn set_ug(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - } - impl Default for EgrBasic { - fn default() -> EgrBasic { - EgrBasic(0) - } - } - #[doc = "capture/compare register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ccr32(pub u32); - impl Ccr32 { - #[doc = "Capture/Compare 1 value"] - pub const fn ccr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Capture/Compare 1 value"] - pub fn set_ccr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Ccr32 { - fn default() -> Ccr32 { - Ccr32(0) - } - } - #[doc = "event generation register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EgrAdv(pub u32); - impl EgrAdv { - #[doc = "Update generation"] - pub const fn ug(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update generation"] - pub fn set_ug(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare 1 generation"] - pub fn ccg(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/compare 1 generation"] - pub fn set_ccg(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare control update generation"] - pub const fn comg(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Capture/Compare control update generation"] - pub fn set_comg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger generation"] - pub const fn tg(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger generation"] - pub fn set_tg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break generation"] - pub const fn bg(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break generation"] - pub fn set_bg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for EgrAdv { - fn default() -> EgrAdv { - EgrAdv(0) - } - } - #[doc = "slave mode control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Smcr(pub u32); - impl Smcr { - #[doc = "Slave mode selection"] - pub const fn sms(&self) -> super::vals::Sms { - let val = (self.0 >> 0usize) & 0x07; - super::vals::Sms(val as u8) - } - #[doc = "Slave mode selection"] - pub fn set_sms(&mut self, val: super::vals::Sms) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val.0 as u32) & 0x07) << 0usize); - } - #[doc = "Trigger selection"] - pub const fn ts(&self) -> super::vals::Ts { - let val = (self.0 >> 4usize) & 0x07; - super::vals::Ts(val as u8) - } - #[doc = "Trigger selection"] - pub fn set_ts(&mut self, val: super::vals::Ts) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - #[doc = "Master/Slave mode"] - pub const fn msm(&self) -> super::vals::Msm { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Msm(val as u8) - } - #[doc = "Master/Slave mode"] - pub fn set_msm(&mut self, val: super::vals::Msm) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "External trigger filter"] - pub const fn etf(&self) -> super::vals::Etf { - let val = (self.0 >> 8usize) & 0x0f; - super::vals::Etf(val as u8) - } - #[doc = "External trigger filter"] - pub fn set_etf(&mut self, val: super::vals::Etf) { - self.0 = (self.0 & !(0x0f << 8usize)) | (((val.0 as u32) & 0x0f) << 8usize); - } - #[doc = "External trigger prescaler"] - pub const fn etps(&self) -> super::vals::Etps { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Etps(val as u8) - } - #[doc = "External trigger prescaler"] - pub fn set_etps(&mut self, val: super::vals::Etps) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "External clock enable"] - pub const fn ece(&self) -> super::vals::Ece { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Ece(val as u8) - } - #[doc = "External clock enable"] - pub fn set_ece(&mut self, val: super::vals::Ece) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "External trigger polarity"] - pub const fn etp(&self) -> super::vals::Etp { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Etp(val as u8) - } - #[doc = "External trigger polarity"] - pub fn set_etp(&mut self, val: super::vals::Etp) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - } - impl Default for Smcr { - fn default() -> Smcr { - Smcr(0) - } - } - #[doc = "event generation register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EgrGp(pub u32); - impl EgrGp { - #[doc = "Update generation"] - pub const fn ug(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Update generation"] - pub fn set_ug(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Capture/compare 1 generation"] - pub fn ccg(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Capture/compare 1 generation"] - pub fn set_ccg(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 1usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Capture/Compare control update generation"] - pub const fn comg(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Capture/Compare control update generation"] - pub fn set_comg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Trigger generation"] - pub const fn tg(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Trigger generation"] - pub fn set_tg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Break generation"] - pub const fn bg(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Break generation"] - pub fn set_bg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for EgrGp { - fn default() -> EgrGp { - EgrGp(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Opm(pub u8); - impl Opm { - #[doc = "Counter is not stopped at update event"] - pub const DISABLED: Self = Self(0); - #[doc = "Counter stops counting at the next update event (clearing the CEN bit)"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Etf(pub u8); - impl Etf { - #[doc = "No filter, sampling is done at fDTS"] - pub const NOFILTER: Self = Self(0); - #[doc = "fSAMPLING=fCK_INT, N=2"] - pub const FCK_INT_N2: Self = Self(0x01); - #[doc = "fSAMPLING=fCK_INT, N=4"] - pub const FCK_INT_N4: Self = Self(0x02); - #[doc = "fSAMPLING=fCK_INT, N=8"] - pub const FCK_INT_N8: Self = Self(0x03); - #[doc = "fSAMPLING=fDTS/2, N=6"] - pub const FDTS_DIV2_N6: Self = Self(0x04); - #[doc = "fSAMPLING=fDTS/2, N=8"] - pub const FDTS_DIV2_N8: Self = Self(0x05); - #[doc = "fSAMPLING=fDTS/4, N=6"] - pub const FDTS_DIV4_N6: Self = Self(0x06); - #[doc = "fSAMPLING=fDTS/4, N=8"] - pub const FDTS_DIV4_N8: Self = Self(0x07); - #[doc = "fSAMPLING=fDTS/8, N=6"] - pub const FDTS_DIV8_N6: Self = Self(0x08); - #[doc = "fSAMPLING=fDTS/8, N=8"] - pub const FDTS_DIV8_N8: Self = Self(0x09); - #[doc = "fSAMPLING=fDTS/16, N=5"] - pub const FDTS_DIV16_N5: Self = Self(0x0a); - #[doc = "fSAMPLING=fDTS/16, N=6"] - pub const FDTS_DIV16_N6: Self = Self(0x0b); - #[doc = "fSAMPLING=fDTS/16, N=8"] - pub const FDTS_DIV16_N8: Self = Self(0x0c); - #[doc = "fSAMPLING=fDTS/32, N=5"] - pub const FDTS_DIV32_N5: Self = Self(0x0d); - #[doc = "fSAMPLING=fDTS/32, N=6"] - pub const FDTS_DIV32_N6: Self = Self(0x0e); - #[doc = "fSAMPLING=fDTS/32, N=8"] - pub const FDTS_DIV32_N8: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ocm(pub u8); - impl Ocm { - #[doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs"] - pub const FROZEN: Self = Self(0); - #[doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register"] - pub const ACTIVEONMATCH: Self = Self(0x01); - #[doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register"] - pub const INACTIVEONMATCH: Self = Self(0x02); - #[doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy"] - pub const TOGGLE: Self = Self(0x03); - #[doc = "OCyREF is forced low"] - pub const FORCEINACTIVE: Self = Self(0x04); - #[doc = "OCyREF is forced high"] - pub const FORCEACTIVE: Self = Self(0x05); - #[doc = "In upcounting, channel is active as long as TIMx_CNTTIMx_CCRy else active"] - pub const PWMMODE1: Self = Self(0x06); - #[doc = "Inversely to PwmMode1"] - pub const PWMMODE2: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Icf(pub u8); - impl Icf { - #[doc = "No filter, sampling is done at fDTS"] - pub const NOFILTER: Self = Self(0); - #[doc = "fSAMPLING=fCK_INT, N=2"] - pub const FCK_INT_N2: Self = Self(0x01); - #[doc = "fSAMPLING=fCK_INT, N=4"] - pub const FCK_INT_N4: Self = Self(0x02); - #[doc = "fSAMPLING=fCK_INT, N=8"] - pub const FCK_INT_N8: Self = Self(0x03); - #[doc = "fSAMPLING=fDTS/2, N=6"] - pub const FDTS_DIV2_N6: Self = Self(0x04); - #[doc = "fSAMPLING=fDTS/2, N=8"] - pub const FDTS_DIV2_N8: Self = Self(0x05); - #[doc = "fSAMPLING=fDTS/4, N=6"] - pub const FDTS_DIV4_N6: Self = Self(0x06); - #[doc = "fSAMPLING=fDTS/4, N=8"] - pub const FDTS_DIV4_N8: Self = Self(0x07); - #[doc = "fSAMPLING=fDTS/8, N=6"] - pub const FDTS_DIV8_N6: Self = Self(0x08); - #[doc = "fSAMPLING=fDTS/8, N=8"] - pub const FDTS_DIV8_N8: Self = Self(0x09); - #[doc = "fSAMPLING=fDTS/16, N=5"] - pub const FDTS_DIV16_N5: Self = Self(0x0a); - #[doc = "fSAMPLING=fDTS/16, N=6"] - pub const FDTS_DIV16_N6: Self = Self(0x0b); - #[doc = "fSAMPLING=fDTS/16, N=8"] - pub const FDTS_DIV16_N8: Self = Self(0x0c); - #[doc = "fSAMPLING=fDTS/32, N=5"] - pub const FDTS_DIV32_N5: Self = Self(0x0d); - #[doc = "fSAMPLING=fDTS/32, N=6"] - pub const FDTS_DIV32_N6: Self = Self(0x0e); - #[doc = "fSAMPLING=fDTS/32, N=8"] - pub const FDTS_DIV32_N8: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cms(pub u8); - impl Cms { - #[doc = "The counter counts up or down depending on the direction bit"] - pub const EDGEALIGNED: Self = Self(0); - #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down."] - pub const CENTERALIGNED1: Self = Self(0x01); - #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up."] - pub const CENTERALIGNED2: Self = Self(0x02); - #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down."] - pub const CENTERALIGNED3: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dir(pub u8); - impl Dir { - #[doc = "Counter used as upcounter"] - pub const UP: Self = Self(0); - #[doc = "Counter used as downcounter"] - pub const DOWN: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ocpe(pub u8); - impl Ocpe { - #[doc = "Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately"] - pub const DISABLED: Self = Self(0); - #[doc = "Preload register on CCR2 enabled. Preload value is loaded into active register on each update event"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ts(pub u8); - impl Ts { - #[doc = "Internal Trigger 0 (ITR0)"] - pub const ITR0: Self = Self(0); - #[doc = "Internal Trigger 1 (ITR1)"] - pub const ITR1: Self = Self(0x01); - #[doc = "Internal Trigger 2 (ITR2)"] - pub const ITR2: Self = Self(0x02); - #[doc = "TI1 Edge Detector (TI1F_ED)"] - pub const TI1F_ED: Self = Self(0x04); - #[doc = "Filtered Timer Input 1 (TI1FP1)"] - pub const TI1FP1: Self = Self(0x05); - #[doc = "Filtered Timer Input 2 (TI2FP2)"] - pub const TI2FP2: Self = Self(0x06); - #[doc = "External Trigger input (ETRF)"] - pub const ETRF: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mms(pub u8); - impl Mms { - #[doc = "The UG bit from the TIMx_EGR register is used as trigger output"] - pub const RESET: Self = Self(0); - #[doc = "The counter enable signal, CNT_EN, is used as trigger output"] - pub const ENABLE: Self = Self(0x01); - #[doc = "The update event is selected as trigger output"] - pub const UPDATE: Self = Self(0x02); - #[doc = "The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred"] - pub const COMPAREPULSE: Self = Self(0x03); - #[doc = "OC1REF signal is used as trigger output"] - pub const COMPAREOC1: Self = Self(0x04); - #[doc = "OC2REF signal is used as trigger output"] - pub const COMPAREOC2: Self = Self(0x05); - #[doc = "OC3REF signal is used as trigger output"] - pub const COMPAREOC3: Self = Self(0x06); - #[doc = "OC4REF signal is used as trigger output"] - pub const COMPAREOC4: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Urs(pub u8); - impl Urs { - #[doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"] - pub const ANYEVENT: Self = Self(0); - #[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"] - pub const COUNTERONLY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Etps(pub u8); - impl Etps { - #[doc = "Prescaler OFF"] - pub const DIV1: Self = Self(0); - #[doc = "ETRP frequency divided by 2"] - pub const DIV2: Self = Self(0x01); - #[doc = "ETRP frequency divided by 4"] - pub const DIV4: Self = Self(0x02); - #[doc = "ETRP frequency divided by 8"] - pub const DIV8: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Arpe(pub u8); - impl Arpe { - #[doc = "TIMx_APRR register is not buffered"] - pub const DISABLED: Self = Self(0); - #[doc = "TIMx_APRR register is buffered"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ossr(pub u8); - impl Ossr { - #[doc = "When inactive, OC/OCN outputs are disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "When inactive, OC/OCN outputs are enabled with their inactive level"] - pub const IDLELEVEL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Msm(pub u8); - impl Msm { - #[doc = "No action"] - pub const NOSYNC: Self = Self(0); - #[doc = "The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event."] - pub const SYNC: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sms(pub u8); - impl Sms { - #[doc = "Slave mode disabled - if CEN = ‘1 then the prescaler is clocked directly by the internal clock."] - pub const DISABLED: Self = Self(0); - #[doc = "Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level."] - pub const ENCODER_MODE_1: Self = Self(0x01); - #[doc = "Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level."] - pub const ENCODER_MODE_2: Self = Self(0x02); - #[doc = "Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input."] - pub const ENCODER_MODE_3: Self = Self(0x03); - #[doc = "Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers."] - pub const RESET_MODE: Self = Self(0x04); - #[doc = "Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled."] - pub const GATED_MODE: Self = Self(0x05); - #[doc = "Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled."] - pub const TRIGGER_MODE: Self = Self(0x06); - #[doc = "External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter."] - pub const EXT_CLOCK_MODE: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ossi(pub u8); - impl Ossi { - #[doc = "When inactive, OC/OCN outputs are disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "When inactive, OC/OCN outputs are forced to idle level"] - pub const IDLELEVEL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Tis(pub u8); - impl Tis { - #[doc = "The TIMx_CH1 pin is connected to TI1 input"] - pub const NORMAL: Self = Self(0); - #[doc = "The TIMx_CH1, CH2, CH3 pins are connected to TI1 input"] - pub const XOR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ccds(pub u8); - impl Ccds { - #[doc = "CCx DMA request sent when CCx event occurs"] - pub const ONCOMPARE: Self = Self(0); - #[doc = "CCx DMA request sent when update event occurs"] - pub const ONUPDATE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct CcmrOutputCcs(pub u8); - impl CcmrOutputCcs { - #[doc = "CCx channel is configured as output"] - pub const OUTPUT: Self = Self(0); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ckd(pub u8); - impl Ckd { - #[doc = "t_DTS = t_CK_INT"] - pub const DIV1: Self = Self(0); - #[doc = "t_DTS = 2 × t_CK_INT"] - pub const DIV2: Self = Self(0x01); - #[doc = "t_DTS = 4 × t_CK_INT"] - pub const DIV4: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct CcmrInputCcs(pub u8); - impl CcmrInputCcs { - #[doc = "CCx channel is configured as input, normal mapping: ICx mapped to TIx"] - pub const TI4: Self = Self(0x01); - #[doc = "CCx channel is configured as input, alternate mapping (switches 1 with 2, 3 with 4)"] - pub const TI3: Self = Self(0x02); - #[doc = "CCx channel is configured as input, ICx is mapped on TRC"] - pub const TRC: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ece(pub u8); - impl Ece { - #[doc = "External clock mode 2 disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal."] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Etp(pub u8); - impl Etp { - #[doc = "ETR is noninverted, active at high level or rising edge"] - pub const NOTINVERTED: Self = Self(0); - #[doc = "ETR is inverted, active at low level or falling edge"] - pub const INVERTED: Self = Self(0x01); - } - } -} -pub mod spi_v2 { - use crate::generic::*; - #[doc = "Serial peripheral interface"] - #[derive(Copy, Clone)] - pub struct Spi(pub *mut u8); - unsafe impl Send for Spi {} - unsafe impl Sync for Spi {} - impl Spi { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "CRC polynomial register"] - pub fn crcpr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "RX CRC register"] - pub fn rxcrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "TX CRC register"] - pub fn txcrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frf(pub u8); - impl Frf { - #[doc = "SPI Motorola mode"] - pub const MOTOROLA: Self = Self(0); - #[doc = "SPI TI mode"] - pub const TI: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ds(pub u8); - impl Ds { - #[doc = "4-bit"] - pub const FOURBIT: Self = Self(0x03); - #[doc = "5-bit"] - pub const FIVEBIT: Self = Self(0x04); - #[doc = "6-bit"] - pub const SIXBIT: Self = Self(0x05); - #[doc = "7-bit"] - pub const SEVENBIT: Self = Self(0x06); - #[doc = "8-bit"] - pub const EIGHTBIT: Self = Self(0x07); - #[doc = "9-bit"] - pub const NINEBIT: Self = Self(0x08); - #[doc = "10-bit"] - pub const TENBIT: Self = Self(0x09); - #[doc = "11-bit"] - pub const ELEVENBIT: Self = Self(0x0a); - #[doc = "12-bit"] - pub const TWELVEBIT: Self = Self(0x0b); - #[doc = "13-bit"] - pub const THIRTEENBIT: Self = Self(0x0c); - #[doc = "14-bit"] - pub const FOURTEENBIT: Self = Self(0x0d); - #[doc = "15-bit"] - pub const FIFTEENBIT: Self = Self(0x0e); - #[doc = "16-bit"] - pub const SIXTEENBIT: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsbfirst(pub u8); - impl Lsbfirst { - #[doc = "Data is transmitted/received with the MSB first"] - pub const MSBFIRST: Self = Self(0); - #[doc = "Data is transmitted/received with the LSB first"] - pub const LSBFIRST: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bidioe(pub u8); - impl Bidioe { - #[doc = "Output disabled (receive-only mode)"] - pub const OUTPUTDISABLED: Self = Self(0); - #[doc = "Output enabled (transmit-only mode)"] - pub const OUTPUTENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rxonly(pub u8); - impl Rxonly { - #[doc = "Full duplex (Transmit and receive)"] - pub const FULLDUPLEX: Self = Self(0); - #[doc = "Output disabled (Receive-only mode)"] - pub const OUTPUTDISABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct LdmaRx(pub u8); - impl LdmaRx { - #[doc = "Number of data to transfer for receive is even"] - pub const EVEN: Self = Self(0); - #[doc = "Number of data to transfer for receive is odd"] - pub const ODD: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crcnext(pub u8); - impl Crcnext { - #[doc = "Next transmit value is from Tx buffer"] - pub const TXBUFFER: Self = Self(0); - #[doc = "Next transmit value is from Tx CRC register"] - pub const CRC: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frlvlr(pub u8); - impl Frlvlr { - #[doc = "Rx FIFO Empty"] - pub const EMPTY: Self = Self(0); - #[doc = "Rx 1/4 FIFO"] - pub const QUARTER: Self = Self(0x01); - #[doc = "Rx 1/2 FIFO"] - pub const HALF: Self = Self(0x02); - #[doc = "Rx FIFO full"] - pub const FULL: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bidimode(pub u8); - impl Bidimode { - #[doc = "2-line unidirectional data mode selected"] - pub const UNIDIRECTIONAL: Self = Self(0); - #[doc = "1-line bidirectional data mode selected"] - pub const BIDIRECTIONAL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mstr(pub u8); - impl Mstr { - #[doc = "Slave configuration"] - pub const SLAVE: Self = Self(0); - #[doc = "Master configuration"] - pub const MASTER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crcl(pub u8); - impl Crcl { - #[doc = "8-bit CRC length"] - pub const EIGHTBIT: Self = Self(0); - #[doc = "16-bit CRC length"] - pub const SIXTEENBIT: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frxth(pub u8); - impl Frxth { - #[doc = "RXNE event is generated if the FIFO level is greater than or equal to 1/2 (16-bit)"] - pub const HALF: Self = Self(0); - #[doc = "RXNE event is generated if the FIFO level is greater than or equal to 1/4 (8-bit)"] - pub const QUARTER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpha(pub u8); - impl Cpha { - #[doc = "The first clock transition is the first data capture edge"] - pub const FIRSTEDGE: Self = Self(0); - #[doc = "The second clock transition is the first data capture edge"] - pub const SECONDEDGE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct LdmaTx(pub u8); - impl LdmaTx { - #[doc = "Number of data to transfer for transmit is even"] - pub const EVEN: Self = Self(0); - #[doc = "Number of data to transfer for transmit is odd"] - pub const ODD: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpol(pub u8); - impl Cpol { - #[doc = "CK to 0 when idle"] - pub const IDLELOW: Self = Self(0); - #[doc = "CK to 1 when idle"] - pub const IDLEHIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Br(pub u8); - impl Br { - #[doc = "f_PCLK / 2"] - pub const DIV2: Self = Self(0); - #[doc = "f_PCLK / 4"] - pub const DIV4: Self = Self(0x01); - #[doc = "f_PCLK / 8"] - pub const DIV8: Self = Self(0x02); - #[doc = "f_PCLK / 16"] - pub const DIV16: Self = Self(0x03); - #[doc = "f_PCLK / 32"] - pub const DIV32: Self = Self(0x04); - #[doc = "f_PCLK / 64"] - pub const DIV64: Self = Self(0x05); - #[doc = "f_PCLK / 128"] - pub const DIV128: Self = Self(0x06); - #[doc = "f_PCLK / 256"] - pub const DIV256: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ftlvlr(pub u8); - impl Ftlvlr { - #[doc = "Tx FIFO Empty"] - pub const EMPTY: Self = Self(0); - #[doc = "Tx 1/4 FIFO"] - pub const QUARTER: Self = Self(0x01); - #[doc = "Tx 1/2 FIFO"] - pub const HALF: Self = Self(0x02); - #[doc = "Tx FIFO full"] - pub const FULL: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frer(pub u8); - impl Frer { - #[doc = "No frame format error"] - pub const NOERROR: Self = Self(0); - #[doc = "A frame format error occurred"] - pub const ERROR: Self = Self(0x01); - } - } - pub mod regs { - use crate::generic::*; - #[doc = "RX CRC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rxcrcr(pub u32); - impl Rxcrcr { - #[doc = "Rx CRC register"] - pub const fn rx_crc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Rx CRC register"] - pub fn set_rx_crc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Rxcrcr { - fn default() -> Rxcrcr { - Rxcrcr(0) - } - } - #[doc = "TX CRC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Txcrcr(pub u32); - impl Txcrcr { - #[doc = "Tx CRC register"] - pub const fn tx_crc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Tx CRC register"] - pub fn set_tx_crc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Txcrcr { - fn default() -> Txcrcr { - Txcrcr(0) - } - } - #[doc = "control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Clock phase"] - pub const fn cpha(&self) -> super::vals::Cpha { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Cpha(val as u8) - } - #[doc = "Clock phase"] - pub fn set_cpha(&mut self, val: super::vals::Cpha) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Clock polarity"] - pub const fn cpol(&self) -> super::vals::Cpol { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Cpol(val as u8) - } - #[doc = "Clock polarity"] - pub fn set_cpol(&mut self, val: super::vals::Cpol) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Master selection"] - pub const fn mstr(&self) -> super::vals::Mstr { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Mstr(val as u8) - } - #[doc = "Master selection"] - pub fn set_mstr(&mut self, val: super::vals::Mstr) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Baud rate control"] - pub const fn br(&self) -> super::vals::Br { - let val = (self.0 >> 3usize) & 0x07; - super::vals::Br(val as u8) - } - #[doc = "Baud rate control"] - pub fn set_br(&mut self, val: super::vals::Br) { - self.0 = (self.0 & !(0x07 << 3usize)) | (((val.0 as u32) & 0x07) << 3usize); - } - #[doc = "SPI enable"] - pub const fn spe(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "SPI enable"] - pub fn set_spe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Frame format"] - pub const fn lsbfirst(&self) -> super::vals::Lsbfirst { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Lsbfirst(val as u8) - } - #[doc = "Frame format"] - pub fn set_lsbfirst(&mut self, val: super::vals::Lsbfirst) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Internal slave select"] - pub const fn ssi(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Internal slave select"] - pub fn set_ssi(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Software slave management"] - pub const fn ssm(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Software slave management"] - pub fn set_ssm(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Receive only"] - pub const fn rxonly(&self) -> super::vals::Rxonly { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Rxonly(val as u8) - } - #[doc = "Receive only"] - pub fn set_rxonly(&mut self, val: super::vals::Rxonly) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "CRC length"] - pub const fn crcl(&self) -> super::vals::Crcl { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Crcl(val as u8) - } - #[doc = "CRC length"] - pub fn set_crcl(&mut self, val: super::vals::Crcl) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "CRC transfer next"] - pub const fn crcnext(&self) -> super::vals::Crcnext { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Crcnext(val as u8) - } - #[doc = "CRC transfer next"] - pub fn set_crcnext(&mut self, val: super::vals::Crcnext) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Hardware CRC calculation enable"] - pub const fn crcen(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Hardware CRC calculation enable"] - pub fn set_crcen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Output enable in bidirectional mode"] - pub const fn bidioe(&self) -> super::vals::Bidioe { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Bidioe(val as u8) - } - #[doc = "Output enable in bidirectional mode"] - pub fn set_bidioe(&mut self, val: super::vals::Bidioe) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "Bidirectional data mode enable"] - pub const fn bidimode(&self) -> super::vals::Bidimode { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Bidimode(val as u8) - } - #[doc = "Bidirectional data mode enable"] - pub fn set_bidimode(&mut self, val: super::vals::Bidimode) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - #[doc = "CRC polynomial register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crcpr(pub u32); - impl Crcpr { - #[doc = "CRC polynomial register"] - pub const fn crcpoly(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "CRC polynomial register"] - pub fn set_crcpoly(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Crcpr { - fn default() -> Crcpr { - Crcpr(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Receive buffer not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Receive buffer not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Transmit buffer empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Transmit buffer empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "CRC error flag"] - pub const fn crcerr(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "CRC error flag"] - pub fn set_crcerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Mode fault"] - pub const fn modf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Mode fault"] - pub fn set_modf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Overrun flag"] - pub const fn ovr(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Overrun flag"] - pub fn set_ovr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Busy flag"] - pub const fn bsy(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Busy flag"] - pub fn set_bsy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Frame format error"] - pub const fn fre(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Frame format error"] - pub fn set_fre(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "FIFO reception level"] - pub const fn frlvl(&self) -> u8 { - let val = (self.0 >> 9usize) & 0x03; - val as u8 - } - #[doc = "FIFO reception level"] - pub fn set_frlvl(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 9usize)) | (((val as u32) & 0x03) << 9usize); - } - #[doc = "FIFO Transmission Level"] - pub const fn ftlvl(&self) -> u8 { - let val = (self.0 >> 11usize) & 0x03; - val as u8 - } - #[doc = "FIFO Transmission Level"] - pub fn set_ftlvl(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 11usize)) | (((val as u32) & 0x03) << 11usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dr(pub u32); - impl Dr { - #[doc = "Data register"] - pub const fn dr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Data register"] - pub fn set_dr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Dr { - fn default() -> Dr { - Dr(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Rx buffer DMA enable"] - pub const fn rxdmaen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Rx buffer DMA enable"] - pub fn set_rxdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Tx buffer DMA enable"] - pub const fn txdmaen(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Tx buffer DMA enable"] - pub fn set_txdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "SS output enable"] - pub const fn ssoe(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "SS output enable"] - pub fn set_ssoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "NSS pulse management"] - pub const fn nssp(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "NSS pulse management"] - pub fn set_nssp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Frame format"] - pub const fn frf(&self) -> super::vals::Frf { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Frf(val as u8) - } - #[doc = "Frame format"] - pub fn set_frf(&mut self, val: super::vals::Frf) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Error interrupt enable"] - pub const fn errie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_errie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "RX buffer not empty interrupt enable"] - pub const fn rxneie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "RX buffer not empty interrupt enable"] - pub fn set_rxneie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Tx buffer empty interrupt enable"] - pub const fn txeie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Tx buffer empty interrupt enable"] - pub fn set_txeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Data size"] - pub const fn ds(&self) -> super::vals::Ds { - let val = (self.0 >> 8usize) & 0x0f; - super::vals::Ds(val as u8) - } - #[doc = "Data size"] - pub fn set_ds(&mut self, val: super::vals::Ds) { - self.0 = (self.0 & !(0x0f << 8usize)) | (((val.0 as u32) & 0x0f) << 8usize); - } - #[doc = "FIFO reception threshold"] - pub const fn frxth(&self) -> super::vals::Frxth { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Frxth(val as u8) - } - #[doc = "FIFO reception threshold"] - pub fn set_frxth(&mut self, val: super::vals::Frxth) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Last DMA transfer for reception"] - pub const fn ldma_rx(&self) -> super::vals::LdmaRx { - let val = (self.0 >> 13usize) & 0x01; - super::vals::LdmaRx(val as u8) - } - #[doc = "Last DMA transfer for reception"] - pub fn set_ldma_rx(&mut self, val: super::vals::LdmaRx) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "Last DMA transfer for transmission"] - pub const fn ldma_tx(&self) -> super::vals::LdmaTx { - let val = (self.0 >> 14usize) & 0x01; - super::vals::LdmaTx(val as u8) - } - #[doc = "Last DMA transfer for transmission"] - pub fn set_ldma_tx(&mut self, val: super::vals::LdmaTx) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - } -} -pub mod flash_h7 { - use crate::generic::*; - #[doc = "Flash"] - #[derive(Copy, Clone)] - pub struct Flash(pub *mut u8); - unsafe impl Send for Flash {} - unsafe impl Sync for Flash {} - impl Flash { - #[doc = "Access control register"] - pub fn acr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Cluster BANK%s, containing KEYR?, CR?, SR?, CCR?, PRAR_CUR?, PRAR_PRG?, SCAR_CUR?, SCAR_PRG?, WPSN_CUR?R, WPSN_PRG?R, CRCCR?, CRCSADD?R, CRCEADD?R, ECC_FA?R"] - pub fn bank(self, n: usize) -> Bank { - assert!(n < 2usize); - unsafe { Bank(self.0.add(4usize + n * 256usize)) } - } - #[doc = "FLASH option key register"] - pub fn optkeyr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "FLASH option control register"] - pub fn optcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "FLASH option status register"] - pub fn optsr_cur(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "FLASH option status register"] - pub fn optsr_prg(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "FLASH option clear control register"] - pub fn optccr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "FLASH register with boot address"] - pub fn boot_curr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(64usize)) } - } - #[doc = "FLASH register with boot address"] - pub fn boot_prgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(68usize)) } - } - #[doc = "FLASH CRC data register"] - pub fn crcdatar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(92usize)) } - } - } - #[doc = "Cluster BANK%s, containing KEYR?, CR?, SR?, CCR?, PRAR_CUR?, PRAR_PRG?, SCAR_CUR?, SCAR_PRG?, WPSN_CUR?R, WPSN_PRG?R, CRCCR?, CRCSADD?R, CRCEADD?R, ECC_FA?R"] - #[derive(Copy, Clone)] - pub struct Bank(pub *mut u8); - unsafe impl Send for Bank {} - unsafe impl Sync for Bank {} - impl Bank { - #[doc = "FLASH key register for bank 1"] - pub fn keyr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "FLASH control register for bank 1"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "FLASH status register for bank 1"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "FLASH clear control register for bank 1"] - pub fn ccr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "FLASH protection address for bank 1"] - pub fn prar_cur(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "FLASH protection address for bank 1"] - pub fn prar_prg(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "FLASH secure address for bank 1"] - pub fn scar_cur(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "FLASH secure address for bank 1"] - pub fn scar_prg(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(48usize)) } - } - #[doc = "FLASH write sector protection for bank 1"] - pub fn wpsn_curr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(52usize)) } - } - #[doc = "FLASH write sector protection for bank 1"] - pub fn wpsn_prgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(56usize)) } - } - #[doc = "FLASH CRC control register for bank 1"] - pub fn crccr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - #[doc = "FLASH CRC start address register for bank 1"] - pub fn crcsaddr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(80usize)) } - } - #[doc = "FLASH CRC end address register for bank 1"] - pub fn crceaddr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(84usize)) } - } - #[doc = "FLASH ECC fail address for bank 1"] - pub fn far(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(92usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "FLASH CRC start address register for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crcsaddr(pub u32); - impl Crcsaddr { - #[doc = "CRC start address on bank 1"] - pub const fn crc_start_addr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "CRC start address on bank 1"] - pub fn set_crc_start_addr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Crcsaddr { - fn default() -> Crcsaddr { - Crcsaddr(0) - } - } - #[doc = "FLASH protection address for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct PrarPrg(pub u32); - impl PrarPrg { - #[doc = "Bank 1 lowest PCROP protected address configuration"] - pub const fn prot_area_start(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Bank 1 lowest PCROP protected address configuration"] - pub fn set_prot_area_start(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Bank 1 highest PCROP protected address configuration"] - pub const fn prot_area_end(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Bank 1 highest PCROP protected address configuration"] - pub fn set_prot_area_end(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - #[doc = "Bank 1 PCROP protected erase enable option configuration bit"] - pub const fn dmep(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 PCROP protected erase enable option configuration bit"] - pub fn set_dmep(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for PrarPrg { - fn default() -> PrarPrg { - PrarPrg(0) - } - } - #[doc = "FLASH key register for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Keyr(pub u32); - impl Keyr { - #[doc = "Bank 1 access configuration unlock key"] - pub const fn keyr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Bank 1 access configuration unlock key"] - pub fn set_keyr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Keyr { - fn default() -> Keyr { - Keyr(0) - } - } - #[doc = "FLASH option control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Optcr(pub u32); - impl Optcr { - #[doc = "FLASH_OPTCR lock option configuration bit"] - pub const fn optlock(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "FLASH_OPTCR lock option configuration bit"] - pub fn set_optlock(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Option byte start change option configuration bit"] - pub const fn optstart(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Option byte start change option configuration bit"] - pub fn set_optstart(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Flash mass erase enable bit"] - pub const fn mer(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Flash mass erase enable bit"] - pub fn set_mer(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Option byte change error interrupt enable bit"] - pub const fn optchangeerrie(&self) -> bool { - let val = (self.0 >> 30usize) & 0x01; - val != 0 - } - #[doc = "Option byte change error interrupt enable bit"] - pub fn set_optchangeerrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); - } - #[doc = "Bank swapping configuration bit"] - pub const fn swap_bank(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Bank swapping configuration bit"] - pub fn set_swap_bank(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for Optcr { - fn default() -> Optcr { - Optcr(0) - } - } - #[doc = "FLASH CRC control register for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crccr(pub u32); - impl Crccr { - #[doc = "Bank 1 CRC sector number"] - pub const fn crc_sect(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x07; - val as u8 - } - #[doc = "Bank 1 CRC sector number"] - pub fn set_crc_sect(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); - } - #[doc = "Bank 1 CRC select bit"] - pub const fn all_bank(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC select bit"] - pub fn set_all_bank(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Bank 1 CRC sector mode select bit"] - pub const fn crc_by_sect(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC sector mode select bit"] - pub fn set_crc_by_sect(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Bank 1 CRC sector select bit"] - pub const fn add_sect(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC sector select bit"] - pub fn set_add_sect(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Bank 1 CRC sector list clear bit"] - pub const fn clean_sect(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC sector list clear bit"] - pub fn set_clean_sect(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Bank 1 CRC start bit"] - pub const fn start_crc(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC start bit"] - pub fn set_start_crc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Bank 1 CRC clear bit"] - pub const fn clean_crc(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC clear bit"] - pub fn set_clean_crc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Bank 1 CRC burst size"] - pub const fn crc_burst(&self) -> u8 { - let val = (self.0 >> 20usize) & 0x03; - val as u8 - } - #[doc = "Bank 1 CRC burst size"] - pub fn set_crc_burst(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 20usize)) | (((val as u32) & 0x03) << 20usize); - } - } - impl Default for Crccr { - fn default() -> Crccr { - Crccr(0) - } - } - #[doc = "FLASH write sector protection for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct WpsnPrgr(pub u32); - impl WpsnPrgr { - #[doc = "Bank 1 sector write protection configuration byte"] - pub const fn wrpsn(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Bank 1 sector write protection configuration byte"] - pub fn set_wrpsn(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for WpsnPrgr { - fn default() -> WpsnPrgr { - WpsnPrgr(0) - } - } - #[doc = "FLASH option status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct OptsrPrg(pub u32); - impl OptsrPrg { - #[doc = "BOR reset level option configuration bits"] - pub const fn bor_lev(&self) -> u8 { - let val = (self.0 >> 2usize) & 0x03; - val as u8 - } - #[doc = "BOR reset level option configuration bits"] - pub fn set_bor_lev(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 2usize)) | (((val as u32) & 0x03) << 2usize); - } - #[doc = "IWDG1 option configuration bit"] - pub const fn iwdg1_hw(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IWDG1 option configuration bit"] - pub fn set_iwdg1_hw(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Option byte erase after D1 DStop option configuration bit"] - pub const fn n_rst_stop_d1(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Option byte erase after D1 DStop option configuration bit"] - pub fn set_n_rst_stop_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Option byte erase after D1 DStandby option configuration bit"] - pub const fn n_rst_stby_d1(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Option byte erase after D1 DStandby option configuration bit"] - pub fn set_n_rst_stby_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Readout protection level option configuration byte"] - pub const fn rdp(&self) -> u8 { - let val = (self.0 >> 8usize) & 0xff; - val as u8 - } - #[doc = "Readout protection level option configuration byte"] - pub fn set_rdp(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); - } - #[doc = "IWDG Stop mode freeze option configuration bit"] - pub const fn fz_iwdg_stop(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "IWDG Stop mode freeze option configuration bit"] - pub fn set_fz_iwdg_stop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "IWDG Standby mode freeze option configuration bit"] - pub const fn fz_iwdg_sdby(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "IWDG Standby mode freeze option configuration bit"] - pub fn set_fz_iwdg_sdby(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "DTCM size select option configuration bits"] - pub const fn st_ram_size(&self) -> u8 { - let val = (self.0 >> 19usize) & 0x03; - val as u8 - } - #[doc = "DTCM size select option configuration bits"] - pub fn set_st_ram_size(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 19usize)) | (((val as u32) & 0x03) << 19usize); - } - #[doc = "Security option configuration bit"] - pub const fn security(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "Security option configuration bit"] - pub fn set_security(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "User option configuration bit 1"] - pub const fn rss1(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "User option configuration bit 1"] - pub fn set_rss1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "User option configuration bit 2"] - pub const fn rss2(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "User option configuration bit 2"] - pub fn set_rss2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - #[doc = "I/O high-speed at low-voltage (PRODUCT_BELOW_25V)"] - pub const fn io_hslv(&self) -> bool { - let val = (self.0 >> 29usize) & 0x01; - val != 0 - } - #[doc = "I/O high-speed at low-voltage (PRODUCT_BELOW_25V)"] - pub fn set_io_hslv(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); - } - #[doc = "Bank swapping option configuration bit"] - pub const fn swap_bank_opt(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Bank swapping option configuration bit"] - pub fn set_swap_bank_opt(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for OptsrPrg { - fn default() -> OptsrPrg { - OptsrPrg(0) - } - } - #[doc = "Access control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Acr(pub u32); - impl Acr { - #[doc = "Read latency"] - pub const fn latency(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x07; - val as u8 - } - #[doc = "Read latency"] - pub fn set_latency(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); - } - #[doc = "Flash signal delay"] - pub const fn wrhighfreq(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x03; - val as u8 - } - #[doc = "Flash signal delay"] - pub fn set_wrhighfreq(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 4usize)) | (((val as u32) & 0x03) << 4usize); - } - } - impl Default for Acr { - fn default() -> Acr { - Acr(0) - } - } - #[doc = "FLASH control register for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Bank 1 configuration lock bit"] - pub const fn lock(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 configuration lock bit"] - pub fn set_lock(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Bank 1 program enable bit"] - pub const fn pg(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 program enable bit"] - pub fn set_pg(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Bank 1 sector erase request"] - pub const fn ser(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 sector erase request"] - pub fn set_ser(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Bank 1 erase request"] - pub const fn ber(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 erase request"] - pub fn set_ber(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Bank 1 program size"] - pub const fn psize(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x03; - val as u8 - } - #[doc = "Bank 1 program size"] - pub fn set_psize(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 4usize)) | (((val as u32) & 0x03) << 4usize); - } - #[doc = "Bank 1 write forcing control bit"] - pub const fn fw(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 write forcing control bit"] - pub fn set_fw(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Bank 1 bank or sector erase start control bit"] - pub const fn start(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 bank or sector erase start control bit"] - pub fn set_start(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Bank 1 sector erase selection number"] - pub const fn snb(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x07; - val as u8 - } - #[doc = "Bank 1 sector erase selection number"] - pub fn set_snb(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 8usize)) | (((val as u32) & 0x07) << 8usize); - } - #[doc = "Bank 1 CRC control bit"] - pub const fn crc_en(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC control bit"] - pub fn set_crc_en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "Bank 1 end-of-program interrupt control bit"] - pub const fn eopie(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 end-of-program interrupt control bit"] - pub fn set_eopie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Bank 1 write protection error interrupt enable bit"] - pub const fn wrperrie(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 write protection error interrupt enable bit"] - pub fn set_wrperrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Bank 1 programming sequence error interrupt enable bit"] - pub const fn pgserrie(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 programming sequence error interrupt enable bit"] - pub fn set_pgserrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Bank 1 strobe error interrupt enable bit"] - pub const fn strberrie(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 strobe error interrupt enable bit"] - pub fn set_strberrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "Bank 1 inconsistency error interrupt enable bit"] - pub const fn incerrie(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 inconsistency error interrupt enable bit"] - pub fn set_incerrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "Bank 1 write/erase error interrupt enable bit"] - pub const fn operrie(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 write/erase error interrupt enable bit"] - pub fn set_operrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Bank 1 read protection error interrupt enable bit"] - pub const fn rdperrie(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 read protection error interrupt enable bit"] - pub fn set_rdperrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "Bank 1 secure error interrupt enable bit"] - pub const fn rdserrie(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 secure error interrupt enable bit"] - pub fn set_rdserrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "Bank 1 ECC single correction error interrupt enable bit"] - pub const fn sneccerrie(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 ECC single correction error interrupt enable bit"] - pub fn set_sneccerrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "Bank 1 ECC double detection error interrupt enable bit"] - pub const fn dbeccerrie(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 ECC double detection error interrupt enable bit"] - pub fn set_dbeccerrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "Bank 1 end of CRC calculation interrupt enable bit"] - pub const fn crcendie(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 end of CRC calculation interrupt enable bit"] - pub fn set_crcendie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - #[doc = "FLASH option status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct OptsrCur(pub u32); - impl OptsrCur { - #[doc = "Option byte change ongoing flag"] - pub const fn opt_busy(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Option byte change ongoing flag"] - pub fn set_opt_busy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Brownout level option status bit"] - pub const fn bor_lev(&self) -> u8 { - let val = (self.0 >> 2usize) & 0x03; - val as u8 - } - #[doc = "Brownout level option status bit"] - pub fn set_bor_lev(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 2usize)) | (((val as u32) & 0x03) << 2usize); - } - #[doc = "IWDG1 control option status bit"] - pub const fn iwdg1_hw(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "IWDG1 control option status bit"] - pub fn set_iwdg1_hw(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "D1 DStop entry reset option status bit"] - pub const fn n_rst_stop_d1(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "D1 DStop entry reset option status bit"] - pub fn set_n_rst_stop_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "D1 DStandby entry reset option status bit"] - pub const fn n_rst_stby_d1(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "D1 DStandby entry reset option status bit"] - pub fn set_n_rst_stby_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Readout protection level option status byte"] - pub const fn rdp(&self) -> u8 { - let val = (self.0 >> 8usize) & 0xff; - val as u8 - } - #[doc = "Readout protection level option status byte"] - pub fn set_rdp(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); - } - #[doc = "IWDG Stop mode freeze option status bit"] - pub const fn fz_iwdg_stop(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "IWDG Stop mode freeze option status bit"] - pub fn set_fz_iwdg_stop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "IWDG Standby mode freeze option status bit"] - pub const fn fz_iwdg_sdby(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "IWDG Standby mode freeze option status bit"] - pub fn set_fz_iwdg_sdby(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "DTCM RAM size option status"] - pub const fn st_ram_size(&self) -> u8 { - let val = (self.0 >> 19usize) & 0x03; - val as u8 - } - #[doc = "DTCM RAM size option status"] - pub fn set_st_ram_size(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 19usize)) | (((val as u32) & 0x03) << 19usize); - } - #[doc = "Security enable option status bit"] - pub const fn security(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "Security enable option status bit"] - pub fn set_security(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "User option bit 1"] - pub const fn rss1(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "User option bit 1"] - pub fn set_rss1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "Device personalization status bit"] - pub const fn perso_ok(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "Device personalization status bit"] - pub fn set_perso_ok(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - #[doc = "I/O high-speed at low-voltage status bit (PRODUCT_BELOW_25V)"] - pub const fn io_hslv(&self) -> bool { - let val = (self.0 >> 29usize) & 0x01; - val != 0 - } - #[doc = "I/O high-speed at low-voltage status bit (PRODUCT_BELOW_25V)"] - pub fn set_io_hslv(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); - } - #[doc = "Option byte change error flag"] - pub const fn optchangeerr(&self) -> bool { - let val = (self.0 >> 30usize) & 0x01; - val != 0 - } - #[doc = "Option byte change error flag"] - pub fn set_optchangeerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); - } - #[doc = "Bank swapping option status bit"] - pub const fn swap_bank_opt(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Bank swapping option status bit"] - pub fn set_swap_bank_opt(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for OptsrCur { - fn default() -> OptsrCur { - OptsrCur(0) - } - } - #[doc = "FLASH secure address for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct ScarPrg(pub u32); - impl ScarPrg { - #[doc = "Bank 1 lowest secure protected address configuration"] - pub const fn sec_area_start(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Bank 1 lowest secure protected address configuration"] - pub fn set_sec_area_start(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Bank 1 highest secure protected address configuration"] - pub const fn sec_area_end(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Bank 1 highest secure protected address configuration"] - pub fn set_sec_area_end(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - #[doc = "Bank 1 secure protected erase enable option configuration bit"] - pub const fn dmes(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 secure protected erase enable option configuration bit"] - pub fn set_dmes(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for ScarPrg { - fn default() -> ScarPrg { - ScarPrg(0) - } - } - #[doc = "FLASH option clear control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Optccr(pub u32); - impl Optccr { - #[doc = "OPTCHANGEERR reset bit"] - pub const fn clr_optchangeerr(&self) -> bool { - let val = (self.0 >> 30usize) & 0x01; - val != 0 - } - #[doc = "OPTCHANGEERR reset bit"] - pub fn set_clr_optchangeerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); - } - } - impl Default for Optccr { - fn default() -> Optccr { - Optccr(0) - } - } - #[doc = "FLASH write sector protection for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct WpsnCurr(pub u32); - impl WpsnCurr { - #[doc = "Bank 1 sector write protection option status byte"] - pub const fn wrpsn(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Bank 1 sector write protection option status byte"] - pub fn set_wrpsn(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for WpsnCurr { - fn default() -> WpsnCurr { - WpsnCurr(0) - } - } - #[doc = "FLASH register with boot address"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct BootPrgr(pub u32); - impl BootPrgr { - #[doc = "Boot address 0"] - pub const fn boot_add0(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Boot address 0"] - pub fn set_boot_add0(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - #[doc = "Boot address 1"] - pub const fn boot_add1(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Boot address 1"] - pub fn set_boot_add1(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for BootPrgr { - fn default() -> BootPrgr { - BootPrgr(0) - } - } - #[doc = "FLASH CRC data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crcdatar(pub u32); - impl Crcdatar { - #[doc = "CRC result"] - pub const fn crc_data(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "CRC result"] - pub fn set_crc_data(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Crcdatar { - fn default() -> Crcdatar { - Crcdatar(0) - } - } - #[doc = "FLASH option key register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Optkeyr(pub u32); - impl Optkeyr { - #[doc = "Unlock key option bytes"] - pub const fn optkeyr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Unlock key option bytes"] - pub fn set_optkeyr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Optkeyr { - fn default() -> Optkeyr { - Optkeyr(0) - } - } - #[doc = "FLASH status register for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Bank 1 ongoing program flag"] - pub const fn bsy(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 ongoing program flag"] - pub fn set_bsy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Bank 1 write buffer not empty flag"] - pub const fn wbne(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 write buffer not empty flag"] - pub fn set_wbne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Bank 1 wait queue flag"] - pub const fn qw(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 wait queue flag"] - pub fn set_qw(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Bank 1 CRC busy flag"] - pub const fn crc_busy(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC busy flag"] - pub fn set_crc_busy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Bank 1 end-of-program flag"] - pub const fn eop(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 end-of-program flag"] - pub fn set_eop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Bank 1 write protection error flag"] - pub const fn wrperr(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 write protection error flag"] - pub fn set_wrperr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Bank 1 programming sequence error flag"] - pub const fn pgserr(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 programming sequence error flag"] - pub fn set_pgserr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Bank 1 strobe error flag"] - pub const fn strberr(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 strobe error flag"] - pub fn set_strberr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "Bank 1 inconsistency error flag"] - pub const fn incerr(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 inconsistency error flag"] - pub fn set_incerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "Bank 1 write/erase error flag"] - pub const fn operr(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 write/erase error flag"] - pub fn set_operr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Bank 1 read protection error flag"] - pub const fn rdperr(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 read protection error flag"] - pub fn set_rdperr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "Bank 1 secure error flag"] - pub const fn rdserr(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 secure error flag"] - pub fn set_rdserr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "Bank 1 single correction error flag"] - pub const fn sneccerr1(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 single correction error flag"] - pub fn set_sneccerr1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "Bank 1 ECC double detection error flag"] - pub const fn dbeccerr(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 ECC double detection error flag"] - pub fn set_dbeccerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "Bank 1 CRC-complete flag"] - pub const fn crcend(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRC-complete flag"] - pub fn set_crcend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "FLASH clear control register for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ccr(pub u32); - impl Ccr { - #[doc = "Bank 1 EOP1 flag clear bit"] - pub const fn clr_eop(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 EOP1 flag clear bit"] - pub fn set_clr_eop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Bank 1 WRPERR1 flag clear bit"] - pub const fn clr_wrperr(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 WRPERR1 flag clear bit"] - pub fn set_clr_wrperr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Bank 1 PGSERR1 flag clear bi"] - pub const fn clr_pgserr(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 PGSERR1 flag clear bi"] - pub fn set_clr_pgserr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Bank 1 STRBERR1 flag clear bit"] - pub const fn clr_strberr(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 STRBERR1 flag clear bit"] - pub fn set_clr_strberr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "Bank 1 INCERR1 flag clear bit"] - pub const fn clr_incerr(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 INCERR1 flag clear bit"] - pub fn set_clr_incerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "Bank 1 OPERR1 flag clear bit"] - pub const fn clr_operr(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 OPERR1 flag clear bit"] - pub fn set_clr_operr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Bank 1 RDPERR1 flag clear bit"] - pub const fn clr_rdperr(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 RDPERR1 flag clear bit"] - pub fn set_clr_rdperr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "Bank 1 RDSERR1 flag clear bit"] - pub const fn clr_rdserr(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 RDSERR1 flag clear bit"] - pub fn set_clr_rdserr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "Bank 1 SNECCERR1 flag clear bit"] - pub const fn clr_sneccerr(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 SNECCERR1 flag clear bit"] - pub fn set_clr_sneccerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "Bank 1 DBECCERR1 flag clear bit"] - pub const fn clr_dbeccerr(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 DBECCERR1 flag clear bit"] - pub fn set_clr_dbeccerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "Bank 1 CRCEND1 flag clear bit"] - pub const fn clr_crcend(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 CRCEND1 flag clear bit"] - pub fn set_clr_crcend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - } - impl Default for Ccr { - fn default() -> Ccr { - Ccr(0) - } - } - #[doc = "FLASH register with boot address"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct BootCurr(pub u32); - impl BootCurr { - #[doc = "Boot address 0"] - pub const fn boot_add0(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Boot address 0"] - pub fn set_boot_add0(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - #[doc = "Boot address 1"] - pub const fn boot_add1(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Boot address 1"] - pub fn set_boot_add1(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for BootCurr { - fn default() -> BootCurr { - BootCurr(0) - } - } - #[doc = "FLASH secure address for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct ScarCur(pub u32); - impl ScarCur { - #[doc = "Bank 1 lowest secure protected address"] - pub const fn sec_area_start(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Bank 1 lowest secure protected address"] - pub fn set_sec_area_start(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Bank 1 highest secure protected address"] - pub const fn sec_area_end(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Bank 1 highest secure protected address"] - pub fn set_sec_area_end(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - #[doc = "Bank 1 secure protected erase enable option status bit"] - pub const fn dmes(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 secure protected erase enable option status bit"] - pub fn set_dmes(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for ScarCur { - fn default() -> ScarCur { - ScarCur(0) - } - } - #[doc = "FLASH CRC end address register for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crceaddr(pub u32); - impl Crceaddr { - #[doc = "CRC end address on bank 1"] - pub const fn crc_end_addr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "CRC end address on bank 1"] - pub fn set_crc_end_addr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Crceaddr { - fn default() -> Crceaddr { - Crceaddr(0) - } - } - #[doc = "FLASH protection address for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct PrarCur(pub u32); - impl PrarCur { - #[doc = "Bank 1 lowest PCROP protected address"] - pub const fn prot_area_start(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Bank 1 lowest PCROP protected address"] - pub fn set_prot_area_start(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Bank 1 highest PCROP protected address"] - pub const fn prot_area_end(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Bank 1 highest PCROP protected address"] - pub fn set_prot_area_end(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - #[doc = "Bank 1 PCROP protected erase enable option status bit"] - pub const fn dmep(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "Bank 1 PCROP protected erase enable option status bit"] - pub fn set_dmep(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for PrarCur { - fn default() -> PrarCur { - PrarCur(0) - } - } - #[doc = "FLASH ECC fail address for bank 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Far(pub u32); - impl Far { - #[doc = "Bank 1 ECC error address"] - pub const fn fail_ecc_addr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x7fff; - val as u16 - } - #[doc = "Bank 1 ECC error address"] - pub fn set_fail_ecc_addr(&mut self, val: u16) { - self.0 = (self.0 & !(0x7fff << 0usize)) | (((val as u32) & 0x7fff) << 0usize); - } - } - impl Default for Far { - fn default() -> Far { - Far(0) - } - } - } -} -pub mod syscfg_l4 { - use crate::generic::*; - #[doc = "System configuration controller"] - #[derive(Copy, Clone)] - pub struct Syscfg(pub *mut u8); - unsafe impl Send for Syscfg {} - unsafe impl Sync for Syscfg {} - impl Syscfg { - #[doc = "memory remap register"] - pub fn memrmp(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "configuration register 1"] - pub fn cfgr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "external interrupt configuration register 1"] - pub fn exticr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } - } - #[doc = "SCSR"] - pub fn scsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "CFGR2"] - pub fn cfgr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "SWPR"] - pub fn swpr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "SKR"] - pub fn skr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "CFGR2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr2(pub u32); - impl Cfgr2 { - #[doc = "Cortex LOCKUP (Hardfault) output enable bit"] - pub const fn cll(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Cortex LOCKUP (Hardfault) output enable bit"] - pub fn set_cll(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "SRAM2 parity lock bit"] - pub const fn spl(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "SRAM2 parity lock bit"] - pub fn set_spl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "PVD lock enable bit"] - pub const fn pvdl(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "PVD lock enable bit"] - pub fn set_pvdl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "ECC Lock"] - pub const fn eccl(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "ECC Lock"] - pub fn set_eccl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "SRAM2 parity error flag"] - pub const fn spf(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "SRAM2 parity error flag"] - pub fn set_spf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Cfgr2 { - fn default() -> Cfgr2 { - Cfgr2(0) - } - } - #[doc = "SKR"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Skr(pub u32); - impl Skr { - #[doc = "SRAM2 write protection key for software erase"] - pub const fn key(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "SRAM2 write protection key for software erase"] - pub fn set_key(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for Skr { - fn default() -> Skr { - Skr(0) - } - } - #[doc = "SWPR"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Swpr(pub u32); - impl Swpr { - #[doc = "SRAWM2 write protection."] - pub fn pwp(&self, n: usize) -> bool { - assert!(n < 32usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "SRAWM2 write protection."] - pub fn set_pwp(&mut self, n: usize, val: bool) { - assert!(n < 32usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Swpr { - fn default() -> Swpr { - Swpr(0) - } - } - #[doc = "SCSR"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Scsr(pub u32); - impl Scsr { - #[doc = "SRAM2 Erase"] - pub const fn sram2er(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "SRAM2 Erase"] - pub fn set_sram2er(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "SRAM2 busy by erase operation"] - pub const fn sram2bsy(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "SRAM2 busy by erase operation"] - pub fn set_sram2bsy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - } - impl Default for Scsr { - fn default() -> Scsr { - Scsr(0) - } - } - #[doc = "memory remap register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Memrmp(pub u32); - impl Memrmp { - #[doc = "Memory mapping selection"] - pub const fn mem_mode(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x07; - val as u8 - } - #[doc = "Memory mapping selection"] - pub fn set_mem_mode(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); - } - #[doc = "QUADSPI memory mapping swap"] - pub const fn qfs(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "QUADSPI memory mapping swap"] - pub fn set_qfs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Flash Bank mode selection"] - pub const fn fb_mode(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Flash Bank mode selection"] - pub fn set_fb_mode(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Memrmp { - fn default() -> Memrmp { - Memrmp(0) - } - } - #[doc = "configuration register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr1(pub u32); - impl Cfgr1 { - #[doc = "Firewall disable"] - pub const fn fwdis(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Firewall disable"] - pub fn set_fwdis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "I/O analog switch voltage booster enable"] - pub const fn boosten(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "I/O analog switch voltage booster enable"] - pub fn set_boosten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB6"] - pub const fn i2c_pb6_fmp(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB6"] - pub fn set_i2c_pb6_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB7"] - pub const fn i2c_pb7_fmp(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB7"] - pub fn set_i2c_pb7_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB8"] - pub const fn i2c_pb8_fmp(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB8"] - pub fn set_i2c_pb8_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB9"] - pub const fn i2c_pb9_fmp(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Fast-mode Plus (Fm+) driving capability activation on PB9"] - pub fn set_i2c_pb9_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "I2C1 Fast-mode Plus driving capability activation"] - pub const fn i2c1_fmp(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "I2C1 Fast-mode Plus driving capability activation"] - pub fn set_i2c1_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "I2C2 Fast-mode Plus driving capability activation"] - pub const fn i2c2_fmp(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "I2C2 Fast-mode Plus driving capability activation"] - pub fn set_i2c2_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "I2C3 Fast-mode Plus driving capability activation"] - pub const fn i2c3_fmp(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "I2C3 Fast-mode Plus driving capability activation"] - pub fn set_i2c3_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Floating Point Unit interrupts enable bits"] - pub const fn fpu_ie(&self) -> u8 { - let val = (self.0 >> 26usize) & 0x3f; - val as u8 - } - #[doc = "Floating Point Unit interrupts enable bits"] - pub fn set_fpu_ie(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 26usize)) | (((val as u32) & 0x3f) << 26usize); - } - } - impl Default for Cfgr1 { - fn default() -> Cfgr1 { - Cfgr1(0) - } - } - #[doc = "external interrupt configuration register 4"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Exticr(pub u32); - impl Exticr { - #[doc = "EXTI12 configuration bits"] - pub fn exti(&self, n: usize) -> u8 { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x0f; - val as u8 - } - #[doc = "EXTI12 configuration bits"] - pub fn set_exti(&mut self, n: usize, val: u8) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val as u32) & 0x0f) << offs); - } - } - impl Default for Exticr { - fn default() -> Exticr { - Exticr(0) - } - } - } -} -pub mod i2c_v1 { - use crate::generic::*; - #[doc = "Inter-integrated circuit"] - #[derive(Copy, Clone)] - pub struct I2c(pub *mut u8); - unsafe impl Send for I2c {} - unsafe impl Sync for I2c {} - impl I2c { - #[doc = "Control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Own address register 1"] - pub fn oar1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "Own address register 2"] - pub fn oar2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Status register 1"] - pub fn sr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Status register 2"] - pub fn sr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "Clock control register"] - pub fn ccr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "TRISE register"] - pub fn trise(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "FLTR register"] - pub fn fltr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "Own address register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Oar2(pub u32); - impl Oar2 { - #[doc = "Dual addressing mode enable"] - pub const fn endual(&self) -> super::vals::Endual { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Endual(val as u8) - } - #[doc = "Dual addressing mode enable"] - pub fn set_endual(&mut self, val: super::vals::Endual) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Interface address"] - pub const fn add2(&self) -> u8 { - let val = (self.0 >> 1usize) & 0x7f; - val as u8 - } - #[doc = "Interface address"] - pub fn set_add2(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 1usize)) | (((val as u32) & 0x7f) << 1usize); - } - } - impl Default for Oar2 { - fn default() -> Oar2 { - Oar2(0) - } - } - #[doc = "Control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Peripheral clock frequency"] - pub const fn freq(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x3f; - val as u8 - } - #[doc = "Peripheral clock frequency"] - pub fn set_freq(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); - } - #[doc = "Error interrupt enable"] - pub const fn iterren(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_iterren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Event interrupt enable"] - pub const fn itevten(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Event interrupt enable"] - pub fn set_itevten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Buffer interrupt enable"] - pub const fn itbufen(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Buffer interrupt enable"] - pub fn set_itbufen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "DMA requests enable"] - pub const fn dmaen(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "DMA requests enable"] - pub fn set_dmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "DMA last transfer"] - pub const fn last(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "DMA last transfer"] - pub fn set_last(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "Clock control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ccr(pub u32); - impl Ccr { - #[doc = "Clock control register in Fast/Standard mode (Master mode)"] - pub const fn ccr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Clock control register in Fast/Standard mode (Master mode)"] - pub fn set_ccr(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Fast mode duty cycle"] - pub const fn duty(&self) -> super::vals::Duty { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Duty(val as u8) - } - #[doc = "Fast mode duty cycle"] - pub fn set_duty(&mut self, val: super::vals::Duty) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "I2C master mode selection"] - pub const fn f_s(&self) -> super::vals::FS { - let val = (self.0 >> 15usize) & 0x01; - super::vals::FS(val as u8) - } - #[doc = "I2C master mode selection"] - pub fn set_f_s(&mut self, val: super::vals::FS) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - } - impl Default for Ccr { - fn default() -> Ccr { - Ccr(0) - } - } - #[doc = "Data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dr(pub u32); - impl Dr { - #[doc = "8-bit data register"] - pub const fn dr(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "8-bit data register"] - pub fn set_dr(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - } - impl Default for Dr { - fn default() -> Dr { - Dr(0) - } - } - #[doc = "Own address register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Oar1(pub u32); - impl Oar1 { - #[doc = "Interface address"] - pub const fn add(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x03ff; - val as u16 - } - #[doc = "Interface address"] - pub fn set_add(&mut self, val: u16) { - self.0 = (self.0 & !(0x03ff << 0usize)) | (((val as u32) & 0x03ff) << 0usize); - } - #[doc = "Addressing mode (slave mode)"] - pub const fn addmode(&self) -> super::vals::Addmode { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Addmode(val as u8) - } - #[doc = "Addressing mode (slave mode)"] - pub fn set_addmode(&mut self, val: super::vals::Addmode) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - } - impl Default for Oar1 { - fn default() -> Oar1 { - Oar1(0) - } - } - #[doc = "FLTR register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Fltr(pub u32); - impl Fltr { - #[doc = "Digital noise filter"] - pub const fn dnf(&self) -> super::vals::Dnf { - let val = (self.0 >> 0usize) & 0x0f; - super::vals::Dnf(val as u8) - } - #[doc = "Digital noise filter"] - pub fn set_dnf(&mut self, val: super::vals::Dnf) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val.0 as u32) & 0x0f) << 0usize); - } - #[doc = "Analog noise filter"] - pub const fn anoff(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Analog noise filter"] - pub fn set_anoff(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - } - impl Default for Fltr { - fn default() -> Fltr { - Fltr(0) - } - } - #[doc = "TRISE register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Trise(pub u32); - impl Trise { - #[doc = "Maximum rise time in Fast/Standard mode (Master mode)"] - pub const fn trise(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x3f; - val as u8 - } - #[doc = "Maximum rise time in Fast/Standard mode (Master mode)"] - pub fn set_trise(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); - } - } - impl Default for Trise { - fn default() -> Trise { - Trise(0) - } - } - #[doc = "Status register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr1(pub u32); - impl Sr1 { - #[doc = "Start bit (Master mode)"] - pub const fn sb(&self) -> super::vals::Sb { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Sb(val as u8) - } - #[doc = "Start bit (Master mode)"] - pub fn set_sb(&mut self, val: super::vals::Sb) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Address sent (master mode)/matched (slave mode)"] - pub const fn addr(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Address sent (master mode)/matched (slave mode)"] - pub fn set_addr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Byte transfer finished"] - pub const fn btf(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Byte transfer finished"] - pub fn set_btf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "10-bit header sent (Master mode)"] - pub const fn add10(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "10-bit header sent (Master mode)"] - pub fn set_add10(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Stop detection (slave mode)"] - pub const fn stopf(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Stop detection (slave mode)"] - pub fn set_stopf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Data register not empty (receivers)"] - pub const fn rx_ne(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Data register not empty (receivers)"] - pub fn set_rx_ne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Data register empty (transmitters)"] - pub const fn tx_e(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Data register empty (transmitters)"] - pub fn set_tx_e(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Bus error"] - pub const fn berr(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Bus error"] - pub fn set_berr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Arbitration lost (master mode)"] - pub const fn arlo(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Arbitration lost (master mode)"] - pub fn set_arlo(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Acknowledge failure"] - pub const fn af(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Acknowledge failure"] - pub fn set_af(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Overrun/Underrun"] - pub const fn ovr(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Overrun/Underrun"] - pub fn set_ovr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "PEC Error in reception"] - pub const fn pecerr(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "PEC Error in reception"] - pub fn set_pecerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Timeout or Tlow error"] - pub const fn timeout(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Timeout or Tlow error"] - pub fn set_timeout(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "SMBus alert"] - pub const fn smbalert(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "SMBus alert"] - pub fn set_smbalert(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - } - impl Default for Sr1 { - fn default() -> Sr1 { - Sr1(0) - } - } - #[doc = "Status register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr2(pub u32); - impl Sr2 { - #[doc = "Master/slave"] - pub const fn msl(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Master/slave"] - pub fn set_msl(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Bus busy"] - pub const fn busy(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Bus busy"] - pub fn set_busy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Transmitter/receiver"] - pub const fn tra(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Transmitter/receiver"] - pub fn set_tra(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "General call address (Slave mode)"] - pub const fn gencall(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "General call address (Slave mode)"] - pub fn set_gencall(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "SMBus device default address (Slave mode)"] - pub const fn smbdefault(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "SMBus device default address (Slave mode)"] - pub fn set_smbdefault(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "SMBus host header (Slave mode)"] - pub const fn smbhost(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "SMBus host header (Slave mode)"] - pub fn set_smbhost(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Dual flag (Slave mode)"] - pub const fn dualf(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Dual flag (Slave mode)"] - pub fn set_dualf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "acket error checking register"] - pub const fn pec(&self) -> u8 { - let val = (self.0 >> 8usize) & 0xff; - val as u8 - } - #[doc = "acket error checking register"] - pub fn set_pec(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); - } - } - impl Default for Sr2 { - fn default() -> Sr2 { - Sr2(0) - } - } - #[doc = "Control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Peripheral enable"] - pub const fn pe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Peripheral enable"] - pub fn set_pe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "SMBus mode"] - pub const fn smbus(&self) -> super::vals::Smbus { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Smbus(val as u8) - } - #[doc = "SMBus mode"] - pub fn set_smbus(&mut self, val: super::vals::Smbus) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "SMBus type"] - pub const fn smbtype(&self) -> super::vals::Smbtype { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Smbtype(val as u8) - } - #[doc = "SMBus type"] - pub fn set_smbtype(&mut self, val: super::vals::Smbtype) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "ARP enable"] - pub const fn enarp(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "ARP enable"] - pub fn set_enarp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "PEC enable"] - pub const fn enpec(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "PEC enable"] - pub fn set_enpec(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "General call enable"] - pub const fn engc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "General call enable"] - pub fn set_engc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Clock stretching disable (Slave mode)"] - pub const fn nostretch(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Clock stretching disable (Slave mode)"] - pub fn set_nostretch(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Start generation"] - pub const fn start(&self) -> super::vals::Start { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Start(val as u8) - } - #[doc = "Start generation"] - pub fn set_start(&mut self, val: super::vals::Start) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "Stop generation"] - pub const fn stop(&self) -> super::vals::Stop { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Stop(val as u8) - } - #[doc = "Stop generation"] - pub fn set_stop(&mut self, val: super::vals::Stop) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Acknowledge enable"] - pub const fn ack(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Acknowledge enable"] - pub fn set_ack(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Acknowledge/PEC Position (for data reception)"] - pub const fn pos(&self) -> super::vals::Pos { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Pos(val as u8) - } - #[doc = "Acknowledge/PEC Position (for data reception)"] - pub fn set_pos(&mut self, val: super::vals::Pos) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "Packet error checking"] - pub const fn pec(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Packet error checking"] - pub fn set_pec(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "SMBus alert"] - pub const fn alert(&self) -> super::vals::Alert { - let val = (self.0 >> 13usize) & 0x01; - super::vals::Alert(val as u8) - } - #[doc = "SMBus alert"] - pub fn set_alert(&mut self, val: super::vals::Alert) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "Software reset"] - pub const fn swrst(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Software reset"] - pub fn set_swrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Smbus(pub u8); - impl Smbus { - #[doc = "I2C Mode"] - pub const I2C: Self = Self(0); - #[doc = "SMBus"] - pub const SMBUS: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Start(pub u8); - impl Start { - #[doc = "No Start generation"] - pub const NOSTART: Self = Self(0); - #[doc = "In master mode: repeated start generation, in slave mode: start generation when bus is free"] - pub const START: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Addmode(pub u8); - impl Addmode { - #[doc = "7-bit slave address"] - pub const ADD7: Self = Self(0); - #[doc = "10-bit slave address"] - pub const ADD10: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Stop(pub u8); - impl Stop { - #[doc = "No Stop generation"] - pub const NOSTOP: Self = Self(0); - #[doc = "In master mode: stop generation after current byte/start, in slave mode: release SCL and SDA after current byte"] - pub const STOP: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pos(pub u8); - impl Pos { - #[doc = "ACK bit controls the (N)ACK of the current byte being received"] - pub const CURRENT: Self = Self(0); - #[doc = "ACK bit controls the (N)ACK of the next byte to be received"] - pub const NEXT: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dnf(pub u8); - impl Dnf { - #[doc = "Digital filter disabled"] - pub const NOFILTER: Self = Self(0); - #[doc = "Digital filter enabled and filtering capability up to 1 tI2CCLK"] - pub const FILTER1: Self = Self(0x01); - #[doc = "Digital filter enabled and filtering capability up to 2 tI2CCLK"] - pub const FILTER2: Self = Self(0x02); - #[doc = "Digital filter enabled and filtering capability up to 3 tI2CCLK"] - pub const FILTER3: Self = Self(0x03); - #[doc = "Digital filter enabled and filtering capability up to 4 tI2CCLK"] - pub const FILTER4: Self = Self(0x04); - #[doc = "Digital filter enabled and filtering capability up to 5 tI2CCLK"] - pub const FILTER5: Self = Self(0x05); - #[doc = "Digital filter enabled and filtering capability up to 6 tI2CCLK"] - pub const FILTER6: Self = Self(0x06); - #[doc = "Digital filter enabled and filtering capability up to 7 tI2CCLK"] - pub const FILTER7: Self = Self(0x07); - #[doc = "Digital filter enabled and filtering capability up to 8 tI2CCLK"] - pub const FILTER8: Self = Self(0x08); - #[doc = "Digital filter enabled and filtering capability up to 9 tI2CCLK"] - pub const FILTER9: Self = Self(0x09); - #[doc = "Digital filter enabled and filtering capability up to 10 tI2CCLK"] - pub const FILTER10: Self = Self(0x0a); - #[doc = "Digital filter enabled and filtering capability up to 11 tI2CCLK"] - pub const FILTER11: Self = Self(0x0b); - #[doc = "Digital filter enabled and filtering capability up to 12 tI2CCLK"] - pub const FILTER12: Self = Self(0x0c); - #[doc = "Digital filter enabled and filtering capability up to 13 tI2CCLK"] - pub const FILTER13: Self = Self(0x0d); - #[doc = "Digital filter enabled and filtering capability up to 14 tI2CCLK"] - pub const FILTER14: Self = Self(0x0e); - #[doc = "Digital filter enabled and filtering capability up to 15 tI2CCLK"] - pub const FILTER15: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Alert(pub u8); - impl Alert { - #[doc = "SMBA pin released high"] - pub const RELEASE: Self = Self(0); - #[doc = "SMBA pin driven low"] - pub const DRIVE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct FS(pub u8); - impl FS { - #[doc = "Standard mode I2C"] - pub const STANDARD: Self = Self(0); - #[doc = "Fast mode I2C"] - pub const FAST: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Duty(pub u8); - impl Duty { - #[doc = "Duty cycle t_low/t_high = 2/1"] - pub const DUTY2_1: Self = Self(0); - #[doc = "Duty cycle t_low/t_high = 16/9"] - pub const DUTY16_9: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sb(pub u8); - impl Sb { - #[doc = "No Start condition"] - pub const NOSTART: Self = Self(0); - #[doc = "Start condition generated"] - pub const START: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Smbtype(pub u8); - impl Smbtype { - #[doc = "SMBus Device"] - pub const DEVICE: Self = Self(0); - #[doc = "SMBus Host"] - pub const HOST: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Endual(pub u8); - impl Endual { - #[doc = "Single addressing mode"] - pub const SINGLE: Self = Self(0); - #[doc = "Dual addressing mode"] - pub const DUAL: Self = Self(0x01); - } - } -} -pub mod sdmmc_v2 { - use crate::generic::*; - #[doc = "SDMMC"] - #[derive(Copy, Clone)] - pub struct Sdmmc(pub *mut u8); - unsafe impl Send for Sdmmc {} - unsafe impl Sync for Sdmmc {} - impl Sdmmc { - #[doc = "SDMMC power control register"] - pub fn power(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "The SDMMC_CLKCR register controls the SDMMC_CK output clock, the SDMMC_RX_CLK receive clock, and the bus width."] - pub fn clkcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "The SDMMC_ARGR register contains a 32-bit command argument, which is sent to a card as part of a command message."] - pub fn argr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "The SDMMC_CMDR register contains the command index and command type bits. The command index is sent to a card as part of a command message. The command type bits control the command path state machine (CPSM)."] - pub fn cmdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "SDMMC command response register"] - pub fn respcmdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] - pub fn respr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(20usize + n * 4usize)) } - } - #[doc = "The SDMMC_DTIMER register contains the data timeout period, in card bus clock periods. A counter loads the value from the SDMMC_DTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_R or Busy state. If the timer reaches 0 while the DPSM is in either of these states, the timeout status flag is set."] - pub fn dtimer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "The SDMMC_DLENR register contains the number of data bytes to be transferred. The value is loaded into the data counter when data transfer starts."] - pub fn dlenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "The SDMMC_DCTRL register control the data path state machine (DPSM)."] - pub fn dctrl(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "The SDMMC_DCNTR register loads the value from the data length register (see SDMMC_DLENR) when the DPSM moves from the Idle state to the Wait_R or Wait_S state. As data is transferred, the counter decrements the value until it reaches 0. The DPSM then moves to the Idle state and when there has been no error, the data status end flag (DATAEND) is set."] - pub fn dcntr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(48usize)) } - } - #[doc = "The SDMMC_STAR register is a read-only register. It contains two types of flag:Static flags (bits [29,21,11:0]): these bits remain asserted until they are cleared by writing to the SDMMC interrupt Clear register (see SDMMC_ICR)Dynamic flags (bits [20:12]): these bits change state depending on the state of the underlying logic (for example, FIFO full and empty flags are asserted and de-asserted as data while written to the FIFO)"] - pub fn star(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(52usize)) } - } - #[doc = "The SDMMC_ICR register is a write-only register. Writing a bit with 1 clears the corresponding bit in the SDMMC_STAR status register."] - pub fn icr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(56usize)) } - } - #[doc = "The interrupt mask register determines which status flags generate an interrupt request by setting the corresponding bit to 1."] - pub fn maskr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(60usize)) } - } - #[doc = "The SDMMC_ACKTIMER register contains the acknowledgment timeout period, in SDMMC_CK bus clock periods. A counter loads the value from the SDMMC_ACKTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_Ack state. If the timer reaches 0 while the DPSM is in this states, the acknowledgment timeout status flag is set."] - pub fn acktimer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(64usize)) } - } - #[doc = "The receive and transmit FIFOs can be read or written as 32-bit wide registers. The FIFOs contain 32 entries on 32 sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO."] - pub fn idmactrlr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(80usize)) } - } - #[doc = "The SDMMC_IDMABSIZER register contains the buffers size when in double buffer configuration."] - pub fn idmabsizer(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(84usize)) } - } - #[doc = "The SDMMC_IDMABASE0R register contains the memory buffer base address in single buffer configuration and the buffer 0 base address in double buffer configuration."] - pub fn idmabase0r(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(88usize)) } - } - #[doc = "The SDMMC_IDMABASE1R register contains the double buffer configuration second buffer memory base address."] - pub fn idmabase1r(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(92usize)) } - } - #[doc = "The receive and transmit FIFOs can be only read or written as word (32-bit) wide registers. The FIFOs contain 16 entries on sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO.When accessing SDMMC_FIFOR with half word or byte access an AHB bus fault is generated."] - pub fn fifor(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(128usize)) } - } - #[doc = "SDMMC IP version register"] - pub fn ver(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(1012usize)) } - } - #[doc = "SDMMC IP identification register"] - pub fn id(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(1016usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "The SDMMC_DTIMER register contains the data timeout period, in card bus clock periods. A counter loads the value from the SDMMC_DTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_R or Busy state. If the timer reaches 0 while the DPSM is in either of these states, the timeout status flag is set."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dtimer(pub u32); - impl Dtimer { - #[doc = "Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods."] - pub const fn datatime(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods."] - pub fn set_datatime(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Dtimer { - fn default() -> Dtimer { - Dtimer(0) - } - } - #[doc = "The SDMMC_DLENR register contains the number of data bytes to be transferred. The value is loaded into the data counter when data transfer starts."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dlenr(pub u32); - impl Dlenr { - #[doc = "Data length value This register can only be written by firmware when DPSM is inactive (DPSMACT = 0). Number of data bytes to be transferred. When DDR = 1 DATALENGTH is truncated to a multiple of 2. (The last odd byte is not transfered) When DATALENGTH = 0 no data will be transfered, when requested by a CPSMEN and CMDTRANS = 1 also no command will be transfered. DTEN and CPSMEN are cleared to 0."] - pub const fn datalength(&self) -> u32 { - let val = (self.0 >> 0usize) & 0x01ff_ffff; - val as u32 - } - #[doc = "Data length value This register can only be written by firmware when DPSM is inactive (DPSMACT = 0). Number of data bytes to be transferred. When DDR = 1 DATALENGTH is truncated to a multiple of 2. (The last odd byte is not transfered) When DATALENGTH = 0 no data will be transfered, when requested by a CPSMEN and CMDTRANS = 1 also no command will be transfered. DTEN and CPSMEN are cleared to 0."] - pub fn set_datalength(&mut self, val: u32) { - self.0 = - (self.0 & !(0x01ff_ffff << 0usize)) | (((val as u32) & 0x01ff_ffff) << 0usize); - } - } - impl Default for Dlenr { - fn default() -> Dlenr { - Dlenr(0) - } - } - #[doc = "The SDMMC_ARGR register contains a 32-bit command argument, which is sent to a card as part of a command message."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Argr(pub u32); - impl Argr { - #[doc = "Command argument. These bits can only be written by firmware when CPSM is disabled (CPSMEN = 0). Command argument sent to a card as part of a command message. If a command contains an argument, it must be loaded into this register before writing a command to the command register."] - pub const fn cmdarg(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Command argument. These bits can only be written by firmware when CPSM is disabled (CPSMEN = 0). Command argument sent to a card as part of a command message. If a command contains an argument, it must be loaded into this register before writing a command to the command register."] - pub fn set_cmdarg(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Argr { - fn default() -> Argr { - Argr(0) - } - } - #[doc = "The interrupt mask register determines which status flags generate an interrupt request by setting the corresponding bit to 1."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Maskr(pub u32); - impl Maskr { - #[doc = "Command CRC fail interrupt enable Set and cleared by software to enable/disable interrupt caused by command CRC failure."] - pub const fn ccrcfailie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Command CRC fail interrupt enable Set and cleared by software to enable/disable interrupt caused by command CRC failure."] - pub fn set_ccrcfailie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Data CRC fail interrupt enable Set and cleared by software to enable/disable interrupt caused by data CRC failure."] - pub const fn dcrcfailie(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Data CRC fail interrupt enable Set and cleared by software to enable/disable interrupt caused by data CRC failure."] - pub fn set_dcrcfailie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Command timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by command timeout."] - pub const fn ctimeoutie(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Command timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by command timeout."] - pub fn set_ctimeoutie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Data timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by data timeout."] - pub const fn dtimeoutie(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Data timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by data timeout."] - pub fn set_dtimeoutie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Tx FIFO underrun error interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO underrun error."] - pub const fn txunderrie(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Tx FIFO underrun error interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO underrun error."] - pub fn set_txunderrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Rx FIFO overrun error interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO overrun error."] - pub const fn rxoverrie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Rx FIFO overrun error interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO overrun error."] - pub fn set_rxoverrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Command response received interrupt enable Set and cleared by software to enable/disable interrupt caused by receiving command response."] - pub const fn cmdrendie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Command response received interrupt enable Set and cleared by software to enable/disable interrupt caused by receiving command response."] - pub fn set_cmdrendie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Command sent interrupt enable Set and cleared by software to enable/disable interrupt caused by sending command."] - pub const fn cmdsentie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Command sent interrupt enable Set and cleared by software to enable/disable interrupt caused by sending command."] - pub fn set_cmdsentie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Data end interrupt enable Set and cleared by software to enable/disable interrupt caused by data end."] - pub const fn dataendie(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Data end interrupt enable Set and cleared by software to enable/disable interrupt caused by data end."] - pub fn set_dataendie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Data hold interrupt enable Set and cleared by software to enable/disable the interrupt generated when sending new data is hold in the DPSM Wait_S state."] - pub const fn dholdie(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Data hold interrupt enable Set and cleared by software to enable/disable the interrupt generated when sending new data is hold in the DPSM Wait_S state."] - pub fn set_dholdie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Data block end interrupt enable Set and cleared by software to enable/disable interrupt caused by data block end."] - pub const fn dbckendie(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Data block end interrupt enable Set and cleared by software to enable/disable interrupt caused by data block end."] - pub fn set_dbckendie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Data transfer aborted interrupt enable Set and cleared by software to enable/disable interrupt caused by a data transfer being aborted."] - pub const fn dabortie(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Data transfer aborted interrupt enable Set and cleared by software to enable/disable interrupt caused by a data transfer being aborted."] - pub fn set_dabortie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Tx FIFO half empty interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO half empty."] - pub const fn txfifoheie(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Tx FIFO half empty interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO half empty."] - pub fn set_txfifoheie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Rx FIFO half full interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO half full."] - pub const fn rxfifohfie(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Rx FIFO half full interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO half full."] - pub fn set_rxfifohfie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "Rx FIFO full interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO full."] - pub const fn rxfifofie(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Rx FIFO full interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO full."] - pub fn set_rxfifofie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Tx FIFO empty interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO empty."] - pub const fn txfifoeie(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Tx FIFO empty interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO empty."] - pub fn set_txfifoeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "BUSYD0END interrupt enable Set and cleared by software to enable/disable the interrupt generated when SDMMC_D0 signal changes from busy to NOT busy following a CMD response."] - pub const fn busyd0endie(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "BUSYD0END interrupt enable Set and cleared by software to enable/disable the interrupt generated when SDMMC_D0 signal changes from busy to NOT busy following a CMD response."] - pub fn set_busyd0endie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "SDIO mode interrupt received interrupt enable Set and cleared by software to enable/disable the interrupt generated when receiving the SDIO mode interrupt."] - pub const fn sdioitie(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "SDIO mode interrupt received interrupt enable Set and cleared by software to enable/disable the interrupt generated when receiving the SDIO mode interrupt."] - pub fn set_sdioitie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Acknowledgment Fail interrupt enable Set and cleared by software to enable/disable interrupt caused by acknowledgment Fail."] - pub const fn ackfailie(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Acknowledgment Fail interrupt enable Set and cleared by software to enable/disable interrupt caused by acknowledgment Fail."] - pub fn set_ackfailie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "Acknowledgment timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by acknowledgment timeout."] - pub const fn acktimeoutie(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "Acknowledgment timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by acknowledgment timeout."] - pub fn set_acktimeoutie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "Voltage switch critical timing section completion interrupt enable Set and cleared by software to enable/disable the interrupt generated when voltage switch critical timing section completion."] - pub const fn vswendie(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "Voltage switch critical timing section completion interrupt enable Set and cleared by software to enable/disable the interrupt generated when voltage switch critical timing section completion."] - pub fn set_vswendie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "Voltage Switch clock stopped interrupt enable Set and cleared by software to enable/disable interrupt caused by Voltage Switch clock stopped."] - pub const fn ckstopie(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "Voltage Switch clock stopped interrupt enable Set and cleared by software to enable/disable interrupt caused by Voltage Switch clock stopped."] - pub fn set_ckstopie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "IDMA buffer transfer complete interrupt enable Set and cleared by software to enable/disable the interrupt generated when the IDMA has transferred all data belonging to a memory buffer."] - pub const fn idmabtcie(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "IDMA buffer transfer complete interrupt enable Set and cleared by software to enable/disable the interrupt generated when the IDMA has transferred all data belonging to a memory buffer."] - pub fn set_idmabtcie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - } - impl Default for Maskr { - fn default() -> Maskr { - Maskr(0) - } - } - #[doc = "The receive and transmit FIFOs can be read or written as 32-bit wide registers. The FIFOs contain 32 entries on 32 sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idmactrlr(pub u32); - impl Idmactrlr { - #[doc = "IDMA enable This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn idmaen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "IDMA enable This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_idmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Buffer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn idmabmode(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Buffer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_idmabmode(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Double buffer mode active buffer indication This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). When IDMA is enabled this bit is toggled by hardware."] - pub const fn idmabact(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Double buffer mode active buffer indication This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). When IDMA is enabled this bit is toggled by hardware."] - pub fn set_idmabact(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - } - impl Default for Idmactrlr { - fn default() -> Idmactrlr { - Idmactrlr(0) - } - } - #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Resp3r(pub u32); - impl Resp3r { - #[doc = "see Table404."] - pub const fn cardstatus3(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "see Table404."] - pub fn set_cardstatus3(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Resp3r { - fn default() -> Resp3r { - Resp3r(0) - } - } - #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Resp1r(pub u32); - impl Resp1r { - #[doc = "see Table 432"] - pub const fn cardstatus1(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "see Table 432"] - pub fn set_cardstatus1(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Resp1r { - fn default() -> Resp1r { - Resp1r(0) - } - } - #[doc = "SDMMC command response register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Respcmdr(pub u32); - impl Respcmdr { - #[doc = "Response command index"] - pub const fn respcmd(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x3f; - val as u8 - } - #[doc = "Response command index"] - pub fn set_respcmd(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); - } - } - impl Default for Respcmdr { - fn default() -> Respcmdr { - Respcmdr(0) - } - } - #[doc = "The SDMMC_IDMABSIZER register contains the buffers size when in double buffer configuration."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idmabsizer(pub u32); - impl Idmabsizer { - #[doc = "Number of transfers per buffer. This 8-bit value shall be multiplied by 8 to get the size of the buffer in 32-bit words and by 32 to get the size of the buffer in bytes. Example: IDMABNDT = 0x01: buffer size = 8 words = 32 bytes. These bits can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn idmabndt(&self) -> u8 { - let val = (self.0 >> 5usize) & 0xff; - val as u8 - } - #[doc = "Number of transfers per buffer. This 8-bit value shall be multiplied by 8 to get the size of the buffer in 32-bit words and by 32 to get the size of the buffer in bytes. Example: IDMABNDT = 0x01: buffer size = 8 words = 32 bytes. These bits can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_idmabndt(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 5usize)) | (((val as u32) & 0xff) << 5usize); - } - } - impl Default for Idmabsizer { - fn default() -> Idmabsizer { - Idmabsizer(0) - } - } - #[doc = "The SDMMC_DCTRL register control the data path state machine (DPSM)."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dctrl(pub u32); - impl Dctrl { - #[doc = "Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards."] - pub const fn dten(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards."] - pub fn set_dten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn dtdir(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_dtdir(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn dtmode(&self) -> u8 { - let val = (self.0 >> 2usize) & 0x03; - val as u8 - } - #[doc = "Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_dtmode(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 2usize)) | (((val as u32) & 0x03) << 2usize); - } - #[doc = "Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)"] - pub const fn dblocksize(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x0f; - val as u8 - } - #[doc = "Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)"] - pub fn set_dblocksize(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); - } - #[doc = "Read wait start. If this bit is set, read wait operation starts."] - pub const fn rwstart(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Read wait start. If this bit is set, read wait operation starts."] - pub fn set_rwstart(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state."] - pub const fn rwstop(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state."] - pub fn set_rwstop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn rwmod(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_rwmod(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation."] - pub const fn sdioen(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation."] - pub fn set_sdioen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub const fn bootacken(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0)."] - pub fn set_bootacken(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs."] - pub const fn fiforst(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs."] - pub fn set_fiforst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - } - impl Default for Dctrl { - fn default() -> Dctrl { - Dctrl(0) - } - } - #[doc = "SDMMC IP identification register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Id(pub u32); - impl Id { - #[doc = "SDMMC IP identification."] - pub const fn ip_id(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "SDMMC IP identification."] - pub fn set_ip_id(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Id { - fn default() -> Id { - Id(0) - } - } - #[doc = "The receive and transmit FIFOs can be only read or written as word (32-bit) wide registers. The FIFOs contain 16 entries on sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO.When accessing SDMMC_FIFOR with half word or byte access an AHB bus fault is generated."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Fifor(pub u32); - impl Fifor { - #[doc = "Receive and transmit FIFO data This register can only be read or written by firmware when the DPSM is active (DPSMACT=1). The FIFO data occupies 16 entries of 32-bit words."] - pub const fn fifodata(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Receive and transmit FIFO data This register can only be read or written by firmware when the DPSM is active (DPSMACT=1). The FIFO data occupies 16 entries of 32-bit words."] - pub fn set_fifodata(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Fifor { - fn default() -> Fifor { - Fifor(0) - } - } - #[doc = "The SDMMC_ACKTIMER register contains the acknowledgment timeout period, in SDMMC_CK bus clock periods. A counter loads the value from the SDMMC_ACKTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_Ack state. If the timer reaches 0 while the DPSM is in this states, the acknowledgment timeout status flag is set."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Acktimer(pub u32); - impl Acktimer { - #[doc = "Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods."] - pub const fn acktime(&self) -> u32 { - let val = (self.0 >> 0usize) & 0x01ff_ffff; - val as u32 - } - #[doc = "Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods."] - pub fn set_acktime(&mut self, val: u32) { - self.0 = - (self.0 & !(0x01ff_ffff << 0usize)) | (((val as u32) & 0x01ff_ffff) << 0usize); - } - } - impl Default for Acktimer { - fn default() -> Acktimer { - Acktimer(0) - } - } - #[doc = "The SDMMC_IDMABASE1R register contains the double buffer configuration second buffer memory base address."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idmabase1r(pub u32); - impl Idmabase1r { - #[doc = "Buffer 1 memory base address, shall be word aligned (bit [1:0] -are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0)."] - pub const fn idmabase1(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Buffer 1 memory base address, shall be word aligned (bit [1:0] -are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0)."] - pub fn set_idmabase1(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Idmabase1r { - fn default() -> Idmabase1r { - Idmabase1r(0) - } - } - #[doc = "The SDMMC_CMDR register contains the command index and command type bits. The command index is sent to a card as part of a command message. The command type bits control the command path state machine (CPSM)."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cmdr(pub u32); - impl Cmdr { - #[doc = "Command index. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). The command index is sent to the card as part of a command message."] - pub const fn cmdindex(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x3f; - val as u8 - } - #[doc = "Command index. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). The command index is sent to the card as part of a command message."] - pub fn set_cmdindex(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 0usize)) | (((val as u32) & 0x3f) << 0usize); - } - #[doc = "The CPSM treats the command as a data transfer command, stops the interrupt period, and signals DataEnable to the DPSM This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues an end of interrupt period and issues DataEnable signal to the DPSM when the command is sent."] - pub const fn cmdtrans(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "The CPSM treats the command as a data transfer command, stops the interrupt period, and signals DataEnable to the DPSM This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues an end of interrupt period and issues DataEnable signal to the DPSM when the command is sent."] - pub fn set_cmdtrans(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "The CPSM treats the command as a Stop Transmission command and signals Abort to the DPSM. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues the Abort signal to the DPSM when the command is sent."] - pub const fn cmdstop(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "The CPSM treats the command as a Stop Transmission command and signals Abort to the DPSM. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues the Abort signal to the DPSM when the command is sent."] - pub fn set_cmdstop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Wait for response bits. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). They are used to configure whether the CPSM is to wait for a response, and if yes, which kind of response."] - pub const fn waitresp(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x03; - val as u8 - } - #[doc = "Wait for response bits. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). They are used to configure whether the CPSM is to wait for a response, and if yes, which kind of response."] - pub fn set_waitresp(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val as u32) & 0x03) << 8usize); - } - #[doc = "CPSM waits for interrupt request. If this bit is set, the CPSM disables command timeout and waits for an card interrupt request (Response). If this bit is cleared in the CPSM Wait state, will cause the abort of the interrupt mode."] - pub const fn waitint(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "CPSM waits for interrupt request. If this bit is set, the CPSM disables command timeout and waits for an card interrupt request (Response). If this bit is cleared in the CPSM Wait state, will cause the abort of the interrupt mode."] - pub fn set_waitint(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "CPSM Waits for end of data transfer (CmdPend internal signal) from DPSM. This bit when set, the CPSM waits for the end of data transfer trigger before it starts sending a command. WAITPEND is only taken into account when DTMODE = MMC stream data transfer, WIDBUS = 1-bit wide bus mode, DPSMACT = 1 and DTDIR = from host to card."] - pub const fn waitpend(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "CPSM Waits for end of data transfer (CmdPend internal signal) from DPSM. This bit when set, the CPSM waits for the end of data transfer trigger before it starts sending a command. WAITPEND is only taken into account when DTMODE = MMC stream data transfer, WIDBUS = 1-bit wide bus mode, DPSMACT = 1 and DTDIR = from host to card."] - pub fn set_waitpend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Command path state machine (CPSM) Enable bit This bit is written 1 by firmware, and cleared by hardware when the CPSM enters the Idle state. If this bit is set, the CPSM is enabled. When DTEN = 1, no command will be transfered nor boot procedure will be started. CPSMEN is cleared to 0."] - pub const fn cpsmen(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Command path state machine (CPSM) Enable bit This bit is written 1 by firmware, and cleared by hardware when the CPSM enters the Idle state. If this bit is set, the CPSM is enabled. When DTEN = 1, no command will be transfered nor boot procedure will be started. CPSMEN is cleared to 0."] - pub fn set_cpsmen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Hold new data block transmission and reception in the DPSM. If this bit is set, the DPSM will not move from the Wait_S state to the Send state or from the Wait_R state to the Receive state."] - pub const fn dthold(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Hold new data block transmission and reception in the DPSM. If this bit is set, the DPSM will not move from the Wait_S state to the Send state or from the Wait_R state to the Receive state."] - pub fn set_dthold(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Select the boot mode procedure to be used. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0)"] - pub const fn bootmode(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Select the boot mode procedure to be used. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0)"] - pub fn set_bootmode(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Enable boot mode procedure."] - pub const fn booten(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Enable boot mode procedure."] - pub fn set_booten(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). CMDSUSPEND = 1 and CMDTRANS = 0 Suspend command, start interrupt period when response bit BS=0. CMDSUSPEND = 1 and CMDTRANS = 1 Resume command with data, end interrupt period when response bit DF=1."] - pub const fn cmdsuspend(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). CMDSUSPEND = 1 and CMDTRANS = 0 Suspend command, start interrupt period when response bit BS=0. CMDSUSPEND = 1 and CMDTRANS = 1 Resume command with data, end interrupt period when response bit DF=1."] - pub fn set_cmdsuspend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Cmdr { - fn default() -> Cmdr { - Cmdr(0) - } - } - #[doc = "SDMMC IP version register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ver(pub u32); - impl Ver { - #[doc = "IP minor revision number."] - pub const fn minrev(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "IP minor revision number."] - pub fn set_minrev(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "IP major revision number."] - pub const fn majrev(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x0f; - val as u8 - } - #[doc = "IP major revision number."] - pub fn set_majrev(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); - } - } - impl Default for Ver { - fn default() -> Ver { - Ver(0) - } - } - #[doc = "SDMMC power control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Power(pub u32); - impl Power { - #[doc = "SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11."] - pub const fn pwrctrl(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x03; - val as u8 - } - #[doc = "SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11."] - pub fn set_pwrctrl(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); - } - #[doc = "Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:"] - pub const fn vswitch(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:"] - pub fn set_vswitch(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:"] - pub const fn vswitchen(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:"] - pub fn set_vswitchen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00)."] - pub const fn dirpol(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00)."] - pub fn set_dirpol(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - } - impl Default for Power { - fn default() -> Power { - Power(0) - } - } - #[doc = "The SDMMC_ICR register is a write-only register. Writing a bit with 1 clears the corresponding bit in the SDMMC_STAR status register."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Icr(pub u32); - impl Icr { - #[doc = "CCRCFAIL flag clear bit Set by software to clear the CCRCFAIL flag."] - pub const fn ccrcfailc(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "CCRCFAIL flag clear bit Set by software to clear the CCRCFAIL flag."] - pub fn set_ccrcfailc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "DCRCFAIL flag clear bit Set by software to clear the DCRCFAIL flag."] - pub const fn dcrcfailc(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "DCRCFAIL flag clear bit Set by software to clear the DCRCFAIL flag."] - pub fn set_dcrcfailc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "CTIMEOUT flag clear bit Set by software to clear the CTIMEOUT flag."] - pub const fn ctimeoutc(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "CTIMEOUT flag clear bit Set by software to clear the CTIMEOUT flag."] - pub fn set_ctimeoutc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "DTIMEOUT flag clear bit Set by software to clear the DTIMEOUT flag."] - pub const fn dtimeoutc(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "DTIMEOUT flag clear bit Set by software to clear the DTIMEOUT flag."] - pub fn set_dtimeoutc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "TXUNDERR flag clear bit Set by software to clear TXUNDERR flag."] - pub const fn txunderrc(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "TXUNDERR flag clear bit Set by software to clear TXUNDERR flag."] - pub fn set_txunderrc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "RXOVERR flag clear bit Set by software to clear the RXOVERR flag."] - pub const fn rxoverrc(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "RXOVERR flag clear bit Set by software to clear the RXOVERR flag."] - pub fn set_rxoverrc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "CMDREND flag clear bit Set by software to clear the CMDREND flag."] - pub const fn cmdrendc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "CMDREND flag clear bit Set by software to clear the CMDREND flag."] - pub fn set_cmdrendc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "CMDSENT flag clear bit Set by software to clear the CMDSENT flag."] - pub const fn cmdsentc(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "CMDSENT flag clear bit Set by software to clear the CMDSENT flag."] - pub fn set_cmdsentc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "DATAEND flag clear bit Set by software to clear the DATAEND flag."] - pub const fn dataendc(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "DATAEND flag clear bit Set by software to clear the DATAEND flag."] - pub fn set_dataendc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "DHOLD flag clear bit Set by software to clear the DHOLD flag."] - pub const fn dholdc(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "DHOLD flag clear bit Set by software to clear the DHOLD flag."] - pub fn set_dholdc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "DBCKEND flag clear bit Set by software to clear the DBCKEND flag."] - pub const fn dbckendc(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "DBCKEND flag clear bit Set by software to clear the DBCKEND flag."] - pub fn set_dbckendc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "DABORT flag clear bit Set by software to clear the DABORT flag."] - pub const fn dabortc(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "DABORT flag clear bit Set by software to clear the DABORT flag."] - pub fn set_dabortc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "BUSYD0END flag clear bit Set by software to clear the BUSYD0END flag."] - pub const fn busyd0endc(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "BUSYD0END flag clear bit Set by software to clear the BUSYD0END flag."] - pub fn set_busyd0endc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "SDIOIT flag clear bit Set by software to clear the SDIOIT flag."] - pub const fn sdioitc(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "SDIOIT flag clear bit Set by software to clear the SDIOIT flag."] - pub fn set_sdioitc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "ACKFAIL flag clear bit Set by software to clear the ACKFAIL flag."] - pub const fn ackfailc(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "ACKFAIL flag clear bit Set by software to clear the ACKFAIL flag."] - pub fn set_ackfailc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "ACKTIMEOUT flag clear bit Set by software to clear the ACKTIMEOUT flag."] - pub const fn acktimeoutc(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "ACKTIMEOUT flag clear bit Set by software to clear the ACKTIMEOUT flag."] - pub fn set_acktimeoutc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "VSWEND flag clear bit Set by software to clear the VSWEND flag."] - pub const fn vswendc(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "VSWEND flag clear bit Set by software to clear the VSWEND flag."] - pub fn set_vswendc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "CKSTOP flag clear bit Set by software to clear the CKSTOP flag."] - pub const fn ckstopc(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "CKSTOP flag clear bit Set by software to clear the CKSTOP flag."] - pub fn set_ckstopc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "IDMA transfer error clear bit Set by software to clear the IDMATE flag."] - pub const fn idmatec(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "IDMA transfer error clear bit Set by software to clear the IDMATE flag."] - pub fn set_idmatec(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - #[doc = "IDMA buffer transfer complete clear bit Set by software to clear the IDMABTC flag."] - pub const fn idmabtcc(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "IDMA buffer transfer complete clear bit Set by software to clear the IDMABTC flag."] - pub fn set_idmabtcc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - } - impl Default for Icr { - fn default() -> Icr { - Icr(0) - } - } - #[doc = "The SDMMC_DCNTR register loads the value from the data length register (see SDMMC_DLENR) when the DPSM moves from the Idle state to the Wait_R or Wait_S state. As data is transferred, the counter decrements the value until it reaches 0. The DPSM then moves to the Idle state and when there has been no error, the data status end flag (DATAEND) is set."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dcntr(pub u32); - impl Dcntr { - #[doc = "Data count value When read, the number of remaining data bytes to be transferred is returned. Write has no effect."] - pub const fn datacount(&self) -> u32 { - let val = (self.0 >> 0usize) & 0x01ff_ffff; - val as u32 - } - #[doc = "Data count value When read, the number of remaining data bytes to be transferred is returned. Write has no effect."] - pub fn set_datacount(&mut self, val: u32) { - self.0 = - (self.0 & !(0x01ff_ffff << 0usize)) | (((val as u32) & 0x01ff_ffff) << 0usize); - } - } - impl Default for Dcntr { - fn default() -> Dcntr { - Dcntr(0) - } - } - #[doc = "The SDMMC_CLKCR register controls the SDMMC_CK output clock, the SDMMC_RX_CLK receive clock, and the bus width."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Clkcr(pub u32); - impl Clkcr { - #[doc = "Clock divide factor This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). This field defines the divide factor between the input clock (SDMMCCLK) and the output clock (SDMMC_CK): SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV]. 0xx: etc.. xxx: etc.."] - pub const fn clkdiv(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x03ff; - val as u16 - } - #[doc = "Clock divide factor This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). This field defines the divide factor between the input clock (SDMMCCLK) and the output clock (SDMMC_CK): SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV]. 0xx: etc.. xxx: etc.."] - pub fn set_clkdiv(&mut self, val: u16) { - self.0 = (self.0 & !(0x03ff << 0usize)) | (((val as u32) & 0x03ff) << 0usize); - } - #[doc = "Power saving configuration bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) For power saving, the SDMMC_CK clock output can be disabled when the bus is idle by setting PWRSAV:"] - pub const fn pwrsav(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Power saving configuration bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) For power saving, the SDMMC_CK clock output can be disabled when the bus is idle by setting PWRSAV:"] - pub fn set_pwrsav(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Wide bus mode enable bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub const fn widbus(&self) -> u8 { - let val = (self.0 >> 14usize) & 0x03; - val as u8 - } - #[doc = "Wide bus mode enable bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub fn set_widbus(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 14usize)) | (((val as u32) & 0x03) << 14usize); - } - #[doc = "SDMMC_CK dephasing selection bit for data and Command. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). When clock division = 1 (CLKDIV = 0), this bit has no effect. Data and Command change on SDMMC_CK falling edge. When clock division >1 (CLKDIV > 0) & DDR = 0: - SDMMC_CK edge occurs on SDMMCCLK rising edge. When clock division >1 (CLKDIV > 0) & DDR = 1: - Data changed on the SDMMCCLK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge. - Data changed on the SDMMC_CK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge."] - pub const fn negedge(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "SDMMC_CK dephasing selection bit for data and Command. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). When clock division = 1 (CLKDIV = 0), this bit has no effect. Data and Command change on SDMMC_CK falling edge. When clock division >1 (CLKDIV > 0) & DDR = 0: - SDMMC_CK edge occurs on SDMMCCLK rising edge. When clock division >1 (CLKDIV > 0) & DDR = 1: - Data changed on the SDMMCCLK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge. - Data changed on the SDMMC_CK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge."] - pub fn set_negedge(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Hardware flow control enable This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) When Hardware flow control is enabled, the meaning of the TXFIFOE and RXFIFOF flags change, please see SDMMC status register definition in Section56.8.11."] - pub const fn hwfc_en(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Hardware flow control enable This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) When Hardware flow control is enabled, the meaning of the TXFIFOE and RXFIFOF flags change, please see SDMMC status register definition in Section56.8.11."] - pub fn set_hwfc_en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Data rate signaling selection This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) DDR rate shall only be selected with 4-bit or 8-bit wide bus mode. (WIDBUS > 00). DDR = 1 has no effect when WIDBUS = 00 (1-bit wide bus). DDR rate shall only be selected with clock division >1. (CLKDIV > 0)"] - pub const fn ddr(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Data rate signaling selection This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) DDR rate shall only be selected with 4-bit or 8-bit wide bus mode. (WIDBUS > 00). DDR = 1 has no effect when WIDBUS = 00 (1-bit wide bus). DDR rate shall only be selected with clock division >1. (CLKDIV > 0)"] - pub fn set_ddr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Bus speed mode selection between DS, HS, SDR12, SDR25 and SDR50, DDR50, SDR104. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub const fn busspeed(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Bus speed mode selection between DS, HS, SDR12, SDR25 and SDR50, DDR50, SDR104. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub fn set_busspeed(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "Receive clock selection. These bits can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub const fn selclkrx(&self) -> u8 { - let val = (self.0 >> 20usize) & 0x03; - val as u8 - } - #[doc = "Receive clock selection. These bits can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)"] - pub fn set_selclkrx(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 20usize)) | (((val as u32) & 0x03) << 20usize); - } - } - impl Default for Clkcr { - fn default() -> Clkcr { - Clkcr(0) - } - } - #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Resp2r(pub u32); - impl Resp2r { - #[doc = "see Table404."] - pub const fn cardstatus2(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "see Table404."] - pub fn set_cardstatus2(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Resp2r { - fn default() -> Resp2r { - Resp2r(0) - } - } - #[doc = "The SDMMC_STAR register is a read-only register. It contains two types of flag:Static flags (bits [29,21,11:0]): these bits remain asserted until they are cleared by writing to the SDMMC interrupt Clear register (see SDMMC_ICR)Dynamic flags (bits [20:12]): these bits change state depending on the state of the underlying logic (for example, FIFO full and empty flags are asserted and de-asserted as data while written to the FIFO)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Star(pub u32); - impl Star { - #[doc = "Command response received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn ccrcfail(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Command response received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_ccrcfail(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Data block sent/received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn dcrcfail(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Data block sent/received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_dcrcfail(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Command response timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR. The Command Timeout period has a fixed value of 64 SDMMC_CK clock periods."] - pub const fn ctimeout(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Command response timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR. The Command Timeout period has a fixed value of 64 SDMMC_CK clock periods."] - pub fn set_ctimeout(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Data timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn dtimeout(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Data timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_dtimeout(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Transmit FIFO underrun error or IDMA read transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn txunderr(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Transmit FIFO underrun error or IDMA read transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_txunderr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Received FIFO overrun error or IDMA write transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn rxoverr(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Received FIFO overrun error or IDMA write transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_rxoverr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Command response received (CRC check passed, or no CRC). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn cmdrend(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Command response received (CRC check passed, or no CRC). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_cmdrend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Command sent (no response required). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn cmdsent(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Command sent (no response required). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_cmdsent(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Data transfer ended correctly. (data counter, DATACOUNT is zero and no errors occur). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn dataend(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Data transfer ended correctly. (data counter, DATACOUNT is zero and no errors occur). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_dataend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Data transfer Hold. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn dhold(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Data transfer Hold. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_dhold(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Data block sent/received. (CRC check passed) and DPSM moves to the READWAIT state. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn dbckend(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Data block sent/received. (CRC check passed) and DPSM moves to the READWAIT state. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_dbckend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Data transfer aborted by CMD12. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn dabort(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Data transfer aborted by CMD12. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_dabort(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "Data path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt."] - pub const fn dpsmact(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Data path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt."] - pub fn set_dpsmact(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "Command path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt."] - pub const fn cpsmact(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Command path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt."] - pub fn set_cpsmact(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Transmit FIFO half empty At least half the number of words can be written into the FIFO. This bit is cleared when the FIFO becomes half+1 full."] - pub const fn txfifohe(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Transmit FIFO half empty At least half the number of words can be written into the FIFO. This bit is cleared when the FIFO becomes half+1 full."] - pub fn set_txfifohe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Receive FIFO half full There are at least half the number of words in the FIFO. This bit is cleared when the FIFO becomes half+1 empty."] - pub const fn rxfifohf(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Receive FIFO half full There are at least half the number of words in the FIFO. This bit is cleared when the FIFO becomes half+1 empty."] - pub fn set_rxfifohf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "Transmit FIFO full This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes empty."] - pub const fn txfifof(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Transmit FIFO full This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes empty."] - pub fn set_txfifof(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Receive FIFO full This bit is cleared when one FIFO location becomes empty."] - pub const fn rxfifof(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "Receive FIFO full This bit is cleared when one FIFO location becomes empty."] - pub fn set_rxfifof(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "Transmit FIFO empty This bit is cleared when one FIFO location becomes full."] - pub const fn txfifoe(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Transmit FIFO empty This bit is cleared when one FIFO location becomes full."] - pub fn set_txfifoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Receive FIFO empty This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes full."] - pub const fn rxfifoe(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "Receive FIFO empty This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes full."] - pub fn set_rxfifoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "Inverted value of SDMMC_D0 line (Busy), sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response. This bit is reset to not busy when the SDMMCD0 line changes from busy to not busy. This bit does not signal busy due to data transfer. This is a hardware status flag only, it does not generate an interrupt."] - pub const fn busyd0(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "Inverted value of SDMMC_D0 line (Busy), sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response. This bit is reset to not busy when the SDMMCD0 line changes from busy to not busy. This bit does not signal busy due to data transfer. This is a hardware status flag only, it does not generate an interrupt."] - pub fn set_busyd0(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "end of SDMMC_D0 Busy following a CMD response detected. This indicates only end of busy following a CMD response. This bit does not signal busy due to data transfer. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn busyd0end(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "end of SDMMC_D0 Busy following a CMD response detected. This indicates only end of busy following a CMD response. This bit does not signal busy due to data transfer. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_busyd0end(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "SDIO interrupt received. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn sdioit(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "SDIO interrupt received. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_sdioit(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Boot acknowledgment received (boot acknowledgment check fail). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn ackfail(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Boot acknowledgment received (boot acknowledgment check fail). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_ackfail(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "Boot acknowledgment timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn acktimeout(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "Boot acknowledgment timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_acktimeout(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "Voltage switch critical timing section completion. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn vswend(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "Voltage switch critical timing section completion. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_vswend(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "SDMMC_CK stopped in Voltage switch procedure. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn ckstop(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "SDMMC_CK stopped in Voltage switch procedure. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_ckstop(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "IDMA transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn idmate(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "IDMA transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_idmate(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - #[doc = "IDMA buffer transfer complete. interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub const fn idmabtc(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "IDMA buffer transfer complete. interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR."] - pub fn set_idmabtc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - } - impl Default for Star { - fn default() -> Star { - Star(0) - } - } - #[doc = "The SDMMC_IDMABASE0R register contains the memory buffer base address in single buffer configuration and the buffer 0 base address in double buffer configuration."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idmabase0r(pub u32); - impl Idmabase0r { - #[doc = "Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] -are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] - pub const fn idmabase0(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] -are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1)."] - pub fn set_idmabase0(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Idmabase0r { - fn default() -> Idmabase0r { - Idmabase0r(0) - } - } - #[doc = "The SDMMC_RESP1/2/3/4R registers contain the status of a card, which is part of the received response."] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Resp4r(pub u32); - impl Resp4r { - #[doc = "see Table404."] - pub const fn cardstatus4(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "see Table404."] - pub fn set_cardstatus4(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Resp4r { - fn default() -> Resp4r { - Resp4r(0) - } - } - } -} -pub mod syscfg_h7 { - use crate::generic::*; - #[doc = "System configuration controller"] - #[derive(Copy, Clone)] - pub struct Syscfg(pub *mut u8); - unsafe impl Send for Syscfg {} - unsafe impl Sync for Syscfg {} - impl Syscfg { - #[doc = "peripheral mode configuration register"] - pub fn pmcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "external interrupt configuration register 1"] - pub fn exticr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } - } - #[doc = "compensation cell control/status register"] - pub fn cccsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "SYSCFG compensation cell value register"] - pub fn ccvr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(36usize)) } - } - #[doc = "SYSCFG compensation cell code register"] - pub fn cccr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "SYSCFG power control register"] - pub fn pwrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "SYSCFG package register"] - pub fn pkgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(292usize)) } - } - #[doc = "SYSCFG user register 0"] - pub fn ur0(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(768usize)) } - } - #[doc = "SYSCFG user register 2"] - pub fn ur2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(776usize)) } - } - #[doc = "SYSCFG user register 3"] - pub fn ur3(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(780usize)) } - } - #[doc = "SYSCFG user register 4"] - pub fn ur4(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(784usize)) } - } - #[doc = "SYSCFG user register 5"] - pub fn ur5(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(788usize)) } - } - #[doc = "SYSCFG user register 6"] - pub fn ur6(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(792usize)) } - } - #[doc = "SYSCFG user register 7"] - pub fn ur7(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(796usize)) } - } - #[doc = "SYSCFG user register 8"] - pub fn ur8(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(800usize)) } - } - #[doc = "SYSCFG user register 9"] - pub fn ur9(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(804usize)) } - } - #[doc = "SYSCFG user register 10"] - pub fn ur10(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(808usize)) } - } - #[doc = "SYSCFG user register 11"] - pub fn ur11(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(812usize)) } - } - #[doc = "SYSCFG user register 12"] - pub fn ur12(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(816usize)) } - } - #[doc = "SYSCFG user register 13"] - pub fn ur13(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(820usize)) } - } - #[doc = "SYSCFG user register 14"] - pub fn ur14(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(824usize)) } - } - #[doc = "SYSCFG user register 15"] - pub fn ur15(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(828usize)) } - } - #[doc = "SYSCFG user register 16"] - pub fn ur16(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(832usize)) } - } - #[doc = "SYSCFG user register 17"] - pub fn ur17(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(836usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "SYSCFG user register 14"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur14(pub u32); - impl Ur14 { - #[doc = "D1 Stop Reset"] - pub const fn d1stprst(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "D1 Stop Reset"] - pub fn set_d1stprst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - } - impl Default for Ur14 { - fn default() -> Ur14 { - Ur14(0) - } - } - #[doc = "SYSCFG package register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pkgr(pub u32); - impl Pkgr { - #[doc = "Package"] - pub const fn pkg(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "Package"] - pub fn set_pkg(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - } - impl Default for Pkgr { - fn default() -> Pkgr { - Pkgr(0) - } - } - #[doc = "SYSCFG user register 7"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur7(pub u32); - impl Ur7 { - #[doc = "Secured area start address for bank 1"] - pub const fn sa_beg_1(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Secured area start address for bank 1"] - pub fn set_sa_beg_1(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Secured area end address for bank 1"] - pub const fn sa_end_1(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Secured area end address for bank 1"] - pub fn set_sa_end_1(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - } - impl Default for Ur7 { - fn default() -> Ur7 { - Ur7(0) - } - } - #[doc = "SYSCFG user register 15"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur15(pub u32); - impl Ur15 { - #[doc = "Freeze independent watchdog in Standby mode"] - pub const fn fziwdgstb(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Freeze independent watchdog in Standby mode"] - pub fn set_fziwdgstb(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Ur15 { - fn default() -> Ur15 { - Ur15(0) - } - } - #[doc = "SYSCFG user register 3"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur3(pub u32); - impl Ur3 { - #[doc = "Boot Address 1"] - pub const fn boot_add1(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Boot Address 1"] - pub fn set_boot_add1(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for Ur3 { - fn default() -> Ur3 { - Ur3(0) - } - } - #[doc = "SYSCFG user register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur2(pub u32); - impl Ur2 { - #[doc = "BOR_LVL Brownout Reset Threshold Level"] - pub const fn borh(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x03; - val as u8 - } - #[doc = "BOR_LVL Brownout Reset Threshold Level"] - pub fn set_borh(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); - } - #[doc = "Boot Address 0"] - pub const fn boot_add0(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Boot Address 0"] - pub fn set_boot_add0(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for Ur2 { - fn default() -> Ur2 { - Ur2(0) - } - } - #[doc = "SYSCFG user register 11"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur11(pub u32); - impl Ur11 { - #[doc = "Secured area end address for bank 2"] - pub const fn sa_end_2(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Secured area end address for bank 2"] - pub fn set_sa_end_2(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Independent Watchdog 1 mode"] - pub const fn iwdg1m(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Independent Watchdog 1 mode"] - pub fn set_iwdg1m(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Ur11 { - fn default() -> Ur11 { - Ur11(0) - } - } - #[doc = "SYSCFG compensation cell value register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ccvr(pub u32); - impl Ccvr { - #[doc = "NMOS compensation value"] - pub const fn ncv(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "NMOS compensation value"] - pub fn set_ncv(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "PMOS compensation value"] - pub const fn pcv(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x0f; - val as u8 - } - #[doc = "PMOS compensation value"] - pub fn set_pcv(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); - } - } - impl Default for Ccvr { - fn default() -> Ccvr { - Ccvr(0) - } - } - #[doc = "SYSCFG user register 13"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur13(pub u32); - impl Ur13 { - #[doc = "Secured DTCM RAM Size"] - pub const fn sdrs(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x03; - val as u8 - } - #[doc = "Secured DTCM RAM Size"] - pub fn set_sdrs(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); - } - #[doc = "D1 Standby reset"] - pub const fn d1sbrst(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "D1 Standby reset"] - pub fn set_d1sbrst(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Ur13 { - fn default() -> Ur13 { - Ur13(0) - } - } - #[doc = "SYSCFG user register 12"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur12(pub u32); - impl Ur12 { - #[doc = "Secure mode"] - pub const fn secure(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Secure mode"] - pub fn set_secure(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Ur12 { - fn default() -> Ur12 { - Ur12(0) - } - } - #[doc = "SYSCFG compensation cell code register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cccr(pub u32); - impl Cccr { - #[doc = "NMOS compensation code"] - pub const fn ncc(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "NMOS compensation code"] - pub fn set_ncc(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "PMOS compensation code"] - pub const fn pcc(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x0f; - val as u8 - } - #[doc = "PMOS compensation code"] - pub fn set_pcc(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); - } - } - impl Default for Cccr { - fn default() -> Cccr { - Cccr(0) - } - } - #[doc = "SYSCFG user register 9"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur9(pub u32); - impl Ur9 { - #[doc = "Write protection for flash bank 2"] - pub const fn wrpn_2(&self) -> u8 { - let val = (self.0 >> 0usize) & 0xff; - val as u8 - } - #[doc = "Write protection for flash bank 2"] - pub fn set_wrpn_2(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); - } - #[doc = "Protected area start address for bank 2"] - pub const fn pa_beg_2(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Protected area start address for bank 2"] - pub fn set_pa_beg_2(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - } - impl Default for Ur9 { - fn default() -> Ur9 { - Ur9(0) - } - } - #[doc = "SYSCFG user register 6"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur6(pub u32); - impl Ur6 { - #[doc = "Protected area start address for bank 1"] - pub const fn pa_beg_1(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Protected area start address for bank 1"] - pub fn set_pa_beg_1(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Protected area end address for bank 1"] - pub const fn pa_end_1(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Protected area end address for bank 1"] - pub fn set_pa_end_1(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - } - impl Default for Ur6 { - fn default() -> Ur6 { - Ur6(0) - } - } - #[doc = "compensation cell control/status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cccsr(pub u32); - impl Cccsr { - #[doc = "enable"] - pub const fn en(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "enable"] - pub fn set_en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Code selection"] - pub const fn cs(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Code selection"] - pub fn set_cs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Compensation cell ready flag"] - pub const fn ready(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Compensation cell ready flag"] - pub fn set_ready(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "High-speed at low-voltage"] - pub const fn hslv(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "High-speed at low-voltage"] - pub fn set_hslv(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Cccsr { - fn default() -> Cccsr { - Cccsr(0) - } - } - #[doc = "SYSCFG user register 16"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur16(pub u32); - impl Ur16 { - #[doc = "Freeze independent watchdog in Stop mode"] - pub const fn fziwdgstp(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Freeze independent watchdog in Stop mode"] - pub fn set_fziwdgstp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Private key programmed"] - pub const fn pkp(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Private key programmed"] - pub fn set_pkp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Ur16 { - fn default() -> Ur16 { - Ur16(0) - } - } - #[doc = "SYSCFG user register 5"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur5(pub u32); - impl Ur5 { - #[doc = "Mass erase secured area disabled for bank 1"] - pub const fn mesad_1(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Mass erase secured area disabled for bank 1"] - pub fn set_mesad_1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Write protection for flash bank 1"] - pub const fn wrpn_1(&self) -> u8 { - let val = (self.0 >> 16usize) & 0xff; - val as u8 - } - #[doc = "Write protection for flash bank 1"] - pub fn set_wrpn_1(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 16usize)) | (((val as u32) & 0xff) << 16usize); - } - } - impl Default for Ur5 { - fn default() -> Ur5 { - Ur5(0) - } - } - #[doc = "SYSCFG user register 0"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur0(pub u32); - impl Ur0 { - #[doc = "Bank Swap"] - pub const fn bks(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Bank Swap"] - pub fn set_bks(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Readout protection"] - pub const fn rdp(&self) -> u8 { - let val = (self.0 >> 16usize) & 0xff; - val as u8 - } - #[doc = "Readout protection"] - pub fn set_rdp(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 16usize)) | (((val as u32) & 0xff) << 16usize); - } - } - impl Default for Ur0 { - fn default() -> Ur0 { - Ur0(0) - } - } - #[doc = "SYSCFG user register 17"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur17(pub u32); - impl Ur17 { - #[doc = "I/O high speed / low voltage"] - pub const fn io_hslv(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "I/O high speed / low voltage"] - pub fn set_io_hslv(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - } - impl Default for Ur17 { - fn default() -> Ur17 { - Ur17(0) - } - } - #[doc = "peripheral mode configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pmcr(pub u32); - impl Pmcr { - #[doc = "I2C1 Fm+"] - pub const fn i2c1fmp(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "I2C1 Fm+"] - pub fn set_i2c1fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "I2C2 Fm+"] - pub const fn i2c2fmp(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "I2C2 Fm+"] - pub fn set_i2c2fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "I2C3 Fm+"] - pub const fn i2c3fmp(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "I2C3 Fm+"] - pub fn set_i2c3fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "I2C4 Fm+"] - pub const fn i2c4fmp(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "I2C4 Fm+"] - pub fn set_i2c4fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "PB(6) Fm+"] - pub const fn pb6fmp(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "PB(6) Fm+"] - pub fn set_pb6fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "PB(7) Fast Mode Plus"] - pub const fn pb7fmp(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "PB(7) Fast Mode Plus"] - pub fn set_pb7fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "PB(8) Fast Mode Plus"] - pub const fn pb8fmp(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "PB(8) Fast Mode Plus"] - pub fn set_pb8fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "PB(9) Fm+"] - pub const fn pb9fmp(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "PB(9) Fm+"] - pub fn set_pb9fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "Booster Enable"] - pub const fn booste(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Booster Enable"] - pub fn set_booste(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Analog switch supply voltage selection"] - pub const fn boostvddsel(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Analog switch supply voltage selection"] - pub fn set_boostvddsel(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Ethernet PHY Interface Selection"] - pub const fn epis(&self) -> u8 { - let val = (self.0 >> 21usize) & 0x07; - val as u8 - } - #[doc = "Ethernet PHY Interface Selection"] - pub fn set_epis(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 21usize)) | (((val as u32) & 0x07) << 21usize); - } - #[doc = "PA0 Switch Open"] - pub const fn pa0so(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "PA0 Switch Open"] - pub fn set_pa0so(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "PA1 Switch Open"] - pub const fn pa1so(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "PA1 Switch Open"] - pub fn set_pa1so(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "PC2 Switch Open"] - pub const fn pc2so(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "PC2 Switch Open"] - pub fn set_pc2so(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "PC3 Switch Open"] - pub const fn pc3so(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "PC3 Switch Open"] - pub fn set_pc3so(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - } - impl Default for Pmcr { - fn default() -> Pmcr { - Pmcr(0) - } - } - #[doc = "external interrupt configuration register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Exticr(pub u32); - impl Exticr { - #[doc = "EXTI x configuration (x = 4 to 7)"] - pub fn exti(&self, n: usize) -> u8 { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x0f; - val as u8 - } - #[doc = "EXTI x configuration (x = 4 to 7)"] - pub fn set_exti(&mut self, n: usize, val: u8) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val as u32) & 0x0f) << offs); - } - } - impl Default for Exticr { - fn default() -> Exticr { - Exticr(0) - } - } - #[doc = "SYSCFG user register 10"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur10(pub u32); - impl Ur10 { - #[doc = "Protected area end address for bank 2"] - pub const fn pa_end_2(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Protected area end address for bank 2"] - pub fn set_pa_end_2(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Secured area start address for bank 2"] - pub const fn sa_beg_2(&self) -> u16 { - let val = (self.0 >> 16usize) & 0x0fff; - val as u16 - } - #[doc = "Secured area start address for bank 2"] - pub fn set_sa_beg_2(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 16usize)) | (((val as u32) & 0x0fff) << 16usize); - } - } - impl Default for Ur10 { - fn default() -> Ur10 { - Ur10(0) - } - } - #[doc = "SYSCFG user register 4"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur4(pub u32); - impl Ur4 { - #[doc = "Mass Erase Protected Area Disabled for bank 1"] - pub const fn mepad_1(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Mass Erase Protected Area Disabled for bank 1"] - pub fn set_mepad_1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Ur4 { - fn default() -> Ur4 { - Ur4(0) - } - } - #[doc = "SYSCFG power control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pwrcr(pub u32); - impl Pwrcr { - #[doc = "Overdrive enable"] - pub const fn oden(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "Overdrive enable"] - pub fn set_oden(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - } - impl Default for Pwrcr { - fn default() -> Pwrcr { - Pwrcr(0) - } - } - #[doc = "SYSCFG user register 8"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ur8(pub u32); - impl Ur8 { - #[doc = "Mass erase protected area disabled for bank 2"] - pub const fn mepad_2(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Mass erase protected area disabled for bank 2"] - pub fn set_mepad_2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Mass erase secured area disabled for bank 2"] - pub const fn mesad_2(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Mass erase secured area disabled for bank 2"] - pub fn set_mesad_2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Ur8 { - fn default() -> Ur8 { - Ur8(0) - } - } - } -} -pub mod rcc_h7 { - use crate::generic::*; - #[doc = "Reset and clock control"] - #[derive(Copy, Clone)] - pub struct Rcc(pub *mut u8); - unsafe impl Send for Rcc {} - unsafe impl Sync for Rcc {} - impl Rcc { - #[doc = "clock control register"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "RCC HSI configuration register"] - pub fn hsicfgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "RCC Internal Clock Source Calibration Register"] - pub fn icscr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "RCC Clock Recovery RC Register"] - pub fn crrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "RCC CSI configuration register"] - pub fn csicfgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "RCC Clock Configuration Register"] - pub fn cfgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "RCC Domain 1 Clock Configuration Register"] - pub fn d1cfgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "RCC Domain 2 Clock Configuration Register"] - pub fn d2cfgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "RCC Domain 3 Clock Configuration Register"] - pub fn d3cfgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "RCC PLLs Clock Source Selection Register"] - pub fn pllckselr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(40usize)) } - } - #[doc = "RCC PLLs Configuration Register"] - pub fn pllcfgr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(44usize)) } - } - #[doc = "RCC PLL1 Dividers Configuration Register"] - pub fn plldivr(self, n: usize) -> Reg { - assert!(n < 3usize); - unsafe { Reg::from_ptr(self.0.add(48usize + n * 8usize)) } - } - #[doc = "RCC PLL1 Fractional Divider Register"] - pub fn pllfracr(self, n: usize) -> Reg { - assert!(n < 3usize); - unsafe { Reg::from_ptr(self.0.add(52usize + n * 8usize)) } - } - #[doc = "RCC Domain 1 Kernel Clock Configuration Register"] - pub fn d1ccipr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - #[doc = "RCC Domain 2 Kernel Clock Configuration Register"] - pub fn d2ccip1r(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(80usize)) } - } - #[doc = "RCC Domain 2 Kernel Clock Configuration Register"] - pub fn d2ccip2r(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(84usize)) } - } - #[doc = "RCC Domain 3 Kernel Clock Configuration Register"] - pub fn d3ccipr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(88usize)) } - } - #[doc = "RCC Clock Source Interrupt Enable Register"] - pub fn cier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(96usize)) } - } - #[doc = "RCC Clock Source Interrupt Flag Register"] - pub fn cifr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(100usize)) } - } - #[doc = "RCC Clock Source Interrupt Clear Register"] - pub fn cicr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(104usize)) } - } - #[doc = "RCC Backup Domain Control Register"] - pub fn bdcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(112usize)) } - } - #[doc = "RCC Clock Control and Status Register"] - pub fn csr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(116usize)) } - } - #[doc = "RCC AHB3 Reset Register"] - pub fn ahb3rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(124usize)) } - } - #[doc = "RCC AHB1 Peripheral Reset Register"] - pub fn ahb1rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(128usize)) } - } - #[doc = "RCC AHB2 Peripheral Reset Register"] - pub fn ahb2rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(132usize)) } - } - #[doc = "RCC AHB4 Peripheral Reset Register"] - pub fn ahb4rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(136usize)) } - } - #[doc = "RCC APB3 Peripheral Reset Register"] - pub fn apb3rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(140usize)) } - } - #[doc = "RCC APB1 Peripheral Reset Register"] - pub fn apb1lrstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(144usize)) } - } - #[doc = "RCC APB1 Peripheral Reset Register"] - pub fn apb1hrstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(148usize)) } - } - #[doc = "RCC APB2 Peripheral Reset Register"] - pub fn apb2rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(152usize)) } - } - #[doc = "RCC APB4 Peripheral Reset Register"] - pub fn apb4rstr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(156usize)) } - } - #[doc = "RCC Global Control Register"] - pub fn gcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(160usize)) } - } - #[doc = "RCC D3 Autonomous mode Register"] - pub fn d3amr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(168usize)) } - } - #[doc = "RCC Reset Status Register"] - pub fn rsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(208usize)) } - } - #[doc = "RCC AHB3 Clock Register"] - pub fn ahb3enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(212usize)) } - } - #[doc = "RCC AHB1 Clock Register"] - pub fn ahb1enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(216usize)) } - } - #[doc = "RCC AHB2 Clock Register"] - pub fn ahb2enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(220usize)) } - } - #[doc = "RCC AHB4 Clock Register"] - pub fn ahb4enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(224usize)) } - } - #[doc = "RCC APB3 Clock Register"] - pub fn apb3enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(228usize)) } - } - #[doc = "RCC APB1 Clock Register"] - pub fn apb1lenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(232usize)) } - } - #[doc = "RCC APB1 Clock Register"] - pub fn apb1henr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(236usize)) } - } - #[doc = "RCC APB2 Clock Register"] - pub fn apb2enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(240usize)) } - } - #[doc = "RCC APB4 Clock Register"] - pub fn apb4enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(244usize)) } - } - #[doc = "RCC AHB3 Sleep Clock Register"] - pub fn ahb3lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(252usize)) } - } - #[doc = "RCC AHB1 Sleep Clock Register"] - pub fn ahb1lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(256usize)) } - } - #[doc = "RCC AHB2 Sleep Clock Register"] - pub fn ahb2lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(260usize)) } - } - #[doc = "RCC AHB4 Sleep Clock Register"] - pub fn ahb4lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(264usize)) } - } - #[doc = "RCC APB3 Sleep Clock Register"] - pub fn apb3lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(268usize)) } - } - #[doc = "RCC APB1 Low Sleep Clock Register"] - pub fn apb1llpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(272usize)) } - } - #[doc = "RCC APB1 High Sleep Clock Register"] - pub fn apb1hlpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(276usize)) } - } - #[doc = "RCC APB2 Sleep Clock Register"] - pub fn apb2lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(280usize)) } - } - #[doc = "RCC APB4 Sleep Clock Register"] - pub fn apb4lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(284usize)) } - } - #[doc = "RCC Reset Status Register"] - pub fn c1_rsr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(304usize)) } - } - #[doc = "RCC AHB3 Clock Register"] - pub fn c1_ahb3enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(308usize)) } - } - #[doc = "RCC AHB1 Clock Register"] - pub fn c1_ahb1enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(312usize)) } - } - #[doc = "RCC AHB2 Clock Register"] - pub fn c1_ahb2enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(316usize)) } - } - #[doc = "RCC AHB4 Clock Register"] - pub fn c1_ahb4enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(320usize)) } - } - #[doc = "RCC APB3 Clock Register"] - pub fn c1_apb3enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(324usize)) } - } - #[doc = "RCC APB1 Clock Register"] - pub fn c1_apb1lenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(328usize)) } - } - #[doc = "RCC APB1 Clock Register"] - pub fn c1_apb1henr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(332usize)) } - } - #[doc = "RCC APB2 Clock Register"] - pub fn c1_apb2enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(336usize)) } - } - #[doc = "RCC APB4 Clock Register"] - pub fn c1_apb4enr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(340usize)) } - } - #[doc = "RCC AHB3 Sleep Clock Register"] - pub fn c1_ahb3lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(348usize)) } - } - #[doc = "RCC AHB1 Sleep Clock Register"] - pub fn c1_ahb1lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(352usize)) } - } - #[doc = "RCC AHB2 Sleep Clock Register"] - pub fn c1_ahb2lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(356usize)) } - } - #[doc = "RCC AHB4 Sleep Clock Register"] - pub fn c1_ahb4lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(360usize)) } - } - #[doc = "RCC APB3 Sleep Clock Register"] - pub fn c1_apb3lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(364usize)) } - } - #[doc = "RCC APB1 Low Sleep Clock Register"] - pub fn c1_apb1llpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(368usize)) } - } - #[doc = "RCC APB1 High Sleep Clock Register"] - pub fn c1_apb1hlpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(372usize)) } - } - #[doc = "RCC APB2 Sleep Clock Register"] - pub fn c1_apb2lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(376usize)) } - } - #[doc = "RCC APB4 Sleep Clock Register"] - pub fn c1_apb4lpenr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(380usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "RCC APB4 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb4enr(pub u32); - impl C1Apb4enr { - #[doc = "SYSCFG peripheral clock enable"] - pub const fn syscfgen(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "SYSCFG peripheral clock enable"] - pub fn set_syscfgen(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "LPUART1 Peripheral Clocks Enable"] - pub const fn lpuart1en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "LPUART1 Peripheral Clocks Enable"] - pub fn set_lpuart1en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "SPI6 Peripheral Clocks Enable"] - pub const fn spi6en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "SPI6 Peripheral Clocks Enable"] - pub fn set_spi6en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "I2C4 Peripheral Clocks Enable"] - pub const fn i2c4en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "I2C4 Peripheral Clocks Enable"] - pub fn set_i2c4en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "LPTIM2 Peripheral Clocks Enable"] - pub const fn lptim2en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "LPTIM2 Peripheral Clocks Enable"] - pub fn set_lptim2en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "LPTIM3 Peripheral Clocks Enable"] - pub const fn lptim3en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "LPTIM3 Peripheral Clocks Enable"] - pub fn set_lptim3en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "LPTIM4 Peripheral Clocks Enable"] - pub const fn lptim4en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 11usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "LPTIM4 Peripheral Clocks Enable"] - pub fn set_lptim4en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "LPTIM5 Peripheral Clocks Enable"] - pub const fn lptim5en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "LPTIM5 Peripheral Clocks Enable"] - pub fn set_lptim5en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "COMP1/2 peripheral clock enable"] - pub const fn comp12en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "COMP1/2 peripheral clock enable"] - pub fn set_comp12en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "VREF peripheral clock enable"] - pub const fn vrefen(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "VREF peripheral clock enable"] - pub fn set_vrefen(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "RTC APB Clock Enable"] - pub const fn rtcapben(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "RTC APB Clock Enable"] - pub fn set_rtcapben(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "SAI4 Peripheral Clocks Enable"] - pub const fn sai4en(&self) -> super::vals::C1Apb4enrSyscfgen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::C1Apb4enrSyscfgen(val as u8) - } - #[doc = "SAI4 Peripheral Clocks Enable"] - pub fn set_sai4en(&mut self, val: super::vals::C1Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - } - impl Default for C1Apb4enr { - fn default() -> C1Apb4enr { - C1Apb4enr(0) - } - } - #[doc = "RCC AHB2 Peripheral Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb2rstr(pub u32); - impl Ahb2rstr { - #[doc = "CAMITF block reset"] - pub const fn camitfrst(&self) -> super::vals::Camitfrst { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Camitfrst(val as u8) - } - #[doc = "CAMITF block reset"] - pub fn set_camitfrst(&mut self, val: super::vals::Camitfrst) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Cryptography block reset"] - pub const fn cryptrst(&self) -> super::vals::Camitfrst { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Camitfrst(val as u8) - } - #[doc = "Cryptography block reset"] - pub fn set_cryptrst(&mut self, val: super::vals::Camitfrst) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Hash block reset"] - pub const fn hashrst(&self) -> super::vals::Camitfrst { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Camitfrst(val as u8) - } - #[doc = "Hash block reset"] - pub fn set_hashrst(&mut self, val: super::vals::Camitfrst) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Random Number Generator block reset"] - pub const fn rngrst(&self) -> super::vals::Camitfrst { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Camitfrst(val as u8) - } - #[doc = "Random Number Generator block reset"] - pub fn set_rngrst(&mut self, val: super::vals::Camitfrst) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "SDMMC2 and SDMMC2 Delay block reset"] - pub const fn sdmmc2rst(&self) -> super::vals::Camitfrst { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Camitfrst(val as u8) - } - #[doc = "SDMMC2 and SDMMC2 Delay block reset"] - pub fn set_sdmmc2rst(&mut self, val: super::vals::Camitfrst) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - } - impl Default for Ahb2rstr { - fn default() -> Ahb2rstr { - Ahb2rstr(0) - } - } - #[doc = "RCC HSI configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Hsicfgr(pub u32); - impl Hsicfgr { - #[doc = "HSI clock calibration"] - pub const fn hsical(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "HSI clock calibration"] - pub fn set_hsical(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "HSI clock trimming"] - pub const fn hsitrim(&self) -> u8 { - let val = (self.0 >> 24usize) & 0x7f; - val as u8 - } - #[doc = "HSI clock trimming"] - pub fn set_hsitrim(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 24usize)) | (((val as u32) & 0x7f) << 24usize); - } - } - impl Default for Hsicfgr { - fn default() -> Hsicfgr { - Hsicfgr(0) - } - } - #[doc = "RCC APB1 Low Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1llpenr(pub u32); - impl Apb1llpenr { - #[doc = "TIM2 peripheral clock enable during CSleep mode"] - pub const fn tim2lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM2 peripheral clock enable during CSleep mode"] - pub fn set_tim2lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM3 peripheral clock enable during CSleep mode"] - pub const fn tim3lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM3 peripheral clock enable during CSleep mode"] - pub fn set_tim3lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "TIM4 peripheral clock enable during CSleep mode"] - pub const fn tim4lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM4 peripheral clock enable during CSleep mode"] - pub fn set_tim4lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "TIM5 peripheral clock enable during CSleep mode"] - pub const fn tim5lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM5 peripheral clock enable during CSleep mode"] - pub fn set_tim5lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "TIM6 peripheral clock enable during CSleep mode"] - pub const fn tim6lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM6 peripheral clock enable during CSleep mode"] - pub fn set_tim6lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "TIM7 peripheral clock enable during CSleep mode"] - pub const fn tim7lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM7 peripheral clock enable during CSleep mode"] - pub fn set_tim7lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "TIM12 peripheral clock enable during CSleep mode"] - pub const fn tim12lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM12 peripheral clock enable during CSleep mode"] - pub fn set_tim12lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "TIM13 peripheral clock enable during CSleep mode"] - pub const fn tim13lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM13 peripheral clock enable during CSleep mode"] - pub fn set_tim13lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "TIM14 peripheral clock enable during CSleep mode"] - pub const fn tim14lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM14 peripheral clock enable during CSleep mode"] - pub fn set_tim14lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "LPTIM1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim1lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "LPTIM1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim1lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SPI2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi2lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "SPI2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi2lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SPI3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi3lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "SPI3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi3lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "SPDIFRX Peripheral Clocks Enable During CSleep Mode"] - pub const fn spdifrxlpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "SPDIFRX Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spdifrxlpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "USART2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn usart2lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "USART2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_usart2lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "USART3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn usart3lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "USART3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_usart3lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "UART4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn uart4lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "UART4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_uart4lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "UART5 Peripheral Clocks Enable During CSleep Mode"] - pub const fn uart5lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "UART5 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_uart5lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "I2C1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn i2c1lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "I2C1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_i2c1lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn i2c2lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "I2C2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_i2c2lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "I2C3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn i2c3lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "I2C3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_i2c3lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "HDMI-CEC Peripheral Clocks Enable During CSleep Mode"] - pub const fn ceclpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 27usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "HDMI-CEC Peripheral Clocks Enable During CSleep Mode"] - pub fn set_ceclpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "DAC1/2 peripheral clock enable during CSleep mode"] - pub const fn dac12lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "DAC1/2 peripheral clock enable during CSleep mode"] - pub fn set_dac12lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "UART7 Peripheral Clocks Enable During CSleep Mode"] - pub const fn uart7lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "UART7 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_uart7lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "UART8 Peripheral Clocks Enable During CSleep Mode"] - pub const fn uart8lpen(&self) -> super::vals::Apb1llpenrTim2lpen { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Apb1llpenrTim2lpen(val as u8) - } - #[doc = "UART8 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_uart8lpen(&mut self, val: super::vals::Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Apb1llpenr { - fn default() -> Apb1llpenr { - Apb1llpenr(0) - } - } - #[doc = "RCC Clock Control and Status Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Csr(pub u32); - impl Csr { - #[doc = "LSI oscillator enable"] - pub const fn lsion(&self) -> super::vals::Lsion { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Lsion(val as u8) - } - #[doc = "LSI oscillator enable"] - pub fn set_lsion(&mut self, val: super::vals::Lsion) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "LSI oscillator ready"] - pub const fn lsirdy(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "LSI oscillator ready"] - pub fn set_lsirdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - } - impl Default for Csr { - fn default() -> Csr { - Csr(0) - } - } - #[doc = "RCC CSI configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Csicfgr(pub u32); - impl Csicfgr { - #[doc = "CSI clock calibration"] - pub const fn csical(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x01ff; - val as u16 - } - #[doc = "CSI clock calibration"] - pub fn set_csical(&mut self, val: u16) { - self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); - } - #[doc = "CSI clock trimming"] - pub const fn csitrim(&self) -> u8 { - let val = (self.0 >> 24usize) & 0x3f; - val as u8 - } - #[doc = "CSI clock trimming"] - pub fn set_csitrim(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 24usize)) | (((val as u32) & 0x3f) << 24usize); - } - } - impl Default for Csicfgr { - fn default() -> Csicfgr { - Csicfgr(0) - } - } - #[doc = "RCC AHB2 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb2lpenr(pub u32); - impl Ahb2lpenr { - #[doc = "DCMI peripheral clock enable during csleep mode"] - pub const fn dcmilpen(&self) -> super::vals::Ahb2lpenrDcmilpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "DCMI peripheral clock enable during csleep mode"] - pub fn set_dcmilpen(&mut self, val: super::vals::Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "CRYPT peripheral clock enable during CSleep mode"] - pub const fn cryptlpen(&self) -> super::vals::Ahb2lpenrDcmilpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "CRYPT peripheral clock enable during CSleep mode"] - pub fn set_cryptlpen(&mut self, val: super::vals::Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "HASH peripheral clock enable during CSleep mode"] - pub const fn hashlpen(&self) -> super::vals::Ahb2lpenrDcmilpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "HASH peripheral clock enable during CSleep mode"] - pub fn set_hashlpen(&mut self, val: super::vals::Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "RNG peripheral clock enable during CSleep mode"] - pub const fn rnglpen(&self) -> super::vals::Ahb2lpenrDcmilpen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "RNG peripheral clock enable during CSleep mode"] - pub fn set_rnglpen(&mut self, val: super::vals::Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode"] - pub const fn sdmmc2lpen(&self) -> super::vals::Ahb2lpenrDcmilpen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode"] - pub fn set_sdmmc2lpen(&mut self, val: super::vals::Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SRAM1 Clock Enable During CSleep Mode"] - pub const fn sram1lpen(&self) -> super::vals::Ahb2lpenrDcmilpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "SRAM1 Clock Enable During CSleep Mode"] - pub fn set_sram1lpen(&mut self, val: super::vals::Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "SRAM2 Clock Enable During CSleep Mode"] - pub const fn sram2lpen(&self) -> super::vals::Ahb2lpenrDcmilpen { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "SRAM2 Clock Enable During CSleep Mode"] - pub fn set_sram2lpen(&mut self, val: super::vals::Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "SRAM3 Clock Enable During CSleep Mode"] - pub const fn sram3lpen(&self) -> super::vals::Ahb2lpenrDcmilpen { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "SRAM3 Clock Enable During CSleep Mode"] - pub fn set_sram3lpen(&mut self, val: super::vals::Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Ahb2lpenr { - fn default() -> Ahb2lpenr { - Ahb2lpenr(0) - } - } - #[doc = "RCC Reset Status Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rsr(pub u32); - impl Rsr { - #[doc = "Remove reset flag"] - pub const fn rmvf(&self) -> super::vals::RsrRmvf { - let val = (self.0 >> 16usize) & 0x01; - super::vals::RsrRmvf(val as u8) - } - #[doc = "Remove reset flag"] - pub fn set_rmvf(&mut self, val: super::vals::RsrRmvf) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "CPU reset flag"] - pub const fn cpurstf(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "CPU reset flag"] - pub fn set_cpurstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "D1 domain power switch reset flag"] - pub const fn d1rstf(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "D1 domain power switch reset flag"] - pub fn set_d1rstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "D2 domain power switch reset flag"] - pub const fn d2rstf(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "D2 domain power switch reset flag"] - pub fn set_d2rstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "BOR reset flag"] - pub const fn borrstf(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "BOR reset flag"] - pub fn set_borrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "Pin reset flag (NRST)"] - pub const fn pinrstf(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Pin reset flag (NRST)"] - pub fn set_pinrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "POR/PDR reset flag"] - pub const fn porrstf(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "POR/PDR reset flag"] - pub fn set_porrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "System reset from CPU reset flag"] - pub const fn sftrstf(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "System reset from CPU reset flag"] - pub fn set_sftrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "Independent Watchdog reset flag"] - pub const fn iwdg1rstf(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "Independent Watchdog reset flag"] - pub fn set_iwdg1rstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "Window Watchdog reset flag"] - pub const fn wwdg1rstf(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "Window Watchdog reset flag"] - pub fn set_wwdg1rstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - #[doc = "Reset due to illegal D1 DStandby or CPU CStop flag"] - pub const fn lpwrrstf(&self) -> bool { - let val = (self.0 >> 30usize) & 0x01; - val != 0 - } - #[doc = "Reset due to illegal D1 DStandby or CPU CStop flag"] - pub fn set_lpwrrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); - } - } - impl Default for Rsr { - fn default() -> Rsr { - Rsr(0) - } - } - #[doc = "RCC Domain 1 Kernel Clock Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D1ccipr(pub u32); - impl D1ccipr { - #[doc = "FMC kernel clock source selection"] - pub const fn fmcsel(&self) -> super::vals::Fmcsel { - let val = (self.0 >> 0usize) & 0x03; - super::vals::Fmcsel(val as u8) - } - #[doc = "FMC kernel clock source selection"] - pub fn set_fmcsel(&mut self, val: super::vals::Fmcsel) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val.0 as u32) & 0x03) << 0usize); - } - #[doc = "QUADSPI kernel clock source selection"] - pub const fn qspisel(&self) -> super::vals::Fmcsel { - let val = (self.0 >> 4usize) & 0x03; - super::vals::Fmcsel(val as u8) - } - #[doc = "QUADSPI kernel clock source selection"] - pub fn set_qspisel(&mut self, val: super::vals::Fmcsel) { - self.0 = (self.0 & !(0x03 << 4usize)) | (((val.0 as u32) & 0x03) << 4usize); - } - #[doc = "SDMMC kernel clock source selection"] - pub const fn sdmmcsel(&self) -> super::vals::Sdmmcsel { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Sdmmcsel(val as u8) - } - #[doc = "SDMMC kernel clock source selection"] - pub fn set_sdmmcsel(&mut self, val: super::vals::Sdmmcsel) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "per_ck clock source selection"] - pub const fn ckpersel(&self) -> super::vals::Ckpersel { - let val = (self.0 >> 28usize) & 0x03; - super::vals::Ckpersel(val as u8) - } - #[doc = "per_ck clock source selection"] - pub fn set_ckpersel(&mut self, val: super::vals::Ckpersel) { - self.0 = (self.0 & !(0x03 << 28usize)) | (((val.0 as u32) & 0x03) << 28usize); - } - } - impl Default for D1ccipr { - fn default() -> D1ccipr { - D1ccipr(0) - } - } - #[doc = "RCC AHB1 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Ahb1enr(pub u32); - impl C1Ahb1enr { - #[doc = "DMA1 Clock Enable"] - pub const fn dma1en(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "DMA1 Clock Enable"] - pub fn set_dma1en(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2 Clock Enable"] - pub const fn dma2en(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "DMA2 Clock Enable"] - pub fn set_dma2en(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "ADC1/2 Peripheral Clocks Enable"] - pub const fn adc12en(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "ADC1/2 Peripheral Clocks Enable"] - pub fn set_adc12en(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Ethernet MAC bus interface Clock Enable"] - pub const fn eth1macen(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 15usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "Ethernet MAC bus interface Clock Enable"] - pub fn set_eth1macen(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Ethernet Transmission Clock Enable"] - pub const fn eth1txen(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "Ethernet Transmission Clock Enable"] - pub fn set_eth1txen(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "Ethernet Reception Clock Enable"] - pub const fn eth1rxen(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 17usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "Ethernet Reception Clock Enable"] - pub fn set_eth1rxen(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "USB1OTG Peripheral Clocks Enable"] - pub const fn usb1otgen(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 25usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "USB1OTG Peripheral Clocks Enable"] - pub fn set_usb1otgen(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "USB_PHY1 Clocks Enable"] - pub const fn usb1ulpien(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 26usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "USB_PHY1 Clocks Enable"] - pub fn set_usb1ulpien(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val.0 as u32) & 0x01) << 26usize); - } - #[doc = "USB2OTG Peripheral Clocks Enable"] - pub const fn usb2otgen(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 27usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "USB2OTG Peripheral Clocks Enable"] - pub fn set_usb2otgen(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "USB_PHY2 Clocks Enable"] - pub const fn usb2ulpien(&self) -> super::vals::C1Ahb1enrDma1en { - let val = (self.0 >> 28usize) & 0x01; - super::vals::C1Ahb1enrDma1en(val as u8) - } - #[doc = "USB_PHY2 Clocks Enable"] - pub fn set_usb2ulpien(&mut self, val: super::vals::C1Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - } - impl Default for C1Ahb1enr { - fn default() -> C1Ahb1enr { - C1Ahb1enr(0) - } - } - #[doc = "RCC AHB2 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Ahb2enr(pub u32); - impl C1Ahb2enr { - #[doc = "DCMI peripheral clock"] - pub const fn dcmien(&self) -> super::vals::C1Ahb2enrDcmien { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Ahb2enrDcmien(val as u8) - } - #[doc = "DCMI peripheral clock"] - pub fn set_dcmien(&mut self, val: super::vals::C1Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "CRYPT peripheral clock enable"] - pub const fn crypten(&self) -> super::vals::C1Ahb2enrDcmien { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Ahb2enrDcmien(val as u8) - } - #[doc = "CRYPT peripheral clock enable"] - pub fn set_crypten(&mut self, val: super::vals::C1Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "HASH peripheral clock enable"] - pub const fn hashen(&self) -> super::vals::C1Ahb2enrDcmien { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Ahb2enrDcmien(val as u8) - } - #[doc = "HASH peripheral clock enable"] - pub fn set_hashen(&mut self, val: super::vals::C1Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "RNG peripheral clocks enable"] - pub const fn rngen(&self) -> super::vals::C1Ahb2enrDcmien { - let val = (self.0 >> 6usize) & 0x01; - super::vals::C1Ahb2enrDcmien(val as u8) - } - #[doc = "RNG peripheral clocks enable"] - pub fn set_rngen(&mut self, val: super::vals::C1Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "SDMMC2 and SDMMC2 delay clock enable"] - pub const fn sdmmc2en(&self) -> super::vals::C1Ahb2enrDcmien { - let val = (self.0 >> 9usize) & 0x01; - super::vals::C1Ahb2enrDcmien(val as u8) - } - #[doc = "SDMMC2 and SDMMC2 delay clock enable"] - pub fn set_sdmmc2en(&mut self, val: super::vals::C1Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SRAM1 block enable"] - pub const fn sram1en(&self) -> super::vals::C1Ahb2enrDcmien { - let val = (self.0 >> 29usize) & 0x01; - super::vals::C1Ahb2enrDcmien(val as u8) - } - #[doc = "SRAM1 block enable"] - pub fn set_sram1en(&mut self, val: super::vals::C1Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "SRAM2 block enable"] - pub const fn sram2en(&self) -> super::vals::C1Ahb2enrDcmien { - let val = (self.0 >> 30usize) & 0x01; - super::vals::C1Ahb2enrDcmien(val as u8) - } - #[doc = "SRAM2 block enable"] - pub fn set_sram2en(&mut self, val: super::vals::C1Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "SRAM3 block enable"] - pub const fn sram3en(&self) -> super::vals::C1Ahb2enrDcmien { - let val = (self.0 >> 31usize) & 0x01; - super::vals::C1Ahb2enrDcmien(val as u8) - } - #[doc = "SRAM3 block enable"] - pub fn set_sram3en(&mut self, val: super::vals::C1Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for C1Ahb2enr { - fn default() -> C1Ahb2enr { - C1Ahb2enr(0) - } - } - #[doc = "RCC PLL2 Dividers Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pll2divr(pub u32); - impl Pll2divr { - #[doc = "Multiplication factor for PLL1 VCO"] - pub const fn divn2(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x01ff; - val as u16 - } - #[doc = "Multiplication factor for PLL1 VCO"] - pub fn set_divn2(&mut self, val: u16) { - self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); - } - #[doc = "PLL1 DIVP division factor"] - pub const fn divp2(&self) -> u8 { - let val = (self.0 >> 9usize) & 0x7f; - val as u8 - } - #[doc = "PLL1 DIVP division factor"] - pub fn set_divp2(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 9usize)) | (((val as u32) & 0x7f) << 9usize); - } - #[doc = "PLL1 DIVQ division factor"] - pub const fn divq2(&self) -> u8 { - let val = (self.0 >> 16usize) & 0x7f; - val as u8 - } - #[doc = "PLL1 DIVQ division factor"] - pub fn set_divq2(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 16usize)) | (((val as u32) & 0x7f) << 16usize); - } - #[doc = "PLL1 DIVR division factor"] - pub const fn divr2(&self) -> u8 { - let val = (self.0 >> 24usize) & 0x7f; - val as u8 - } - #[doc = "PLL1 DIVR division factor"] - pub fn set_divr2(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 24usize)) | (((val as u32) & 0x7f) << 24usize); - } - } - impl Default for Pll2divr { - fn default() -> Pll2divr { - Pll2divr(0) - } - } - #[doc = "RCC D3 Autonomous mode Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D3amr(pub u32); - impl D3amr { - #[doc = "BDMA and DMAMUX Autonomous mode enable"] - pub const fn bdmaamen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "BDMA and DMAMUX Autonomous mode enable"] - pub fn set_bdmaamen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "LPUART1 Autonomous mode enable"] - pub const fn lpuart1amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "LPUART1 Autonomous mode enable"] - pub fn set_lpuart1amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "SPI6 Autonomous mode enable"] - pub const fn spi6amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "SPI6 Autonomous mode enable"] - pub fn set_spi6amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "I2C4 Autonomous mode enable"] - pub const fn i2c4amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "I2C4 Autonomous mode enable"] - pub fn set_i2c4amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "LPTIM2 Autonomous mode enable"] - pub const fn lptim2amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "LPTIM2 Autonomous mode enable"] - pub fn set_lptim2amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "LPTIM3 Autonomous mode enable"] - pub const fn lptim3amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "LPTIM3 Autonomous mode enable"] - pub fn set_lptim3amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "LPTIM4 Autonomous mode enable"] - pub const fn lptim4amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "LPTIM4 Autonomous mode enable"] - pub fn set_lptim4amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "LPTIM5 Autonomous mode enable"] - pub const fn lptim5amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "LPTIM5 Autonomous mode enable"] - pub fn set_lptim5amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "COMP12 Autonomous mode enable"] - pub const fn comp12amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "COMP12 Autonomous mode enable"] - pub fn set_comp12amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "VREF Autonomous mode enable"] - pub const fn vrefamen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "VREF Autonomous mode enable"] - pub fn set_vrefamen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "RTC Autonomous mode enable"] - pub const fn rtcamen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "RTC Autonomous mode enable"] - pub fn set_rtcamen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "CRC Autonomous mode enable"] - pub const fn crcamen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "CRC Autonomous mode enable"] - pub fn set_crcamen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "SAI4 Autonomous mode enable"] - pub const fn sai4amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "SAI4 Autonomous mode enable"] - pub fn set_sai4amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "ADC3 Autonomous mode enable"] - pub const fn adc3amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "ADC3 Autonomous mode enable"] - pub fn set_adc3amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "Backup RAM Autonomous mode enable"] - pub const fn bkpramamen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "Backup RAM Autonomous mode enable"] - pub fn set_bkpramamen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "SRAM4 Autonomous mode enable"] - pub const fn sram4amen(&self) -> super::vals::Bdmaamen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Bdmaamen(val as u8) - } - #[doc = "SRAM4 Autonomous mode enable"] - pub fn set_sram4amen(&mut self, val: super::vals::Bdmaamen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - } - impl Default for D3amr { - fn default() -> D3amr { - D3amr(0) - } - } - #[doc = "RCC AHB4 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Ahb4lpenr(pub u32); - impl C1Ahb4lpenr { - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioalpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioalpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioblpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioblpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioclpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioclpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpiodlpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpiodlpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioelpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioelpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioflpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioflpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioglpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioglpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpiohlpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpiohlpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioilpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioilpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpiojlpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpiojlpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioklpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioklpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "CRC peripheral clock enable during CSleep mode"] - pub const fn crclpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "CRC peripheral clock enable during CSleep mode"] - pub fn set_crclpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "BDMA Clock Enable During CSleep Mode"] - pub const fn bdmalpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "BDMA Clock Enable During CSleep Mode"] - pub fn set_bdmalpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "ADC3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn adc3lpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "ADC3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_adc3lpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "Backup RAM Clock Enable During CSleep Mode"] - pub const fn bkpramlpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "Backup RAM Clock Enable During CSleep Mode"] - pub fn set_bkpramlpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "SRAM4 Clock Enable During CSleep Mode"] - pub const fn sram4lpen(&self) -> super::vals::C1Ahb4lpenrGpioalpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::C1Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "SRAM4 Clock Enable During CSleep Mode"] - pub fn set_sram4lpen(&mut self, val: super::vals::C1Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - } - impl Default for C1Ahb4lpenr { - fn default() -> C1Ahb4lpenr { - C1Ahb4lpenr(0) - } - } - #[doc = "RCC AHB1 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb1lpenr(pub u32); - impl Ahb1lpenr { - #[doc = "DMA1 Clock Enable During CSleep Mode"] - pub const fn dma1lpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "DMA1 Clock Enable During CSleep Mode"] - pub fn set_dma1lpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2 Clock Enable During CSleep Mode"] - pub const fn dma2lpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "DMA2 Clock Enable During CSleep Mode"] - pub fn set_dma2lpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "ADC1/2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn adc12lpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "ADC1/2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_adc12lpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Ethernet MAC bus interface Clock Enable During CSleep Mode"] - pub const fn eth1maclpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "Ethernet MAC bus interface Clock Enable During CSleep Mode"] - pub fn set_eth1maclpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Ethernet Transmission Clock Enable During CSleep Mode"] - pub const fn eth1txlpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "Ethernet Transmission Clock Enable During CSleep Mode"] - pub fn set_eth1txlpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "Ethernet Reception Clock Enable During CSleep Mode"] - pub const fn eth1rxlpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "Ethernet Reception Clock Enable During CSleep Mode"] - pub fn set_eth1rxlpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "USB1OTG peripheral clock enable during CSleep mode"] - pub const fn usb1otglpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 25usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "USB1OTG peripheral clock enable during CSleep mode"] - pub fn set_usb1otglpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "USB_PHY1 clock enable during CSleep mode"] - pub const fn usb1otghsulpilpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 26usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "USB_PHY1 clock enable during CSleep mode"] - pub fn set_usb1otghsulpilpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val.0 as u32) & 0x01) << 26usize); - } - #[doc = "USB2OTG peripheral clock enable during CSleep mode"] - pub const fn usb2otglpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 27usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "USB2OTG peripheral clock enable during CSleep mode"] - pub fn set_usb2otglpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "USB_PHY2 clocks enable during CSleep mode"] - pub const fn usb2otghsulpilpen(&self) -> super::vals::Ahb1lpenrDma1lpen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "USB_PHY2 clocks enable during CSleep mode"] - pub fn set_usb2otghsulpilpen(&mut self, val: super::vals::Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - } - impl Default for Ahb1lpenr { - fn default() -> Ahb1lpenr { - Ahb1lpenr(0) - } - } - #[doc = "RCC APB4 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb4enr(pub u32); - impl Apb4enr { - #[doc = "SYSCFG peripheral clock enable"] - pub const fn syscfgen(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "SYSCFG peripheral clock enable"] - pub fn set_syscfgen(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "LPUART1 Peripheral Clocks Enable"] - pub const fn lpuart1en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "LPUART1 Peripheral Clocks Enable"] - pub fn set_lpuart1en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "SPI6 Peripheral Clocks Enable"] - pub const fn spi6en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "SPI6 Peripheral Clocks Enable"] - pub fn set_spi6en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "I2C4 Peripheral Clocks Enable"] - pub const fn i2c4en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "I2C4 Peripheral Clocks Enable"] - pub fn set_i2c4en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "LPTIM2 Peripheral Clocks Enable"] - pub const fn lptim2en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "LPTIM2 Peripheral Clocks Enable"] - pub fn set_lptim2en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "LPTIM3 Peripheral Clocks Enable"] - pub const fn lptim3en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "LPTIM3 Peripheral Clocks Enable"] - pub fn set_lptim3en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "LPTIM4 Peripheral Clocks Enable"] - pub const fn lptim4en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "LPTIM4 Peripheral Clocks Enable"] - pub fn set_lptim4en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "LPTIM5 Peripheral Clocks Enable"] - pub const fn lptim5en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "LPTIM5 Peripheral Clocks Enable"] - pub fn set_lptim5en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "COMP1/2 peripheral clock enable"] - pub const fn comp12en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "COMP1/2 peripheral clock enable"] - pub fn set_comp12en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "VREF peripheral clock enable"] - pub const fn vrefen(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "VREF peripheral clock enable"] - pub fn set_vrefen(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "RTC APB Clock Enable"] - pub const fn rtcapben(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "RTC APB Clock Enable"] - pub fn set_rtcapben(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "SAI4 Peripheral Clocks Enable"] - pub const fn sai4en(&self) -> super::vals::Apb4enrSyscfgen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Apb4enrSyscfgen(val as u8) - } - #[doc = "SAI4 Peripheral Clocks Enable"] - pub fn set_sai4en(&mut self, val: super::vals::Apb4enrSyscfgen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - } - impl Default for Apb4enr { - fn default() -> Apb4enr { - Apb4enr(0) - } - } - #[doc = "RCC APB2 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb2lpenr(pub u32); - impl Apb2lpenr { - #[doc = "TIM1 peripheral clock enable during CSleep mode"] - pub const fn tim1lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM1 peripheral clock enable during CSleep mode"] - pub fn set_tim1lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM8 peripheral clock enable during CSleep mode"] - pub const fn tim8lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM8 peripheral clock enable during CSleep mode"] - pub fn set_tim8lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "USART1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn usart1lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "USART1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_usart1lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "USART6 Peripheral Clocks Enable During CSleep Mode"] - pub const fn usart6lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "USART6 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_usart6lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "SPI1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi1lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SPI1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi1lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "SPI4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi4lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 13usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SPI4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi4lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "TIM15 peripheral clock enable during CSleep mode"] - pub const fn tim15lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM15 peripheral clock enable during CSleep mode"] - pub fn set_tim15lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "TIM16 peripheral clock enable during CSleep mode"] - pub const fn tim16lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM16 peripheral clock enable during CSleep mode"] - pub fn set_tim16lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "TIM17 peripheral clock enable during CSleep mode"] - pub const fn tim17lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM17 peripheral clock enable during CSleep mode"] - pub fn set_tim17lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "SPI5 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi5lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SPI5 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi5lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "SAI1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn sai1lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SAI1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_sai1lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "SAI2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn sai2lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SAI2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_sai2lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "SAI3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn sai3lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SAI3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_sai3lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "DFSDM1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn dfsdm1lpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "DFSDM1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_dfsdm1lpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "HRTIM peripheral clock enable during CSleep mode"] - pub const fn hrtimlpen(&self) -> super::vals::Apb2lpenrTim1lpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Apb2lpenrTim1lpen(val as u8) - } - #[doc = "HRTIM peripheral clock enable during CSleep mode"] - pub fn set_hrtimlpen(&mut self, val: super::vals::Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - } - impl Default for Apb2lpenr { - fn default() -> Apb2lpenr { - Apb2lpenr(0) - } - } - #[doc = "RCC AHB4 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb4enr(pub u32); - impl Ahb4enr { - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioaen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioaen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioben(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioben(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiocen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiocen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioden(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioden(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioeen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioeen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiofen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiofen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiogen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiogen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiohen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiohen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioien(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioien(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiojen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiojen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioken(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioken(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "CRC peripheral clock enable"] - pub const fn crcen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "CRC peripheral clock enable"] - pub fn set_crcen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "BDMA and DMAMUX2 Clock Enable"] - pub const fn bdmaen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "BDMA and DMAMUX2 Clock Enable"] - pub fn set_bdmaen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "ADC3 Peripheral Clocks Enable"] - pub const fn adc3en(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "ADC3 Peripheral Clocks Enable"] - pub fn set_adc3en(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "HSEM peripheral clock enable"] - pub const fn hsemen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 25usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "HSEM peripheral clock enable"] - pub fn set_hsemen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "Backup RAM Clock Enable"] - pub const fn bkpramen(&self) -> super::vals::Ahb4enrGpioaen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Ahb4enrGpioaen(val as u8) - } - #[doc = "Backup RAM Clock Enable"] - pub fn set_bkpramen(&mut self, val: super::vals::Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - } - impl Default for Ahb4enr { - fn default() -> Ahb4enr { - Ahb4enr(0) - } - } - #[doc = "RCC AHB2 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb2enr(pub u32); - impl Ahb2enr { - #[doc = "DCMI peripheral clock"] - pub const fn dcmien(&self) -> super::vals::Ahb2enrDcmien { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ahb2enrDcmien(val as u8) - } - #[doc = "DCMI peripheral clock"] - pub fn set_dcmien(&mut self, val: super::vals::Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "CRYPT peripheral clock enable"] - pub const fn crypten(&self) -> super::vals::Ahb2enrDcmien { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Ahb2enrDcmien(val as u8) - } - #[doc = "CRYPT peripheral clock enable"] - pub fn set_crypten(&mut self, val: super::vals::Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "HASH peripheral clock enable"] - pub const fn hashen(&self) -> super::vals::Ahb2enrDcmien { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Ahb2enrDcmien(val as u8) - } - #[doc = "HASH peripheral clock enable"] - pub fn set_hashen(&mut self, val: super::vals::Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "RNG peripheral clocks enable"] - pub const fn rngen(&self) -> super::vals::Ahb2enrDcmien { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Ahb2enrDcmien(val as u8) - } - #[doc = "RNG peripheral clocks enable"] - pub fn set_rngen(&mut self, val: super::vals::Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "SDMMC2 and SDMMC2 delay clock enable"] - pub const fn sdmmc2en(&self) -> super::vals::Ahb2enrDcmien { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Ahb2enrDcmien(val as u8) - } - #[doc = "SDMMC2 and SDMMC2 delay clock enable"] - pub fn set_sdmmc2en(&mut self, val: super::vals::Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SRAM1 block enable"] - pub const fn sram1en(&self) -> super::vals::Ahb2enrDcmien { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Ahb2enrDcmien(val as u8) - } - #[doc = "SRAM1 block enable"] - pub fn set_sram1en(&mut self, val: super::vals::Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "SRAM2 block enable"] - pub const fn sram2en(&self) -> super::vals::Ahb2enrDcmien { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Ahb2enrDcmien(val as u8) - } - #[doc = "SRAM2 block enable"] - pub fn set_sram2en(&mut self, val: super::vals::Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "SRAM3 block enable"] - pub const fn sram3en(&self) -> super::vals::Ahb2enrDcmien { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Ahb2enrDcmien(val as u8) - } - #[doc = "SRAM3 block enable"] - pub fn set_sram3en(&mut self, val: super::vals::Ahb2enrDcmien) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Ahb2enr { - fn default() -> Ahb2enr { - Ahb2enr(0) - } - } - #[doc = "RCC AHB1 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb1enr(pub u32); - impl Ahb1enr { - #[doc = "DMA1 Clock Enable"] - pub const fn dma1en(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "DMA1 Clock Enable"] - pub fn set_dma1en(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2 Clock Enable"] - pub const fn dma2en(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "DMA2 Clock Enable"] - pub fn set_dma2en(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "ADC1/2 Peripheral Clocks Enable"] - pub const fn adc12en(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "ADC1/2 Peripheral Clocks Enable"] - pub fn set_adc12en(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Ethernet MAC bus interface Clock Enable"] - pub const fn eth1macen(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "Ethernet MAC bus interface Clock Enable"] - pub fn set_eth1macen(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Ethernet Transmission Clock Enable"] - pub const fn eth1txen(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "Ethernet Transmission Clock Enable"] - pub fn set_eth1txen(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "Ethernet Reception Clock Enable"] - pub const fn eth1rxen(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "Ethernet Reception Clock Enable"] - pub fn set_eth1rxen(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "Enable USB_PHY2 clocks"] - pub const fn usb2otghsulpien(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "Enable USB_PHY2 clocks"] - pub fn set_usb2otghsulpien(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "USB1OTG Peripheral Clocks Enable"] - pub const fn usb1otgen(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 25usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "USB1OTG Peripheral Clocks Enable"] - pub fn set_usb1otgen(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "USB_PHY1 Clocks Enable"] - pub const fn usb1ulpien(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 26usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "USB_PHY1 Clocks Enable"] - pub fn set_usb1ulpien(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val.0 as u32) & 0x01) << 26usize); - } - #[doc = "USB2OTG Peripheral Clocks Enable"] - pub const fn usb2otgen(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 27usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "USB2OTG Peripheral Clocks Enable"] - pub fn set_usb2otgen(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "USB_PHY2 Clocks Enable"] - pub const fn usb2ulpien(&self) -> super::vals::Ahb1enrDma1en { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Ahb1enrDma1en(val as u8) - } - #[doc = "USB_PHY2 Clocks Enable"] - pub fn set_usb2ulpien(&mut self, val: super::vals::Ahb1enrDma1en) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - } - impl Default for Ahb1enr { - fn default() -> Ahb1enr { - Ahb1enr(0) - } - } - #[doc = "RCC Clock Source Interrupt Clear Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cicr(pub u32); - impl Cicr { - #[doc = "LSI ready Interrupt Clear"] - pub const fn lsirdyc(&self) -> super::vals::Lsirdyc { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Lsirdyc(val as u8) - } - #[doc = "LSI ready Interrupt Clear"] - pub fn set_lsirdyc(&mut self, val: super::vals::Lsirdyc) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "LSE ready Interrupt Clear"] - pub const fn lserdyc(&self) -> super::vals::Lsirdyc { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Lsirdyc(val as u8) - } - #[doc = "LSE ready Interrupt Clear"] - pub fn set_lserdyc(&mut self, val: super::vals::Lsirdyc) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "HSI ready Interrupt Clear"] - pub const fn hsirdyc(&self) -> super::vals::Lsirdyc { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Lsirdyc(val as u8) - } - #[doc = "HSI ready Interrupt Clear"] - pub fn set_hsirdyc(&mut self, val: super::vals::Lsirdyc) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "HSE ready Interrupt Clear"] - pub const fn hserdyc(&self) -> super::vals::Lsirdyc { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Lsirdyc(val as u8) - } - #[doc = "HSE ready Interrupt Clear"] - pub fn set_hserdyc(&mut self, val: super::vals::Lsirdyc) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "CSI ready Interrupt Clear"] - pub const fn hse_ready_interrupt_clear(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "CSI ready Interrupt Clear"] - pub fn set_hse_ready_interrupt_clear(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "RC48 ready Interrupt Clear"] - pub const fn hsi48rdyc(&self) -> super::vals::Lsirdyc { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lsirdyc(val as u8) - } - #[doc = "RC48 ready Interrupt Clear"] - pub fn set_hsi48rdyc(&mut self, val: super::vals::Lsirdyc) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "PLL1 ready Interrupt Clear"] - pub fn pllrdyc(&self, n: usize) -> super::vals::Lsirdyc { - assert!(n < 3usize); - let offs = 6usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Lsirdyc(val as u8) - } - #[doc = "PLL1 ready Interrupt Clear"] - pub fn set_pllrdyc(&mut self, n: usize, val: super::vals::Lsirdyc) { - assert!(n < 3usize); - let offs = 6usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "LSE clock security system Interrupt Clear"] - pub const fn lsecssc(&self) -> super::vals::Lsirdyc { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Lsirdyc(val as u8) - } - #[doc = "LSE clock security system Interrupt Clear"] - pub fn set_lsecssc(&mut self, val: super::vals::Lsirdyc) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "HSE clock security system Interrupt Clear"] - pub const fn hsecssc(&self) -> super::vals::Lsirdyc { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Lsirdyc(val as u8) - } - #[doc = "HSE clock security system Interrupt Clear"] - pub fn set_hsecssc(&mut self, val: super::vals::Lsirdyc) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - } - impl Default for Cicr { - fn default() -> Cicr { - Cicr(0) - } - } - #[doc = "RCC PLL2 Fractional Divider Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pll2fracr(pub u32); - impl Pll2fracr { - #[doc = "Fractional part of the multiplication factor for PLL VCO"] - pub const fn fracn2(&self) -> u16 { - let val = (self.0 >> 3usize) & 0x1fff; - val as u16 - } - #[doc = "Fractional part of the multiplication factor for PLL VCO"] - pub fn set_fracn2(&mut self, val: u16) { - self.0 = (self.0 & !(0x1fff << 3usize)) | (((val as u32) & 0x1fff) << 3usize); - } - } - impl Default for Pll2fracr { - fn default() -> Pll2fracr { - Pll2fracr(0) - } - } - #[doc = "RCC APB1 Peripheral Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1lrstr(pub u32); - impl Apb1lrstr { - #[doc = "TIM block reset"] - pub const fn tim2rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim2rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM block reset"] - pub const fn tim3rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim3rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "TIM block reset"] - pub const fn tim4rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim4rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "TIM block reset"] - pub const fn tim5rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim5rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "TIM block reset"] - pub const fn tim6rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim6rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "TIM block reset"] - pub const fn tim7rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim7rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "TIM block reset"] - pub const fn tim12rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim12rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "TIM block reset"] - pub const fn tim13rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim13rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "TIM block reset"] - pub const fn tim14rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_tim14rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "TIM block reset"] - pub const fn lptim1rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "TIM block reset"] - pub fn set_lptim1rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SPI2 block reset"] - pub const fn spi2rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "SPI2 block reset"] - pub fn set_spi2rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SPI3 block reset"] - pub const fn spi3rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "SPI3 block reset"] - pub fn set_spi3rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "SPDIFRX block reset"] - pub const fn spdifrxrst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "SPDIFRX block reset"] - pub fn set_spdifrxrst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "USART2 block reset"] - pub const fn usart2rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "USART2 block reset"] - pub fn set_usart2rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "USART3 block reset"] - pub const fn usart3rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "USART3 block reset"] - pub fn set_usart3rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "UART4 block reset"] - pub const fn uart4rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "UART4 block reset"] - pub fn set_uart4rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "UART5 block reset"] - pub const fn uart5rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "UART5 block reset"] - pub fn set_uart5rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "I2C1 block reset"] - pub const fn i2c1rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "I2C1 block reset"] - pub fn set_i2c1rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 block reset"] - pub const fn i2c2rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "I2C2 block reset"] - pub fn set_i2c2rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "I2C3 block reset"] - pub const fn i2c3rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "I2C3 block reset"] - pub fn set_i2c3rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "HDMI-CEC block reset"] - pub const fn cecrst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 27usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "HDMI-CEC block reset"] - pub fn set_cecrst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "DAC1 and 2 Blocks Reset"] - pub const fn dac12rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "DAC1 and 2 Blocks Reset"] - pub fn set_dac12rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "UART7 block reset"] - pub const fn uart7rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "UART7 block reset"] - pub fn set_uart7rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "UART8 block reset"] - pub const fn uart8rst(&self) -> super::vals::Tim2rst { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Tim2rst(val as u8) - } - #[doc = "UART8 block reset"] - pub fn set_uart8rst(&mut self, val: super::vals::Tim2rst) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Apb1lrstr { - fn default() -> Apb1lrstr { - Apb1lrstr(0) - } - } - #[doc = "RCC APB4 Peripheral Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb4rstr(pub u32); - impl Apb4rstr { - #[doc = "SYSCFG block reset"] - pub const fn syscfgrst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "SYSCFG block reset"] - pub fn set_syscfgrst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "LPUART1 block reset"] - pub const fn lpuart1rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "LPUART1 block reset"] - pub fn set_lpuart1rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "SPI6 block reset"] - pub const fn spi6rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "SPI6 block reset"] - pub fn set_spi6rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "I2C4 block reset"] - pub const fn i2c4rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "I2C4 block reset"] - pub fn set_i2c4rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "LPTIM2 block reset"] - pub const fn lptim2rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "LPTIM2 block reset"] - pub fn set_lptim2rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "LPTIM3 block reset"] - pub const fn lptim3rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "LPTIM3 block reset"] - pub fn set_lptim3rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "LPTIM4 block reset"] - pub const fn lptim4rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "LPTIM4 block reset"] - pub fn set_lptim4rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "LPTIM5 block reset"] - pub const fn lptim5rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "LPTIM5 block reset"] - pub fn set_lptim5rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "COMP12 Blocks Reset"] - pub const fn comp12rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "COMP12 Blocks Reset"] - pub fn set_comp12rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "VREF block reset"] - pub const fn vrefrst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "VREF block reset"] - pub fn set_vrefrst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "SAI4 block reset"] - pub const fn sai4rst(&self) -> super::vals::Syscfgrst { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Syscfgrst(val as u8) - } - #[doc = "SAI4 block reset"] - pub fn set_sai4rst(&mut self, val: super::vals::Syscfgrst) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - } - impl Default for Apb4rstr { - fn default() -> Apb4rstr { - Apb4rstr(0) - } - } - #[doc = "RCC PLL1 Dividers Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pll1divr(pub u32); - impl Pll1divr { - #[doc = "Multiplication factor for PLL1 VCO"] - pub const fn divn1(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x01ff; - val as u16 - } - #[doc = "Multiplication factor for PLL1 VCO"] - pub fn set_divn1(&mut self, val: u16) { - self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); - } - #[doc = "PLL1 DIVP division factor"] - pub const fn divp1(&self) -> super::vals::Divp1 { - let val = (self.0 >> 9usize) & 0x7f; - super::vals::Divp1(val as u8) - } - #[doc = "PLL1 DIVP division factor"] - pub fn set_divp1(&mut self, val: super::vals::Divp1) { - self.0 = (self.0 & !(0x7f << 9usize)) | (((val.0 as u32) & 0x7f) << 9usize); - } - #[doc = "PLL1 DIVQ division factor"] - pub const fn divq1(&self) -> u8 { - let val = (self.0 >> 16usize) & 0x7f; - val as u8 - } - #[doc = "PLL1 DIVQ division factor"] - pub fn set_divq1(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 16usize)) | (((val as u32) & 0x7f) << 16usize); - } - #[doc = "PLL1 DIVR division factor"] - pub const fn divr1(&self) -> u8 { - let val = (self.0 >> 24usize) & 0x7f; - val as u8 - } - #[doc = "PLL1 DIVR division factor"] - pub fn set_divr1(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 24usize)) | (((val as u32) & 0x7f) << 24usize); - } - } - impl Default for Pll1divr { - fn default() -> Pll1divr { - Pll1divr(0) - } - } - #[doc = "RCC AHB3 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Ahb3enr(pub u32); - impl C1Ahb3enr { - #[doc = "MDMA Peripheral Clock Enable"] - pub const fn mdmaen(&self) -> super::vals::C1Ahb3enrMdmaen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Ahb3enrMdmaen(val as u8) - } - #[doc = "MDMA Peripheral Clock Enable"] - pub fn set_mdmaen(&mut self, val: super::vals::C1Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2D Peripheral Clock Enable"] - pub const fn dma2den(&self) -> super::vals::C1Ahb3enrMdmaen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Ahb3enrMdmaen(val as u8) - } - #[doc = "DMA2D Peripheral Clock Enable"] - pub fn set_dma2den(&mut self, val: super::vals::C1Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "JPGDEC Peripheral Clock Enable"] - pub const fn jpgdecen(&self) -> super::vals::C1Ahb3enrMdmaen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Ahb3enrMdmaen(val as u8) - } - #[doc = "JPGDEC Peripheral Clock Enable"] - pub fn set_jpgdecen(&mut self, val: super::vals::C1Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FMC Peripheral Clocks Enable"] - pub const fn fmcen(&self) -> super::vals::C1Ahb3enrMdmaen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::C1Ahb3enrMdmaen(val as u8) - } - #[doc = "FMC Peripheral Clocks Enable"] - pub fn set_fmcen(&mut self, val: super::vals::C1Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "QUADSPI and QUADSPI Delay Clock Enable"] - pub const fn qspien(&self) -> super::vals::C1Ahb3enrMdmaen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::C1Ahb3enrMdmaen(val as u8) - } - #[doc = "QUADSPI and QUADSPI Delay Clock Enable"] - pub fn set_qspien(&mut self, val: super::vals::C1Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable"] - pub const fn sdmmc1en(&self) -> super::vals::C1Ahb3enrMdmaen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Ahb3enrMdmaen(val as u8) - } - #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable"] - pub fn set_sdmmc1en(&mut self, val: super::vals::C1Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - } - impl Default for C1Ahb3enr { - fn default() -> C1Ahb3enr { - C1Ahb3enr(0) - } - } - #[doc = "RCC PLL1 Fractional Divider Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pll1fracr(pub u32); - impl Pll1fracr { - #[doc = "Fractional part of the multiplication factor for PLL1 VCO"] - pub const fn fracn1(&self) -> u16 { - let val = (self.0 >> 3usize) & 0x1fff; - val as u16 - } - #[doc = "Fractional part of the multiplication factor for PLL1 VCO"] - pub fn set_fracn1(&mut self, val: u16) { - self.0 = (self.0 & !(0x1fff << 3usize)) | (((val as u32) & 0x1fff) << 3usize); - } - } - impl Default for Pll1fracr { - fn default() -> Pll1fracr { - Pll1fracr(0) - } - } - #[doc = "RCC AHB4 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb4lpenr(pub u32); - impl Ahb4lpenr { - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioalpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioalpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioblpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioblpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioclpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioclpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpiodlpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpiodlpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioelpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioelpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioflpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioflpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioglpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioglpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpiohlpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpiohlpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioilpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioilpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpiojlpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpiojlpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub const fn gpioklpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "GPIO peripheral clock enable during CSleep mode"] - pub fn set_gpioklpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "CRC peripheral clock enable during CSleep mode"] - pub const fn crclpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "CRC peripheral clock enable during CSleep mode"] - pub fn set_crclpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "BDMA Clock Enable During CSleep Mode"] - pub const fn bdmalpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "BDMA Clock Enable During CSleep Mode"] - pub fn set_bdmalpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "ADC3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn adc3lpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "ADC3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_adc3lpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "Backup RAM Clock Enable During CSleep Mode"] - pub const fn bkpramlpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "Backup RAM Clock Enable During CSleep Mode"] - pub fn set_bkpramlpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "SRAM4 Clock Enable During CSleep Mode"] - pub const fn sram4lpen(&self) -> super::vals::Ahb4lpenrGpioalpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Ahb4lpenrGpioalpen(val as u8) - } - #[doc = "SRAM4 Clock Enable During CSleep Mode"] - pub fn set_sram4lpen(&mut self, val: super::vals::Ahb4lpenrGpioalpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - } - impl Default for Ahb4lpenr { - fn default() -> Ahb4lpenr { - Ahb4lpenr(0) - } - } - #[doc = "RCC APB1 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1henr(pub u32); - impl Apb1henr { - #[doc = "Clock Recovery System peripheral clock enable"] - pub const fn crsen(&self) -> super::vals::Apb1henrCrsen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Apb1henrCrsen(val as u8) - } - #[doc = "Clock Recovery System peripheral clock enable"] - pub fn set_crsen(&mut self, val: super::vals::Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "SWPMI Peripheral Clocks Enable"] - pub const fn swpen(&self) -> super::vals::Apb1henrCrsen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Apb1henrCrsen(val as u8) - } - #[doc = "SWPMI Peripheral Clocks Enable"] - pub fn set_swpen(&mut self, val: super::vals::Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "OPAMP peripheral clock enable"] - pub const fn opampen(&self) -> super::vals::Apb1henrCrsen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Apb1henrCrsen(val as u8) - } - #[doc = "OPAMP peripheral clock enable"] - pub fn set_opampen(&mut self, val: super::vals::Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "MDIOS peripheral clock enable"] - pub const fn mdiosen(&self) -> super::vals::Apb1henrCrsen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Apb1henrCrsen(val as u8) - } - #[doc = "MDIOS peripheral clock enable"] - pub fn set_mdiosen(&mut self, val: super::vals::Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FDCAN Peripheral Clocks Enable"] - pub const fn fdcanen(&self) -> super::vals::Apb1henrCrsen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Apb1henrCrsen(val as u8) - } - #[doc = "FDCAN Peripheral Clocks Enable"] - pub fn set_fdcanen(&mut self, val: super::vals::Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - } - impl Default for Apb1henr { - fn default() -> Apb1henr { - Apb1henr(0) - } - } - #[doc = "RCC APB2 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb2lpenr(pub u32); - impl C1Apb2lpenr { - #[doc = "TIM1 peripheral clock enable during CSleep mode"] - pub const fn tim1lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM1 peripheral clock enable during CSleep mode"] - pub fn set_tim1lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM8 peripheral clock enable during CSleep mode"] - pub const fn tim8lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM8 peripheral clock enable during CSleep mode"] - pub fn set_tim8lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "USART1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn usart1lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "USART1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_usart1lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "USART6 Peripheral Clocks Enable During CSleep Mode"] - pub const fn usart6lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "USART6 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_usart6lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "SPI1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi1lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SPI1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi1lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "SPI4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi4lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 13usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SPI4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi4lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "TIM15 peripheral clock enable during CSleep mode"] - pub const fn tim15lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM15 peripheral clock enable during CSleep mode"] - pub fn set_tim15lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "TIM16 peripheral clock enable during CSleep mode"] - pub const fn tim16lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 17usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM16 peripheral clock enable during CSleep mode"] - pub fn set_tim16lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "TIM17 peripheral clock enable during CSleep mode"] - pub const fn tim17lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 18usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "TIM17 peripheral clock enable during CSleep mode"] - pub fn set_tim17lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "SPI5 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi5lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 20usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SPI5 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi5lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "SAI1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn sai1lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 22usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SAI1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_sai1lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "SAI2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn sai2lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 23usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SAI2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_sai2lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "SAI3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn sai3lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "SAI3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_sai3lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "DFSDM1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn dfsdm1lpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "DFSDM1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_dfsdm1lpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "HRTIM peripheral clock enable during CSleep mode"] - pub const fn hrtimlpen(&self) -> super::vals::C1Apb2lpenrTim1lpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::C1Apb2lpenrTim1lpen(val as u8) - } - #[doc = "HRTIM peripheral clock enable during CSleep mode"] - pub fn set_hrtimlpen(&mut self, val: super::vals::C1Apb2lpenrTim1lpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - } - impl Default for C1Apb2lpenr { - fn default() -> C1Apb2lpenr { - C1Apb2lpenr(0) - } - } - #[doc = "RCC AHB3 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb3enr(pub u32); - impl Ahb3enr { - #[doc = "MDMA Peripheral Clock Enable"] - pub const fn mdmaen(&self) -> super::vals::Ahb3enrMdmaen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ahb3enrMdmaen(val as u8) - } - #[doc = "MDMA Peripheral Clock Enable"] - pub fn set_mdmaen(&mut self, val: super::vals::Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2D Peripheral Clock Enable"] - pub const fn dma2den(&self) -> super::vals::Ahb3enrMdmaen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Ahb3enrMdmaen(val as u8) - } - #[doc = "DMA2D Peripheral Clock Enable"] - pub fn set_dma2den(&mut self, val: super::vals::Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "JPGDEC Peripheral Clock Enable"] - pub const fn jpgdecen(&self) -> super::vals::Ahb3enrMdmaen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Ahb3enrMdmaen(val as u8) - } - #[doc = "JPGDEC Peripheral Clock Enable"] - pub fn set_jpgdecen(&mut self, val: super::vals::Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FMC Peripheral Clocks Enable"] - pub const fn fmcen(&self) -> super::vals::Ahb3enrMdmaen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Ahb3enrMdmaen(val as u8) - } - #[doc = "FMC Peripheral Clocks Enable"] - pub fn set_fmcen(&mut self, val: super::vals::Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "QUADSPI and QUADSPI Delay Clock Enable"] - pub const fn qspien(&self) -> super::vals::Ahb3enrMdmaen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Ahb3enrMdmaen(val as u8) - } - #[doc = "QUADSPI and QUADSPI Delay Clock Enable"] - pub fn set_qspien(&mut self, val: super::vals::Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable"] - pub const fn sdmmc1en(&self) -> super::vals::Ahb3enrMdmaen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Ahb3enrMdmaen(val as u8) - } - #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable"] - pub fn set_sdmmc1en(&mut self, val: super::vals::Ahb3enrMdmaen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - } - impl Default for Ahb3enr { - fn default() -> Ahb3enr { - Ahb3enr(0) - } - } - #[doc = "RCC Domain 2 Kernel Clock Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D2ccip2r(pub u32); - impl D2ccip2r { - #[doc = "USART2/3, UART4,5, 7/8 (APB1) kernel clock source selection"] - pub const fn usart234578sel(&self) -> super::vals::Usart234578sel { - let val = (self.0 >> 0usize) & 0x07; - super::vals::Usart234578sel(val as u8) - } - #[doc = "USART2/3, UART4,5, 7/8 (APB1) kernel clock source selection"] - pub fn set_usart234578sel(&mut self, val: super::vals::Usart234578sel) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val.0 as u32) & 0x07) << 0usize); - } - #[doc = "USART1 and 6 kernel clock source selection"] - pub const fn usart16sel(&self) -> super::vals::Usart16sel { - let val = (self.0 >> 3usize) & 0x07; - super::vals::Usart16sel(val as u8) - } - #[doc = "USART1 and 6 kernel clock source selection"] - pub fn set_usart16sel(&mut self, val: super::vals::Usart16sel) { - self.0 = (self.0 & !(0x07 << 3usize)) | (((val.0 as u32) & 0x07) << 3usize); - } - #[doc = "RNG kernel clock source selection"] - pub const fn rngsel(&self) -> super::vals::Rngsel { - let val = (self.0 >> 8usize) & 0x03; - super::vals::Rngsel(val as u8) - } - #[doc = "RNG kernel clock source selection"] - pub fn set_rngsel(&mut self, val: super::vals::Rngsel) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val.0 as u32) & 0x03) << 8usize); - } - #[doc = "I2C1,2,3 kernel clock source selection"] - pub const fn i2c123sel(&self) -> super::vals::I2c123sel { - let val = (self.0 >> 12usize) & 0x03; - super::vals::I2c123sel(val as u8) - } - #[doc = "I2C1,2,3 kernel clock source selection"] - pub fn set_i2c123sel(&mut self, val: super::vals::I2c123sel) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "USBOTG 1 and 2 kernel clock source selection"] - pub const fn usbsel(&self) -> super::vals::Usbsel { - let val = (self.0 >> 20usize) & 0x03; - super::vals::Usbsel(val as u8) - } - #[doc = "USBOTG 1 and 2 kernel clock source selection"] - pub fn set_usbsel(&mut self, val: super::vals::Usbsel) { - self.0 = (self.0 & !(0x03 << 20usize)) | (((val.0 as u32) & 0x03) << 20usize); - } - #[doc = "HDMI-CEC kernel clock source selection"] - pub const fn cecsel(&self) -> super::vals::Cecsel { - let val = (self.0 >> 22usize) & 0x03; - super::vals::Cecsel(val as u8) - } - #[doc = "HDMI-CEC kernel clock source selection"] - pub fn set_cecsel(&mut self, val: super::vals::Cecsel) { - self.0 = (self.0 & !(0x03 << 22usize)) | (((val.0 as u32) & 0x03) << 22usize); - } - #[doc = "LPTIM1 kernel clock source selection"] - pub const fn lptim1sel(&self) -> super::vals::Lptim1sel { - let val = (self.0 >> 28usize) & 0x07; - super::vals::Lptim1sel(val as u8) - } - #[doc = "LPTIM1 kernel clock source selection"] - pub fn set_lptim1sel(&mut self, val: super::vals::Lptim1sel) { - self.0 = (self.0 & !(0x07 << 28usize)) | (((val.0 as u32) & 0x07) << 28usize); - } - } - impl Default for D2ccip2r { - fn default() -> D2ccip2r { - D2ccip2r(0) - } - } - #[doc = "RCC PLL3 Fractional Divider Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pll3fracr(pub u32); - impl Pll3fracr { - #[doc = "Fractional part of the multiplication factor for PLL3 VCO"] - pub const fn fracn3(&self) -> u16 { - let val = (self.0 >> 3usize) & 0x1fff; - val as u16 - } - #[doc = "Fractional part of the multiplication factor for PLL3 VCO"] - pub fn set_fracn3(&mut self, val: u16) { - self.0 = (self.0 & !(0x1fff << 3usize)) | (((val as u32) & 0x1fff) << 3usize); - } - } - impl Default for Pll3fracr { - fn default() -> Pll3fracr { - Pll3fracr(0) - } - } - #[doc = "RCC AHB2 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Ahb2lpenr(pub u32); - impl C1Ahb2lpenr { - #[doc = "DCMI peripheral clock enable during csleep mode"] - pub const fn dcmilpen(&self) -> super::vals::C1Ahb2lpenrDcmilpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "DCMI peripheral clock enable during csleep mode"] - pub fn set_dcmilpen(&mut self, val: super::vals::C1Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "CRYPT peripheral clock enable during CSleep mode"] - pub const fn cryptlpen(&self) -> super::vals::C1Ahb2lpenrDcmilpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "CRYPT peripheral clock enable during CSleep mode"] - pub fn set_cryptlpen(&mut self, val: super::vals::C1Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "HASH peripheral clock enable during CSleep mode"] - pub const fn hashlpen(&self) -> super::vals::C1Ahb2lpenrDcmilpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "HASH peripheral clock enable during CSleep mode"] - pub fn set_hashlpen(&mut self, val: super::vals::C1Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "RNG peripheral clock enable during CSleep mode"] - pub const fn rnglpen(&self) -> super::vals::C1Ahb2lpenrDcmilpen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::C1Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "RNG peripheral clock enable during CSleep mode"] - pub fn set_rnglpen(&mut self, val: super::vals::C1Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode"] - pub const fn sdmmc2lpen(&self) -> super::vals::C1Ahb2lpenrDcmilpen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::C1Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode"] - pub fn set_sdmmc2lpen(&mut self, val: super::vals::C1Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SRAM1 Clock Enable During CSleep Mode"] - pub const fn sram1lpen(&self) -> super::vals::C1Ahb2lpenrDcmilpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::C1Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "SRAM1 Clock Enable During CSleep Mode"] - pub fn set_sram1lpen(&mut self, val: super::vals::C1Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "SRAM2 Clock Enable During CSleep Mode"] - pub const fn sram2lpen(&self) -> super::vals::C1Ahb2lpenrDcmilpen { - let val = (self.0 >> 30usize) & 0x01; - super::vals::C1Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "SRAM2 Clock Enable During CSleep Mode"] - pub fn set_sram2lpen(&mut self, val: super::vals::C1Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "SRAM3 Clock Enable During CSleep Mode"] - pub const fn sram3lpen(&self) -> super::vals::C1Ahb2lpenrDcmilpen { - let val = (self.0 >> 31usize) & 0x01; - super::vals::C1Ahb2lpenrDcmilpen(val as u8) - } - #[doc = "SRAM3 Clock Enable During CSleep Mode"] - pub fn set_sram3lpen(&mut self, val: super::vals::C1Ahb2lpenrDcmilpen) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for C1Ahb2lpenr { - fn default() -> C1Ahb2lpenr { - C1Ahb2lpenr(0) - } - } - #[doc = "RCC Clock Recovery RC Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crrcr(pub u32); - impl Crrcr { - #[doc = "Internal RC 48 MHz clock calibration"] - pub const fn hsi48cal(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x03ff; - val as u16 - } - #[doc = "Internal RC 48 MHz clock calibration"] - pub fn set_hsi48cal(&mut self, val: u16) { - self.0 = (self.0 & !(0x03ff << 0usize)) | (((val as u32) & 0x03ff) << 0usize); - } - } - impl Default for Crrcr { - fn default() -> Crrcr { - Crrcr(0) - } - } - #[doc = "RCC APB1 High Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1hlpenr(pub u32); - impl Apb1hlpenr { - #[doc = "Clock Recovery System peripheral clock enable during CSleep mode"] - pub const fn crslpen(&self) -> super::vals::Apb1hlpenrCrslpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Apb1hlpenrCrslpen(val as u8) - } - #[doc = "Clock Recovery System peripheral clock enable during CSleep mode"] - pub fn set_crslpen(&mut self, val: super::vals::Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "SWPMI Peripheral Clocks Enable During CSleep Mode"] - pub const fn swplpen(&self) -> super::vals::Apb1hlpenrCrslpen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Apb1hlpenrCrslpen(val as u8) - } - #[doc = "SWPMI Peripheral Clocks Enable During CSleep Mode"] - pub fn set_swplpen(&mut self, val: super::vals::Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "OPAMP peripheral clock enable during CSleep mode"] - pub const fn opamplpen(&self) -> super::vals::Apb1hlpenrCrslpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Apb1hlpenrCrslpen(val as u8) - } - #[doc = "OPAMP peripheral clock enable during CSleep mode"] - pub fn set_opamplpen(&mut self, val: super::vals::Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "MDIOS peripheral clock enable during CSleep mode"] - pub const fn mdioslpen(&self) -> super::vals::Apb1hlpenrCrslpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Apb1hlpenrCrslpen(val as u8) - } - #[doc = "MDIOS peripheral clock enable during CSleep mode"] - pub fn set_mdioslpen(&mut self, val: super::vals::Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FDCAN Peripheral Clocks Enable During CSleep Mode"] - pub const fn fdcanlpen(&self) -> super::vals::Apb1hlpenrCrslpen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Apb1hlpenrCrslpen(val as u8) - } - #[doc = "FDCAN Peripheral Clocks Enable During CSleep Mode"] - pub fn set_fdcanlpen(&mut self, val: super::vals::Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - } - impl Default for Apb1hlpenr { - fn default() -> Apb1hlpenr { - Apb1hlpenr(0) - } - } - #[doc = "RCC APB1 High Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb1hlpenr(pub u32); - impl C1Apb1hlpenr { - #[doc = "Clock Recovery System peripheral clock enable during CSleep mode"] - pub const fn crslpen(&self) -> super::vals::C1Apb1hlpenrCrslpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Apb1hlpenrCrslpen(val as u8) - } - #[doc = "Clock Recovery System peripheral clock enable during CSleep mode"] - pub fn set_crslpen(&mut self, val: super::vals::C1Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "SWPMI Peripheral Clocks Enable During CSleep Mode"] - pub const fn swplpen(&self) -> super::vals::C1Apb1hlpenrCrslpen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::C1Apb1hlpenrCrslpen(val as u8) - } - #[doc = "SWPMI Peripheral Clocks Enable During CSleep Mode"] - pub fn set_swplpen(&mut self, val: super::vals::C1Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "OPAMP peripheral clock enable during CSleep mode"] - pub const fn opamplpen(&self) -> super::vals::C1Apb1hlpenrCrslpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Apb1hlpenrCrslpen(val as u8) - } - #[doc = "OPAMP peripheral clock enable during CSleep mode"] - pub fn set_opamplpen(&mut self, val: super::vals::C1Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "MDIOS peripheral clock enable during CSleep mode"] - pub const fn mdioslpen(&self) -> super::vals::C1Apb1hlpenrCrslpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Apb1hlpenrCrslpen(val as u8) - } - #[doc = "MDIOS peripheral clock enable during CSleep mode"] - pub fn set_mdioslpen(&mut self, val: super::vals::C1Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FDCAN Peripheral Clocks Enable During CSleep Mode"] - pub const fn fdcanlpen(&self) -> super::vals::C1Apb1hlpenrCrslpen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::C1Apb1hlpenrCrslpen(val as u8) - } - #[doc = "FDCAN Peripheral Clocks Enable During CSleep Mode"] - pub fn set_fdcanlpen(&mut self, val: super::vals::C1Apb1hlpenrCrslpen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - } - impl Default for C1Apb1hlpenr { - fn default() -> C1Apb1hlpenr { - C1Apb1hlpenr(0) - } - } - #[doc = "RCC Clock Source Interrupt Enable Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cier(pub u32); - impl Cier { - #[doc = "LSI ready Interrupt Enable"] - pub const fn lsirdyie(&self) -> super::vals::Lsirdyie { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Lsirdyie(val as u8) - } - #[doc = "LSI ready Interrupt Enable"] - pub fn set_lsirdyie(&mut self, val: super::vals::Lsirdyie) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "LSE ready Interrupt Enable"] - pub const fn lserdyie(&self) -> super::vals::Lsirdyie { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Lsirdyie(val as u8) - } - #[doc = "LSE ready Interrupt Enable"] - pub fn set_lserdyie(&mut self, val: super::vals::Lsirdyie) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "HSI ready Interrupt Enable"] - pub const fn hsirdyie(&self) -> super::vals::Lsirdyie { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Lsirdyie(val as u8) - } - #[doc = "HSI ready Interrupt Enable"] - pub fn set_hsirdyie(&mut self, val: super::vals::Lsirdyie) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "HSE ready Interrupt Enable"] - pub const fn hserdyie(&self) -> super::vals::Lsirdyie { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Lsirdyie(val as u8) - } - #[doc = "HSE ready Interrupt Enable"] - pub fn set_hserdyie(&mut self, val: super::vals::Lsirdyie) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "CSI ready Interrupt Enable"] - pub const fn csirdyie(&self) -> super::vals::Lsirdyie { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Lsirdyie(val as u8) - } - #[doc = "CSI ready Interrupt Enable"] - pub fn set_csirdyie(&mut self, val: super::vals::Lsirdyie) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "RC48 ready Interrupt Enable"] - pub const fn hsi48rdyie(&self) -> super::vals::Lsirdyie { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lsirdyie(val as u8) - } - #[doc = "RC48 ready Interrupt Enable"] - pub fn set_hsi48rdyie(&mut self, val: super::vals::Lsirdyie) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "PLL1 ready Interrupt Enable"] - pub fn pllrdyie(&self, n: usize) -> super::vals::Lsirdyie { - assert!(n < 3usize); - let offs = 6usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Lsirdyie(val as u8) - } - #[doc = "PLL1 ready Interrupt Enable"] - pub fn set_pllrdyie(&mut self, n: usize, val: super::vals::Lsirdyie) { - assert!(n < 3usize); - let offs = 6usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "LSE clock security system Interrupt Enable"] - pub const fn lsecssie(&self) -> super::vals::Lsirdyie { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Lsirdyie(val as u8) - } - #[doc = "LSE clock security system Interrupt Enable"] - pub fn set_lsecssie(&mut self, val: super::vals::Lsirdyie) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - } - impl Default for Cier { - fn default() -> Cier { - Cier(0) - } - } - #[doc = "RCC Internal Clock Source Calibration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Icscr(pub u32); - impl Icscr { - #[doc = "HSI clock calibration"] - pub const fn hsical(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "HSI clock calibration"] - pub fn set_hsical(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "HSI clock trimming"] - pub const fn hsitrim(&self) -> u8 { - let val = (self.0 >> 12usize) & 0x3f; - val as u8 - } - #[doc = "HSI clock trimming"] - pub fn set_hsitrim(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 12usize)) | (((val as u32) & 0x3f) << 12usize); - } - #[doc = "CSI clock calibration"] - pub const fn csical(&self) -> u8 { - let val = (self.0 >> 18usize) & 0xff; - val as u8 - } - #[doc = "CSI clock calibration"] - pub fn set_csical(&mut self, val: u8) { - self.0 = (self.0 & !(0xff << 18usize)) | (((val as u32) & 0xff) << 18usize); - } - #[doc = "CSI clock trimming"] - pub const fn csitrim(&self) -> u8 { - let val = (self.0 >> 26usize) & 0x1f; - val as u8 - } - #[doc = "CSI clock trimming"] - pub fn set_csitrim(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 26usize)) | (((val as u32) & 0x1f) << 26usize); - } - } - impl Default for Icscr { - fn default() -> Icscr { - Icscr(0) - } - } - #[doc = "RCC APB3 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb3enr(pub u32); - impl C1Apb3enr { - #[doc = "LTDC peripheral clock enable"] - pub const fn ltdcen(&self) -> super::vals::C1Apb3enrLtdcen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::C1Apb3enrLtdcen(val as u8) - } - #[doc = "LTDC peripheral clock enable"] - pub fn set_ltdcen(&mut self, val: super::vals::C1Apb3enrLtdcen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "WWDG1 Clock Enable"] - pub const fn wwdg1en(&self) -> super::vals::C1Apb3enrLtdcen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::C1Apb3enrLtdcen(val as u8) - } - #[doc = "WWDG1 Clock Enable"] - pub fn set_wwdg1en(&mut self, val: super::vals::C1Apb3enrLtdcen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - } - impl Default for C1Apb3enr { - fn default() -> C1Apb3enr { - C1Apb3enr(0) - } - } - #[doc = "RCC APB1 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb1lenr(pub u32); - impl C1Apb1lenr { - #[doc = "TIM peripheral clock enable"] - pub const fn tim2en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim2en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim3en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim3en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim4en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 2usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim4en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim5en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 3usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim5en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim6en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim6en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim7en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim7en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim12en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 6usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim12en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim13en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 7usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim13en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim14en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 8usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim14en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "LPTIM1 Peripheral Clocks Enable"] - pub const fn lptim1en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 9usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "LPTIM1 Peripheral Clocks Enable"] - pub fn set_lptim1en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SPI2 Peripheral Clocks Enable"] - pub const fn spi2en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 14usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "SPI2 Peripheral Clocks Enable"] - pub fn set_spi2en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SPI3 Peripheral Clocks Enable"] - pub const fn spi3en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 15usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "SPI3 Peripheral Clocks Enable"] - pub fn set_spi3en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "SPDIFRX Peripheral Clocks Enable"] - pub const fn spdifrxen(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "SPDIFRX Peripheral Clocks Enable"] - pub fn set_spdifrxen(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "USART2 Peripheral Clocks Enable"] - pub const fn usart2en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 17usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "USART2 Peripheral Clocks Enable"] - pub fn set_usart2en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "USART3 Peripheral Clocks Enable"] - pub const fn usart3en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 18usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "USART3 Peripheral Clocks Enable"] - pub fn set_usart3en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "UART4 Peripheral Clocks Enable"] - pub const fn uart4en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 19usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "UART4 Peripheral Clocks Enable"] - pub fn set_uart4en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "UART5 Peripheral Clocks Enable"] - pub const fn uart5en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 20usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "UART5 Peripheral Clocks Enable"] - pub fn set_uart5en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "I2C1 Peripheral Clocks Enable"] - pub const fn i2c1en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 21usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "I2C1 Peripheral Clocks Enable"] - pub fn set_i2c1en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 Peripheral Clocks Enable"] - pub const fn i2c2en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 22usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "I2C2 Peripheral Clocks Enable"] - pub fn set_i2c2en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "I2C3 Peripheral Clocks Enable"] - pub const fn i2c3en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 23usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "I2C3 Peripheral Clocks Enable"] - pub fn set_i2c3en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "HDMI-CEC peripheral clock enable"] - pub const fn cecen(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 27usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "HDMI-CEC peripheral clock enable"] - pub fn set_cecen(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "DAC1&2 peripheral clock enable"] - pub const fn dac12en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 29usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "DAC1&2 peripheral clock enable"] - pub fn set_dac12en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "UART7 Peripheral Clocks Enable"] - pub const fn uart7en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 30usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "UART7 Peripheral Clocks Enable"] - pub fn set_uart7en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "UART8 Peripheral Clocks Enable"] - pub const fn uart8en(&self) -> super::vals::C1Apb1lenrTim2en { - let val = (self.0 >> 31usize) & 0x01; - super::vals::C1Apb1lenrTim2en(val as u8) - } - #[doc = "UART8 Peripheral Clocks Enable"] - pub fn set_uart8en(&mut self, val: super::vals::C1Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for C1Apb1lenr { - fn default() -> C1Apb1lenr { - C1Apb1lenr(0) - } - } - #[doc = "RCC AHB1 Peripheral Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb1rstr(pub u32); - impl Ahb1rstr { - #[doc = "DMA1 block reset"] - pub const fn dma1rst(&self) -> super::vals::Dma1rst { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Dma1rst(val as u8) - } - #[doc = "DMA1 block reset"] - pub fn set_dma1rst(&mut self, val: super::vals::Dma1rst) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2 block reset"] - pub const fn dma2rst(&self) -> super::vals::Dma1rst { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Dma1rst(val as u8) - } - #[doc = "DMA2 block reset"] - pub fn set_dma2rst(&mut self, val: super::vals::Dma1rst) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "ADC1&2 block reset"] - pub const fn adc12rst(&self) -> super::vals::Dma1rst { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Dma1rst(val as u8) - } - #[doc = "ADC1&2 block reset"] - pub fn set_adc12rst(&mut self, val: super::vals::Dma1rst) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "ETH1MAC block reset"] - pub const fn eth1macrst(&self) -> super::vals::Dma1rst { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Dma1rst(val as u8) - } - #[doc = "ETH1MAC block reset"] - pub fn set_eth1macrst(&mut self, val: super::vals::Dma1rst) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "USB1OTG block reset"] - pub const fn usb1otgrst(&self) -> super::vals::Dma1rst { - let val = (self.0 >> 25usize) & 0x01; - super::vals::Dma1rst(val as u8) - } - #[doc = "USB1OTG block reset"] - pub fn set_usb1otgrst(&mut self, val: super::vals::Dma1rst) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "USB2OTG block reset"] - pub const fn usb2otgrst(&self) -> super::vals::Dma1rst { - let val = (self.0 >> 27usize) & 0x01; - super::vals::Dma1rst(val as u8) - } - #[doc = "USB2OTG block reset"] - pub fn set_usb2otgrst(&mut self, val: super::vals::Dma1rst) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - } - impl Default for Ahb1rstr { - fn default() -> Ahb1rstr { - Ahb1rstr(0) - } - } - #[doc = "clock control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Internal high-speed clock enable"] - pub const fn hsion(&self) -> super::vals::Hsion { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "Internal high-speed clock enable"] - pub fn set_hsion(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "High Speed Internal clock enable in Stop mode"] - pub const fn hsikeron(&self) -> super::vals::Hsion { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "High Speed Internal clock enable in Stop mode"] - pub fn set_hsikeron(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "HSI clock ready flag"] - pub const fn hsirdy(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "HSI clock ready flag"] - pub fn set_hsirdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "HSI clock divider"] - pub const fn hsidiv(&self) -> super::vals::Hsidiv { - let val = (self.0 >> 3usize) & 0x03; - super::vals::Hsidiv(val as u8) - } - #[doc = "HSI clock divider"] - pub fn set_hsidiv(&mut self, val: super::vals::Hsidiv) { - self.0 = (self.0 & !(0x03 << 3usize)) | (((val.0 as u32) & 0x03) << 3usize); - } - #[doc = "HSI divider flag"] - pub const fn hsidivf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "HSI divider flag"] - pub fn set_hsidivf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "CSI clock enable"] - pub const fn csion(&self) -> super::vals::Hsion { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "CSI clock enable"] - pub fn set_csion(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "CSI clock ready flag"] - pub const fn csirdy(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "CSI clock ready flag"] - pub fn set_csirdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "CSI clock enable in Stop mode"] - pub const fn csikeron(&self) -> super::vals::Hsion { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "CSI clock enable in Stop mode"] - pub fn set_csikeron(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "RC48 clock enable"] - pub const fn hsi48on(&self) -> super::vals::Hsion { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "RC48 clock enable"] - pub fn set_hsi48on(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "RC48 clock ready flag"] - pub const fn hsi48rdy(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "RC48 clock ready flag"] - pub fn set_hsi48rdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "D1 domain clocks ready flag"] - pub const fn d1ckrdy(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "D1 domain clocks ready flag"] - pub fn set_d1ckrdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "D2 domain clocks ready flag"] - pub const fn d2ckrdy(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "D2 domain clocks ready flag"] - pub fn set_d2ckrdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "HSE clock enable"] - pub const fn hseon(&self) -> super::vals::Hsion { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "HSE clock enable"] - pub fn set_hseon(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "HSE clock ready flag"] - pub const fn hserdy(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "HSE clock ready flag"] - pub fn set_hserdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "HSE clock bypass"] - pub const fn hsebyp(&self) -> super::vals::Hsebyp { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Hsebyp(val as u8) - } - #[doc = "HSE clock bypass"] - pub fn set_hsebyp(&mut self, val: super::vals::Hsebyp) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "HSE Clock Security System enable"] - pub const fn hsecsson(&self) -> super::vals::Hsion { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "HSE Clock Security System enable"] - pub fn set_hsecsson(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "PLL1 enable"] - pub const fn pll1on(&self) -> super::vals::Hsion { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "PLL1 enable"] - pub fn set_pll1on(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "PLL1 clock ready flag"] - pub const fn pll1rdy(&self) -> bool { - let val = (self.0 >> 25usize) & 0x01; - val != 0 - } - #[doc = "PLL1 clock ready flag"] - pub fn set_pll1rdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); - } - #[doc = "PLL2 enable"] - pub const fn pll2on(&self) -> super::vals::Hsion { - let val = (self.0 >> 26usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "PLL2 enable"] - pub fn set_pll2on(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val.0 as u32) & 0x01) << 26usize); - } - #[doc = "PLL2 clock ready flag"] - pub const fn pll2rdy(&self) -> bool { - let val = (self.0 >> 27usize) & 0x01; - val != 0 - } - #[doc = "PLL2 clock ready flag"] - pub fn set_pll2rdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); - } - #[doc = "PLL3 enable"] - pub const fn pll3on(&self) -> super::vals::Hsion { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Hsion(val as u8) - } - #[doc = "PLL3 enable"] - pub fn set_pll3on(&mut self, val: super::vals::Hsion) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "PLL3 clock ready flag"] - pub const fn pll3rdy(&self) -> bool { - let val = (self.0 >> 29usize) & 0x01; - val != 0 - } - #[doc = "PLL3 clock ready flag"] - pub fn set_pll3rdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - #[doc = "RCC PLL3 Dividers Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pll3divr(pub u32); - impl Pll3divr { - #[doc = "Multiplication factor for PLL1 VCO"] - pub const fn divn3(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x01ff; - val as u16 - } - #[doc = "Multiplication factor for PLL1 VCO"] - pub fn set_divn3(&mut self, val: u16) { - self.0 = (self.0 & !(0x01ff << 0usize)) | (((val as u32) & 0x01ff) << 0usize); - } - #[doc = "PLL DIVP division factor"] - pub const fn divp3(&self) -> u8 { - let val = (self.0 >> 9usize) & 0x7f; - val as u8 - } - #[doc = "PLL DIVP division factor"] - pub fn set_divp3(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 9usize)) | (((val as u32) & 0x7f) << 9usize); - } - #[doc = "PLL DIVQ division factor"] - pub const fn divq3(&self) -> u8 { - let val = (self.0 >> 16usize) & 0x7f; - val as u8 - } - #[doc = "PLL DIVQ division factor"] - pub fn set_divq3(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 16usize)) | (((val as u32) & 0x7f) << 16usize); - } - #[doc = "PLL DIVR division factor"] - pub const fn divr3(&self) -> u8 { - let val = (self.0 >> 24usize) & 0x7f; - val as u8 - } - #[doc = "PLL DIVR division factor"] - pub fn set_divr3(&mut self, val: u8) { - self.0 = (self.0 & !(0x7f << 24usize)) | (((val as u32) & 0x7f) << 24usize); - } - } - impl Default for Pll3divr { - fn default() -> Pll3divr { - Pll3divr(0) - } - } - #[doc = "RCC APB3 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb3lpenr(pub u32); - impl Apb3lpenr { - #[doc = "LTDC peripheral clock enable during CSleep mode"] - pub const fn ltdclpen(&self) -> super::vals::Apb3lpenrLtdclpen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Apb3lpenrLtdclpen(val as u8) - } - #[doc = "LTDC peripheral clock enable during CSleep mode"] - pub fn set_ltdclpen(&mut self, val: super::vals::Apb3lpenrLtdclpen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "WWDG1 Clock Enable During CSleep Mode"] - pub const fn wwdg1lpen(&self) -> super::vals::Apb3lpenrLtdclpen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Apb3lpenrLtdclpen(val as u8) - } - #[doc = "WWDG1 Clock Enable During CSleep Mode"] - pub fn set_wwdg1lpen(&mut self, val: super::vals::Apb3lpenrLtdclpen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - } - impl Default for Apb3lpenr { - fn default() -> Apb3lpenr { - Apb3lpenr(0) - } - } - #[doc = "RCC Domain 3 Kernel Clock Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D3ccipr(pub u32); - impl D3ccipr { - #[doc = "LPUART1 kernel clock source selection"] - pub const fn lpuart1sel(&self) -> super::vals::Lpuart1sel { - let val = (self.0 >> 0usize) & 0x07; - super::vals::Lpuart1sel(val as u8) - } - #[doc = "LPUART1 kernel clock source selection"] - pub fn set_lpuart1sel(&mut self, val: super::vals::Lpuart1sel) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val.0 as u32) & 0x07) << 0usize); - } - #[doc = "I2C4 kernel clock source selection"] - pub const fn i2c4sel(&self) -> super::vals::I2c4sel { - let val = (self.0 >> 8usize) & 0x03; - super::vals::I2c4sel(val as u8) - } - #[doc = "I2C4 kernel clock source selection"] - pub fn set_i2c4sel(&mut self, val: super::vals::I2c4sel) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val.0 as u32) & 0x03) << 8usize); - } - #[doc = "LPTIM2 kernel clock source selection"] - pub const fn lptim2sel(&self) -> super::vals::Lptim2sel { - let val = (self.0 >> 10usize) & 0x07; - super::vals::Lptim2sel(val as u8) - } - #[doc = "LPTIM2 kernel clock source selection"] - pub fn set_lptim2sel(&mut self, val: super::vals::Lptim2sel) { - self.0 = (self.0 & !(0x07 << 10usize)) | (((val.0 as u32) & 0x07) << 10usize); - } - #[doc = "LPTIM3,4,5 kernel clock source selection"] - pub const fn lptim345sel(&self) -> super::vals::Lptim2sel { - let val = (self.0 >> 13usize) & 0x07; - super::vals::Lptim2sel(val as u8) - } - #[doc = "LPTIM3,4,5 kernel clock source selection"] - pub fn set_lptim345sel(&mut self, val: super::vals::Lptim2sel) { - self.0 = (self.0 & !(0x07 << 13usize)) | (((val.0 as u32) & 0x07) << 13usize); - } - #[doc = "SAR ADC kernel clock source selection"] - pub const fn adcsel(&self) -> super::vals::Adcsel { - let val = (self.0 >> 16usize) & 0x03; - super::vals::Adcsel(val as u8) - } - #[doc = "SAR ADC kernel clock source selection"] - pub fn set_adcsel(&mut self, val: super::vals::Adcsel) { - self.0 = (self.0 & !(0x03 << 16usize)) | (((val.0 as u32) & 0x03) << 16usize); - } - #[doc = "Sub-Block A of SAI4 kernel clock source selection"] - pub const fn sai4asel(&self) -> super::vals::Sai4asel { - let val = (self.0 >> 21usize) & 0x07; - super::vals::Sai4asel(val as u8) - } - #[doc = "Sub-Block A of SAI4 kernel clock source selection"] - pub fn set_sai4asel(&mut self, val: super::vals::Sai4asel) { - self.0 = (self.0 & !(0x07 << 21usize)) | (((val.0 as u32) & 0x07) << 21usize); - } - #[doc = "Sub-Block B of SAI4 kernel clock source selection"] - pub const fn sai4bsel(&self) -> super::vals::Sai4asel { - let val = (self.0 >> 24usize) & 0x07; - super::vals::Sai4asel(val as u8) - } - #[doc = "Sub-Block B of SAI4 kernel clock source selection"] - pub fn set_sai4bsel(&mut self, val: super::vals::Sai4asel) { - self.0 = (self.0 & !(0x07 << 24usize)) | (((val.0 as u32) & 0x07) << 24usize); - } - #[doc = "SPI6 kernel clock source selection"] - pub const fn spi6sel(&self) -> super::vals::Spi6sel { - let val = (self.0 >> 28usize) & 0x07; - super::vals::Spi6sel(val as u8) - } - #[doc = "SPI6 kernel clock source selection"] - pub fn set_spi6sel(&mut self, val: super::vals::Spi6sel) { - self.0 = (self.0 & !(0x07 << 28usize)) | (((val.0 as u32) & 0x07) << 28usize); - } - } - impl Default for D3ccipr { - fn default() -> D3ccipr { - D3ccipr(0) - } - } - #[doc = "RCC Domain 2 Kernel Clock Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D2ccip1r(pub u32); - impl D2ccip1r { - #[doc = "SAI1 and DFSDM1 kernel Aclk clock source selection"] - pub const fn sai1sel(&self) -> super::vals::Sai1sel { - let val = (self.0 >> 0usize) & 0x07; - super::vals::Sai1sel(val as u8) - } - #[doc = "SAI1 and DFSDM1 kernel Aclk clock source selection"] - pub fn set_sai1sel(&mut self, val: super::vals::Sai1sel) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val.0 as u32) & 0x07) << 0usize); - } - #[doc = "SAI2 and SAI3 kernel clock source selection"] - pub const fn sai23sel(&self) -> super::vals::Sai1sel { - let val = (self.0 >> 6usize) & 0x07; - super::vals::Sai1sel(val as u8) - } - #[doc = "SAI2 and SAI3 kernel clock source selection"] - pub fn set_sai23sel(&mut self, val: super::vals::Sai1sel) { - self.0 = (self.0 & !(0x07 << 6usize)) | (((val.0 as u32) & 0x07) << 6usize); - } - #[doc = "SPI/I2S1,2 and 3 kernel clock source selection"] - pub const fn spi123sel(&self) -> super::vals::Sai1sel { - let val = (self.0 >> 12usize) & 0x07; - super::vals::Sai1sel(val as u8) - } - #[doc = "SPI/I2S1,2 and 3 kernel clock source selection"] - pub fn set_spi123sel(&mut self, val: super::vals::Sai1sel) { - self.0 = (self.0 & !(0x07 << 12usize)) | (((val.0 as u32) & 0x07) << 12usize); - } - #[doc = "SPI4 and 5 kernel clock source selection"] - pub const fn spi45sel(&self) -> super::vals::Spi45sel { - let val = (self.0 >> 16usize) & 0x07; - super::vals::Spi45sel(val as u8) - } - #[doc = "SPI4 and 5 kernel clock source selection"] - pub fn set_spi45sel(&mut self, val: super::vals::Spi45sel) { - self.0 = (self.0 & !(0x07 << 16usize)) | (((val.0 as u32) & 0x07) << 16usize); - } - #[doc = "SPDIFRX kernel clock source selection"] - pub const fn spdifsel(&self) -> super::vals::Spdifsel { - let val = (self.0 >> 20usize) & 0x03; - super::vals::Spdifsel(val as u8) - } - #[doc = "SPDIFRX kernel clock source selection"] - pub fn set_spdifsel(&mut self, val: super::vals::Spdifsel) { - self.0 = (self.0 & !(0x03 << 20usize)) | (((val.0 as u32) & 0x03) << 20usize); - } - #[doc = "DFSDM1 kernel Clk clock source selection"] - pub const fn dfsdm1sel(&self) -> super::vals::Dfsdm1sel { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Dfsdm1sel(val as u8) - } - #[doc = "DFSDM1 kernel Clk clock source selection"] - pub fn set_dfsdm1sel(&mut self, val: super::vals::Dfsdm1sel) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "FDCAN kernel clock source selection"] - pub const fn fdcansel(&self) -> super::vals::Fdcansel { - let val = (self.0 >> 28usize) & 0x03; - super::vals::Fdcansel(val as u8) - } - #[doc = "FDCAN kernel clock source selection"] - pub fn set_fdcansel(&mut self, val: super::vals::Fdcansel) { - self.0 = (self.0 & !(0x03 << 28usize)) | (((val.0 as u32) & 0x03) << 28usize); - } - #[doc = "SWPMI kernel clock source selection"] - pub const fn swpsel(&self) -> super::vals::Swpsel { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Swpsel(val as u8) - } - #[doc = "SWPMI kernel clock source selection"] - pub fn set_swpsel(&mut self, val: super::vals::Swpsel) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for D2ccip1r { - fn default() -> D2ccip1r { - D2ccip1r(0) - } - } - #[doc = "RCC APB4 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb4lpenr(pub u32); - impl Apb4lpenr { - #[doc = "SYSCFG peripheral clock enable during CSleep mode"] - pub const fn syscfglpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "SYSCFG peripheral clock enable during CSleep mode"] - pub fn set_syscfglpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "LPUART1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lpuart1lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPUART1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lpuart1lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "SPI6 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi6lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "SPI6 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi6lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "I2C4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn i2c4lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "I2C4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_i2c4lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "LPTIM2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim2lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPTIM2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim2lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "LPTIM3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim3lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPTIM3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim3lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "LPTIM4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim4lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPTIM4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim4lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "LPTIM5 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim5lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPTIM5 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim5lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "COMP1/2 peripheral clock enable during CSleep mode"] - pub const fn comp12lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "COMP1/2 peripheral clock enable during CSleep mode"] - pub fn set_comp12lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "VREF peripheral clock enable during CSleep mode"] - pub const fn vreflpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "VREF peripheral clock enable during CSleep mode"] - pub fn set_vreflpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "RTC APB Clock Enable During CSleep Mode"] - pub const fn rtcapblpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "RTC APB Clock Enable During CSleep Mode"] - pub fn set_rtcapblpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "SAI4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn sai4lpen(&self) -> super::vals::Apb4lpenrSyscfglpen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "SAI4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_sai4lpen(&mut self, val: super::vals::Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - } - impl Default for Apb4lpenr { - fn default() -> Apb4lpenr { - Apb4lpenr(0) - } - } - #[doc = "RCC AHB3 Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb3rstr(pub u32); - impl Ahb3rstr { - #[doc = "MDMA block reset"] - pub const fn mdmarst(&self) -> super::vals::Mdmarst { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Mdmarst(val as u8) - } - #[doc = "MDMA block reset"] - pub fn set_mdmarst(&mut self, val: super::vals::Mdmarst) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2D block reset"] - pub const fn dma2drst(&self) -> super::vals::Mdmarst { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Mdmarst(val as u8) - } - #[doc = "DMA2D block reset"] - pub fn set_dma2drst(&mut self, val: super::vals::Mdmarst) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "JPGDEC block reset"] - pub const fn jpgdecrst(&self) -> super::vals::Mdmarst { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Mdmarst(val as u8) - } - #[doc = "JPGDEC block reset"] - pub fn set_jpgdecrst(&mut self, val: super::vals::Mdmarst) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FMC block reset"] - pub const fn fmcrst(&self) -> super::vals::Mdmarst { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Mdmarst(val as u8) - } - #[doc = "FMC block reset"] - pub fn set_fmcrst(&mut self, val: super::vals::Mdmarst) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "QUADSPI and QUADSPI delay block reset"] - pub const fn qspirst(&self) -> super::vals::Mdmarst { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Mdmarst(val as u8) - } - #[doc = "QUADSPI and QUADSPI delay block reset"] - pub fn set_qspirst(&mut self, val: super::vals::Mdmarst) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SDMMC1 and SDMMC1 delay block reset"] - pub const fn sdmmc1rst(&self) -> super::vals::Mdmarst { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Mdmarst(val as u8) - } - #[doc = "SDMMC1 and SDMMC1 delay block reset"] - pub fn set_sdmmc1rst(&mut self, val: super::vals::Mdmarst) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "CPU reset"] - pub const fn cpurst(&self) -> super::vals::Mdmarst { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Mdmarst(val as u8) - } - #[doc = "CPU reset"] - pub fn set_cpurst(&mut self, val: super::vals::Mdmarst) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Ahb3rstr { - fn default() -> Ahb3rstr { - Ahb3rstr(0) - } - } - #[doc = "RCC Domain 1 Clock Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D1cfgr(pub u32); - impl D1cfgr { - #[doc = "D1 domain AHB prescaler"] - pub const fn hpre(&self) -> super::vals::Hpre { - let val = (self.0 >> 0usize) & 0x0f; - super::vals::Hpre(val as u8) - } - #[doc = "D1 domain AHB prescaler"] - pub fn set_hpre(&mut self, val: super::vals::Hpre) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val.0 as u32) & 0x0f) << 0usize); - } - #[doc = "D1 domain APB3 prescaler"] - pub const fn d1ppre(&self) -> super::vals::D1ppre { - let val = (self.0 >> 4usize) & 0x07; - super::vals::D1ppre(val as u8) - } - #[doc = "D1 domain APB3 prescaler"] - pub fn set_d1ppre(&mut self, val: super::vals::D1ppre) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - #[doc = "D1 domain Core prescaler"] - pub const fn d1cpre(&self) -> super::vals::Hpre { - let val = (self.0 >> 8usize) & 0x0f; - super::vals::Hpre(val as u8) - } - #[doc = "D1 domain Core prescaler"] - pub fn set_d1cpre(&mut self, val: super::vals::Hpre) { - self.0 = (self.0 & !(0x0f << 8usize)) | (((val.0 as u32) & 0x0f) << 8usize); - } - } - impl Default for D1cfgr { - fn default() -> D1cfgr { - D1cfgr(0) - } - } - #[doc = "RCC AHB4 Peripheral Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb4rstr(pub u32); - impl Ahb4rstr { - #[doc = "GPIO block reset"] - pub const fn gpioarst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpioarst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "GPIO block reset"] - pub const fn gpiobrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpiobrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "GPIO block reset"] - pub const fn gpiocrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpiocrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "GPIO block reset"] - pub const fn gpiodrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpiodrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "GPIO block reset"] - pub const fn gpioerst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpioerst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "GPIO block reset"] - pub const fn gpiofrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpiofrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "GPIO block reset"] - pub const fn gpiogrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpiogrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "GPIO block reset"] - pub const fn gpiohrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpiohrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "GPIO block reset"] - pub const fn gpioirst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpioirst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "GPIO block reset"] - pub const fn gpiojrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpiojrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "GPIO block reset"] - pub const fn gpiokrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "GPIO block reset"] - pub fn set_gpiokrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "CRC block reset"] - pub const fn crcrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "CRC block reset"] - pub fn set_crcrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "BDMA block reset"] - pub const fn bdmarst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "BDMA block reset"] - pub fn set_bdmarst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "ADC3 block reset"] - pub const fn adc3rst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "ADC3 block reset"] - pub fn set_adc3rst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "HSEM block reset"] - pub const fn hsemrst(&self) -> super::vals::Gpioarst { - let val = (self.0 >> 25usize) & 0x01; - super::vals::Gpioarst(val as u8) - } - #[doc = "HSEM block reset"] - pub fn set_hsemrst(&mut self, val: super::vals::Gpioarst) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - } - impl Default for Ahb4rstr { - fn default() -> Ahb4rstr { - Ahb4rstr(0) - } - } - #[doc = "RCC APB1 Low Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb1llpenr(pub u32); - impl C1Apb1llpenr { - #[doc = "TIM2 peripheral clock enable during CSleep mode"] - pub const fn tim2lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM2 peripheral clock enable during CSleep mode"] - pub fn set_tim2lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM3 peripheral clock enable during CSleep mode"] - pub const fn tim3lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM3 peripheral clock enable during CSleep mode"] - pub fn set_tim3lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "TIM4 peripheral clock enable during CSleep mode"] - pub const fn tim4lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM4 peripheral clock enable during CSleep mode"] - pub fn set_tim4lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "TIM5 peripheral clock enable during CSleep mode"] - pub const fn tim5lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM5 peripheral clock enable during CSleep mode"] - pub fn set_tim5lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "TIM6 peripheral clock enable during CSleep mode"] - pub const fn tim6lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM6 peripheral clock enable during CSleep mode"] - pub fn set_tim6lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "TIM7 peripheral clock enable during CSleep mode"] - pub const fn tim7lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM7 peripheral clock enable during CSleep mode"] - pub fn set_tim7lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "TIM12 peripheral clock enable during CSleep mode"] - pub const fn tim12lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM12 peripheral clock enable during CSleep mode"] - pub fn set_tim12lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "TIM13 peripheral clock enable during CSleep mode"] - pub const fn tim13lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM13 peripheral clock enable during CSleep mode"] - pub fn set_tim13lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "TIM14 peripheral clock enable during CSleep mode"] - pub const fn tim14lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "TIM14 peripheral clock enable during CSleep mode"] - pub fn set_tim14lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "LPTIM1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim1lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "LPTIM1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim1lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SPI2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi2lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "SPI2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi2lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SPI3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi3lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "SPI3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi3lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "SPDIFRX Peripheral Clocks Enable During CSleep Mode"] - pub const fn spdifrxlpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "SPDIFRX Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spdifrxlpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "USART2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn usart2lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 17usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "USART2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_usart2lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "USART3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn usart3lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 18usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "USART3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_usart3lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "UART4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn uart4lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "UART4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_uart4lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "UART5 Peripheral Clocks Enable During CSleep Mode"] - pub const fn uart5lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 20usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "UART5 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_uart5lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "I2C1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn i2c1lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "I2C1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_i2c1lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn i2c2lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 22usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "I2C2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_i2c2lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "I2C3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn i2c3lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 23usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "I2C3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_i2c3lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "HDMI-CEC Peripheral Clocks Enable During CSleep Mode"] - pub const fn ceclpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 27usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "HDMI-CEC Peripheral Clocks Enable During CSleep Mode"] - pub fn set_ceclpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "DAC1/2 peripheral clock enable during CSleep mode"] - pub const fn dac12lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "DAC1/2 peripheral clock enable during CSleep mode"] - pub fn set_dac12lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "UART7 Peripheral Clocks Enable During CSleep Mode"] - pub const fn uart7lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 30usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "UART7 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_uart7lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "UART8 Peripheral Clocks Enable During CSleep Mode"] - pub const fn uart8lpen(&self) -> super::vals::C1Apb1llpenrTim2lpen { - let val = (self.0 >> 31usize) & 0x01; - super::vals::C1Apb1llpenrTim2lpen(val as u8) - } - #[doc = "UART8 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_uart8lpen(&mut self, val: super::vals::C1Apb1llpenrTim2lpen) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for C1Apb1llpenr { - fn default() -> C1Apb1llpenr { - C1Apb1llpenr(0) - } - } - #[doc = "RCC Backup Domain Control Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Bdcr(pub u32); - impl Bdcr { - #[doc = "LSE oscillator enabled"] - pub const fn lseon(&self) -> super::vals::Lseon { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Lseon(val as u8) - } - #[doc = "LSE oscillator enabled"] - pub fn set_lseon(&mut self, val: super::vals::Lseon) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "LSE oscillator ready"] - pub const fn lserdy(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "LSE oscillator ready"] - pub fn set_lserdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "LSE oscillator bypass"] - pub const fn lsebyp(&self) -> super::vals::Lsebyp { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Lsebyp(val as u8) - } - #[doc = "LSE oscillator bypass"] - pub fn set_lsebyp(&mut self, val: super::vals::Lsebyp) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "LSE oscillator driving capability"] - pub const fn lsedrv(&self) -> super::vals::Lsedrv { - let val = (self.0 >> 3usize) & 0x03; - super::vals::Lsedrv(val as u8) - } - #[doc = "LSE oscillator driving capability"] - pub fn set_lsedrv(&mut self, val: super::vals::Lsedrv) { - self.0 = (self.0 & !(0x03 << 3usize)) | (((val.0 as u32) & 0x03) << 3usize); - } - #[doc = "LSE clock security system enable"] - pub const fn lsecsson(&self) -> super::vals::Lsecsson { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Lsecsson(val as u8) - } - #[doc = "LSE clock security system enable"] - pub fn set_lsecsson(&mut self, val: super::vals::Lsecsson) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "LSE clock security system failure detection"] - pub const fn lsecssd(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "LSE clock security system failure detection"] - pub fn set_lsecssd(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "RTC clock source selection"] - pub const fn rtcsel(&self) -> super::vals::Rtcsel { - let val = (self.0 >> 8usize) & 0x03; - super::vals::Rtcsel(val as u8) - } - #[doc = "RTC clock source selection"] - pub fn set_rtcsel(&mut self, val: super::vals::Rtcsel) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val.0 as u32) & 0x03) << 8usize); - } - #[doc = "RTC clock enable"] - pub const fn rtcen(&self) -> super::vals::Rtcen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Rtcen(val as u8) - } - #[doc = "RTC clock enable"] - pub fn set_rtcen(&mut self, val: super::vals::Rtcen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "VSwitch domain software reset"] - pub const fn bdrst(&self) -> super::vals::Bdrst { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Bdrst(val as u8) - } - #[doc = "VSwitch domain software reset"] - pub fn set_bdrst(&mut self, val: super::vals::Bdrst) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - } - impl Default for Bdcr { - fn default() -> Bdcr { - Bdcr(0) - } - } - #[doc = "RCC Clock Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr(pub u32); - impl Cfgr { - #[doc = "System clock switch"] - pub const fn sw(&self) -> super::vals::Sw { - let val = (self.0 >> 0usize) & 0x07; - super::vals::Sw(val as u8) - } - #[doc = "System clock switch"] - pub fn set_sw(&mut self, val: super::vals::Sw) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val.0 as u32) & 0x07) << 0usize); - } - #[doc = "System clock switch status"] - pub const fn sws(&self) -> u8 { - let val = (self.0 >> 3usize) & 0x07; - val as u8 - } - #[doc = "System clock switch status"] - pub fn set_sws(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 3usize)) | (((val as u32) & 0x07) << 3usize); - } - #[doc = "System clock selection after a wake up from system Stop"] - pub const fn stopwuck(&self) -> super::vals::Stopwuck { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Stopwuck(val as u8) - } - #[doc = "System clock selection after a wake up from system Stop"] - pub fn set_stopwuck(&mut self, val: super::vals::Stopwuck) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "Kernel clock selection after a wake up from system Stop"] - pub const fn stopkerwuck(&self) -> super::vals::Stopwuck { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Stopwuck(val as u8) - } - #[doc = "Kernel clock selection after a wake up from system Stop"] - pub fn set_stopkerwuck(&mut self, val: super::vals::Stopwuck) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "HSE division factor for RTC clock"] - pub const fn rtcpre(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x3f; - val as u8 - } - #[doc = "HSE division factor for RTC clock"] - pub fn set_rtcpre(&mut self, val: u8) { - self.0 = (self.0 & !(0x3f << 8usize)) | (((val as u32) & 0x3f) << 8usize); - } - #[doc = "High Resolution Timer clock prescaler selection"] - pub const fn hrtimsel(&self) -> super::vals::Hrtimsel { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Hrtimsel(val as u8) - } - #[doc = "High Resolution Timer clock prescaler selection"] - pub fn set_hrtimsel(&mut self, val: super::vals::Hrtimsel) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "Timers clocks prescaler selection"] - pub const fn timpre(&self) -> super::vals::Timpre { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Timpre(val as u8) - } - #[doc = "Timers clocks prescaler selection"] - pub fn set_timpre(&mut self, val: super::vals::Timpre) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "MCO1 prescaler"] - pub const fn mco1pre(&self) -> u8 { - let val = (self.0 >> 18usize) & 0x0f; - val as u8 - } - #[doc = "MCO1 prescaler"] - pub fn set_mco1pre(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 18usize)) | (((val as u32) & 0x0f) << 18usize); - } - #[doc = "Micro-controller clock output 1"] - pub const fn mco1(&self) -> super::vals::Mco1 { - let val = (self.0 >> 22usize) & 0x07; - super::vals::Mco1(val as u8) - } - #[doc = "Micro-controller clock output 1"] - pub fn set_mco1(&mut self, val: super::vals::Mco1) { - self.0 = (self.0 & !(0x07 << 22usize)) | (((val.0 as u32) & 0x07) << 22usize); - } - #[doc = "MCO2 prescaler"] - pub const fn mco2pre(&self) -> u8 { - let val = (self.0 >> 25usize) & 0x0f; - val as u8 - } - #[doc = "MCO2 prescaler"] - pub fn set_mco2pre(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 25usize)) | (((val as u32) & 0x0f) << 25usize); - } - #[doc = "Micro-controller clock output 2"] - pub const fn mco2(&self) -> super::vals::Mco2 { - let val = (self.0 >> 29usize) & 0x07; - super::vals::Mco2(val as u8) - } - #[doc = "Micro-controller clock output 2"] - pub fn set_mco2(&mut self, val: super::vals::Mco2) { - self.0 = (self.0 & !(0x07 << 29usize)) | (((val.0 as u32) & 0x07) << 29usize); - } - } - impl Default for Cfgr { - fn default() -> Cfgr { - Cfgr(0) - } - } - #[doc = "RCC Reset Status Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Rsr(pub u32); - impl C1Rsr { - #[doc = "Remove reset flag"] - pub const fn rmvf(&self) -> super::vals::C1RsrRmvf { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1RsrRmvf(val as u8) - } - #[doc = "Remove reset flag"] - pub fn set_rmvf(&mut self, val: super::vals::C1RsrRmvf) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "CPU reset flag"] - pub const fn cpurstf(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "CPU reset flag"] - pub fn set_cpurstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "D1 domain power switch reset flag"] - pub const fn d1rstf(&self) -> bool { - let val = (self.0 >> 19usize) & 0x01; - val != 0 - } - #[doc = "D1 domain power switch reset flag"] - pub fn set_d1rstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); - } - #[doc = "D2 domain power switch reset flag"] - pub const fn d2rstf(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "D2 domain power switch reset flag"] - pub fn set_d2rstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "BOR reset flag"] - pub const fn borrstf(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "BOR reset flag"] - pub fn set_borrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "Pin reset flag (NRST)"] - pub const fn pinrstf(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Pin reset flag (NRST)"] - pub fn set_pinrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "POR/PDR reset flag"] - pub const fn porrstf(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "POR/PDR reset flag"] - pub fn set_porrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - #[doc = "System reset from CPU reset flag"] - pub const fn sftrstf(&self) -> bool { - let val = (self.0 >> 24usize) & 0x01; - val != 0 - } - #[doc = "System reset from CPU reset flag"] - pub fn set_sftrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); - } - #[doc = "Independent Watchdog reset flag"] - pub const fn iwdg1rstf(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "Independent Watchdog reset flag"] - pub fn set_iwdg1rstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "Window Watchdog reset flag"] - pub const fn wwdg1rstf(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "Window Watchdog reset flag"] - pub fn set_wwdg1rstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - #[doc = "Reset due to illegal D1 DStandby or CPU CStop flag"] - pub const fn lpwrrstf(&self) -> bool { - let val = (self.0 >> 30usize) & 0x01; - val != 0 - } - #[doc = "Reset due to illegal D1 DStandby or CPU CStop flag"] - pub fn set_lpwrrstf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); - } - } - impl Default for C1Rsr { - fn default() -> C1Rsr { - C1Rsr(0) - } - } - #[doc = "RCC APB1 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1lenr(pub u32); - impl Apb1lenr { - #[doc = "TIM peripheral clock enable"] - pub const fn tim2en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim2en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim3en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim3en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim4en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim4en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim5en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim5en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim6en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim6en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim7en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim7en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim12en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim12en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim13en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim13en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "TIM peripheral clock enable"] - pub const fn tim14en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "TIM peripheral clock enable"] - pub fn set_tim14en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "LPTIM1 Peripheral Clocks Enable"] - pub const fn lptim1en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "LPTIM1 Peripheral Clocks Enable"] - pub fn set_lptim1en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "SPI2 Peripheral Clocks Enable"] - pub const fn spi2en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "SPI2 Peripheral Clocks Enable"] - pub fn set_spi2en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SPI3 Peripheral Clocks Enable"] - pub const fn spi3en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "SPI3 Peripheral Clocks Enable"] - pub fn set_spi3en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "SPDIFRX Peripheral Clocks Enable"] - pub const fn spdifrxen(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "SPDIFRX Peripheral Clocks Enable"] - pub fn set_spdifrxen(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "USART2 Peripheral Clocks Enable"] - pub const fn usart2en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "USART2 Peripheral Clocks Enable"] - pub fn set_usart2en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "USART3 Peripheral Clocks Enable"] - pub const fn usart3en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "USART3 Peripheral Clocks Enable"] - pub fn set_usart3en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "UART4 Peripheral Clocks Enable"] - pub const fn uart4en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "UART4 Peripheral Clocks Enable"] - pub fn set_uart4en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "UART5 Peripheral Clocks Enable"] - pub const fn uart5en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "UART5 Peripheral Clocks Enable"] - pub fn set_uart5en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "I2C1 Peripheral Clocks Enable"] - pub const fn i2c1en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 21usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "I2C1 Peripheral Clocks Enable"] - pub fn set_i2c1en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 Peripheral Clocks Enable"] - pub const fn i2c2en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "I2C2 Peripheral Clocks Enable"] - pub fn set_i2c2en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "I2C3 Peripheral Clocks Enable"] - pub const fn i2c3en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "I2C3 Peripheral Clocks Enable"] - pub fn set_i2c3en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "HDMI-CEC peripheral clock enable"] - pub const fn cecen(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 27usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "HDMI-CEC peripheral clock enable"] - pub fn set_cecen(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "DAC1&2 peripheral clock enable"] - pub const fn dac12en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "DAC1&2 peripheral clock enable"] - pub fn set_dac12en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "UART7 Peripheral Clocks Enable"] - pub const fn uart7en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "UART7 Peripheral Clocks Enable"] - pub fn set_uart7en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "UART8 Peripheral Clocks Enable"] - pub const fn uart8en(&self) -> super::vals::Apb1lenrTim2en { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Apb1lenrTim2en(val as u8) - } - #[doc = "UART8 Peripheral Clocks Enable"] - pub fn set_uart8en(&mut self, val: super::vals::Apb1lenrTim2en) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Apb1lenr { - fn default() -> Apb1lenr { - Apb1lenr(0) - } - } - #[doc = "RCC Global Control Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Gcr(pub u32); - impl Gcr { - #[doc = "WWDG1 reset scope control"] - pub const fn ww1rsc(&self) -> super::vals::Ww1rsc { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ww1rsc(val as u8) - } - #[doc = "WWDG1 reset scope control"] - pub fn set_ww1rsc(&mut self, val: super::vals::Ww1rsc) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - } - impl Default for Gcr { - fn default() -> Gcr { - Gcr(0) - } - } - #[doc = "RCC APB4 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb4lpenr(pub u32); - impl C1Apb4lpenr { - #[doc = "SYSCFG peripheral clock enable during CSleep mode"] - pub const fn syscfglpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "SYSCFG peripheral clock enable during CSleep mode"] - pub fn set_syscfglpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "LPUART1 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lpuart1lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPUART1 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lpuart1lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "SPI6 Peripheral Clocks Enable During CSleep Mode"] - pub const fn spi6lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "SPI6 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_spi6lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "I2C4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn i2c4lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "I2C4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_i2c4lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "LPTIM2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim2lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPTIM2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim2lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "LPTIM3 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim3lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPTIM3 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim3lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "LPTIM4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim4lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 11usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPTIM4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim4lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "LPTIM5 Peripheral Clocks Enable During CSleep Mode"] - pub const fn lptim5lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "LPTIM5 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_lptim5lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "COMP1/2 peripheral clock enable during CSleep mode"] - pub const fn comp12lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "COMP1/2 peripheral clock enable during CSleep mode"] - pub fn set_comp12lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "VREF peripheral clock enable during CSleep mode"] - pub const fn vreflpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "VREF peripheral clock enable during CSleep mode"] - pub fn set_vreflpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "RTC APB Clock Enable During CSleep Mode"] - pub const fn rtcapblpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "RTC APB Clock Enable During CSleep Mode"] - pub fn set_rtcapblpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "SAI4 Peripheral Clocks Enable During CSleep Mode"] - pub const fn sai4lpen(&self) -> super::vals::C1Apb4lpenrSyscfglpen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::C1Apb4lpenrSyscfglpen(val as u8) - } - #[doc = "SAI4 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_sai4lpen(&mut self, val: super::vals::C1Apb4lpenrSyscfglpen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - } - impl Default for C1Apb4lpenr { - fn default() -> C1Apb4lpenr { - C1Apb4lpenr(0) - } - } - #[doc = "RCC APB2 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb2enr(pub u32); - impl C1Apb2enr { - #[doc = "TIM1 peripheral clock enable"] - pub const fn tim1en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "TIM1 peripheral clock enable"] - pub fn set_tim1en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM8 peripheral clock enable"] - pub const fn tim8en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "TIM8 peripheral clock enable"] - pub fn set_tim8en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "USART1 Peripheral Clocks Enable"] - pub const fn usart1en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "USART1 Peripheral Clocks Enable"] - pub fn set_usart1en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "USART6 Peripheral Clocks Enable"] - pub const fn usart6en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "USART6 Peripheral Clocks Enable"] - pub fn set_usart6en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "SPI1 Peripheral Clocks Enable"] - pub const fn spi1en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 12usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "SPI1 Peripheral Clocks Enable"] - pub fn set_spi1en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "SPI4 Peripheral Clocks Enable"] - pub const fn spi4en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 13usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "SPI4 Peripheral Clocks Enable"] - pub fn set_spi4en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "TIM15 peripheral clock enable"] - pub const fn tim15en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "TIM15 peripheral clock enable"] - pub fn set_tim15en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "TIM16 peripheral clock enable"] - pub const fn tim16en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 17usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "TIM16 peripheral clock enable"] - pub fn set_tim16en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "TIM17 peripheral clock enable"] - pub const fn tim17en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 18usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "TIM17 peripheral clock enable"] - pub fn set_tim17en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "SPI5 Peripheral Clocks Enable"] - pub const fn spi5en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 20usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "SPI5 Peripheral Clocks Enable"] - pub fn set_spi5en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "SAI1 Peripheral Clocks Enable"] - pub const fn sai1en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 22usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "SAI1 Peripheral Clocks Enable"] - pub fn set_sai1en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "SAI2 Peripheral Clocks Enable"] - pub const fn sai2en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 23usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "SAI2 Peripheral Clocks Enable"] - pub fn set_sai2en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "SAI3 Peripheral Clocks Enable"] - pub const fn sai3en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 24usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "SAI3 Peripheral Clocks Enable"] - pub fn set_sai3en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "DFSDM1 Peripheral Clocks Enable"] - pub const fn dfsdm1en(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 28usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "DFSDM1 Peripheral Clocks Enable"] - pub fn set_dfsdm1en(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "HRTIM peripheral clock enable"] - pub const fn hrtimen(&self) -> super::vals::C1Apb2enrTim1en { - let val = (self.0 >> 29usize) & 0x01; - super::vals::C1Apb2enrTim1en(val as u8) - } - #[doc = "HRTIM peripheral clock enable"] - pub fn set_hrtimen(&mut self, val: super::vals::C1Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - } - impl Default for C1Apb2enr { - fn default() -> C1Apb2enr { - C1Apb2enr(0) - } - } - #[doc = "RCC APB1 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb1henr(pub u32); - impl C1Apb1henr { - #[doc = "Clock Recovery System peripheral clock enable"] - pub const fn crsen(&self) -> super::vals::C1Apb1henrCrsen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Apb1henrCrsen(val as u8) - } - #[doc = "Clock Recovery System peripheral clock enable"] - pub fn set_crsen(&mut self, val: super::vals::C1Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "SWPMI Peripheral Clocks Enable"] - pub const fn swpen(&self) -> super::vals::C1Apb1henrCrsen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::C1Apb1henrCrsen(val as u8) - } - #[doc = "SWPMI Peripheral Clocks Enable"] - pub fn set_swpen(&mut self, val: super::vals::C1Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "OPAMP peripheral clock enable"] - pub const fn opampen(&self) -> super::vals::C1Apb1henrCrsen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Apb1henrCrsen(val as u8) - } - #[doc = "OPAMP peripheral clock enable"] - pub fn set_opampen(&mut self, val: super::vals::C1Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "MDIOS peripheral clock enable"] - pub const fn mdiosen(&self) -> super::vals::C1Apb1henrCrsen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Apb1henrCrsen(val as u8) - } - #[doc = "MDIOS peripheral clock enable"] - pub fn set_mdiosen(&mut self, val: super::vals::C1Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FDCAN Peripheral Clocks Enable"] - pub const fn fdcanen(&self) -> super::vals::C1Apb1henrCrsen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::C1Apb1henrCrsen(val as u8) - } - #[doc = "FDCAN Peripheral Clocks Enable"] - pub fn set_fdcanen(&mut self, val: super::vals::C1Apb1henrCrsen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - } - impl Default for C1Apb1henr { - fn default() -> C1Apb1henr { - C1Apb1henr(0) - } - } - #[doc = "RCC APB3 Peripheral Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb3rstr(pub u32); - impl Apb3rstr { - #[doc = "LTDC block reset"] - pub const fn ltdcrst(&self) -> super::vals::Ltdcrst { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Ltdcrst(val as u8) - } - #[doc = "LTDC block reset"] - pub fn set_ltdcrst(&mut self, val: super::vals::Ltdcrst) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - } - impl Default for Apb3rstr { - fn default() -> Apb3rstr { - Apb3rstr(0) - } - } - #[doc = "RCC APB2 Peripheral Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb2rstr(pub u32); - impl Apb2rstr { - #[doc = "TIM1 block reset"] - pub const fn tim1rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "TIM1 block reset"] - pub fn set_tim1rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM8 block reset"] - pub const fn tim8rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "TIM8 block reset"] - pub fn set_tim8rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "USART1 block reset"] - pub const fn usart1rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "USART1 block reset"] - pub fn set_usart1rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "USART6 block reset"] - pub const fn usart6rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "USART6 block reset"] - pub fn set_usart6rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "SPI1 block reset"] - pub const fn spi1rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "SPI1 block reset"] - pub fn set_spi1rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "SPI4 block reset"] - pub const fn spi4rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 13usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "SPI4 block reset"] - pub fn set_spi4rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "TIM15 block reset"] - pub const fn tim15rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "TIM15 block reset"] - pub fn set_tim15rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "TIM16 block reset"] - pub const fn tim16rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "TIM16 block reset"] - pub fn set_tim16rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "TIM17 block reset"] - pub const fn tim17rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "TIM17 block reset"] - pub fn set_tim17rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "SPI5 block reset"] - pub const fn spi5rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "SPI5 block reset"] - pub fn set_spi5rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "SAI1 block reset"] - pub const fn sai1rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "SAI1 block reset"] - pub fn set_sai1rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "SAI2 block reset"] - pub const fn sai2rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "SAI2 block reset"] - pub fn set_sai2rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "SAI3 block reset"] - pub const fn sai3rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "SAI3 block reset"] - pub fn set_sai3rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "DFSDM1 block reset"] - pub const fn dfsdm1rst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "DFSDM1 block reset"] - pub fn set_dfsdm1rst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "HRTIM block reset"] - pub const fn hrtimrst(&self) -> super::vals::Tim1rst { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Tim1rst(val as u8) - } - #[doc = "HRTIM block reset"] - pub fn set_hrtimrst(&mut self, val: super::vals::Tim1rst) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - } - impl Default for Apb2rstr { - fn default() -> Apb2rstr { - Apb2rstr(0) - } - } - #[doc = "RCC APB3 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb3enr(pub u32); - impl Apb3enr { - #[doc = "LTDC peripheral clock enable"] - pub const fn ltdcen(&self) -> super::vals::Apb3enrLtdcen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::Apb3enrLtdcen(val as u8) - } - #[doc = "LTDC peripheral clock enable"] - pub fn set_ltdcen(&mut self, val: super::vals::Apb3enrLtdcen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "WWDG1 Clock Enable"] - pub const fn wwdg1en(&self) -> super::vals::Apb3enrLtdcen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Apb3enrLtdcen(val as u8) - } - #[doc = "WWDG1 Clock Enable"] - pub fn set_wwdg1en(&mut self, val: super::vals::Apb3enrLtdcen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - } - impl Default for Apb3enr { - fn default() -> Apb3enr { - Apb3enr(0) - } - } - #[doc = "RCC AHB1 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Ahb1lpenr(pub u32); - impl C1Ahb1lpenr { - #[doc = "DMA1 Clock Enable During CSleep Mode"] - pub const fn dma1lpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "DMA1 Clock Enable During CSleep Mode"] - pub fn set_dma1lpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2 Clock Enable During CSleep Mode"] - pub const fn dma2lpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "DMA2 Clock Enable During CSleep Mode"] - pub fn set_dma2lpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "ADC1/2 Peripheral Clocks Enable During CSleep Mode"] - pub const fn adc12lpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "ADC1/2 Peripheral Clocks Enable During CSleep Mode"] - pub fn set_adc12lpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Ethernet MAC bus interface Clock Enable During CSleep Mode"] - pub const fn eth1maclpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 15usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "Ethernet MAC bus interface Clock Enable During CSleep Mode"] - pub fn set_eth1maclpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Ethernet Transmission Clock Enable During CSleep Mode"] - pub const fn eth1txlpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "Ethernet Transmission Clock Enable During CSleep Mode"] - pub fn set_eth1txlpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "Ethernet Reception Clock Enable During CSleep Mode"] - pub const fn eth1rxlpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 17usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "Ethernet Reception Clock Enable During CSleep Mode"] - pub fn set_eth1rxlpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "USB1OTG peripheral clock enable during CSleep mode"] - pub const fn usb1otglpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 25usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "USB1OTG peripheral clock enable during CSleep mode"] - pub fn set_usb1otglpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "USB_PHY1 clock enable during CSleep mode"] - pub const fn usb1ulpilpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 26usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "USB_PHY1 clock enable during CSleep mode"] - pub fn set_usb1ulpilpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val.0 as u32) & 0x01) << 26usize); - } - #[doc = "USB2OTG peripheral clock enable during CSleep mode"] - pub const fn usb2otglpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 27usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "USB2OTG peripheral clock enable during CSleep mode"] - pub fn set_usb2otglpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 27usize)) | (((val.0 as u32) & 0x01) << 27usize); - } - #[doc = "USB_PHY2 clocks enable during CSleep mode"] - pub const fn usb2ulpilpen(&self) -> super::vals::C1Ahb1lpenrDma1lpen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::C1Ahb1lpenrDma1lpen(val as u8) - } - #[doc = "USB_PHY2 clocks enable during CSleep mode"] - pub fn set_usb2ulpilpen(&mut self, val: super::vals::C1Ahb1lpenrDma1lpen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - } - impl Default for C1Ahb1lpenr { - fn default() -> C1Ahb1lpenr { - C1Ahb1lpenr(0) - } - } - #[doc = "RCC PLLs Clock Source Selection Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pllckselr(pub u32); - impl Pllckselr { - #[doc = "DIVMx and PLLs clock source selection"] - pub const fn pllsrc(&self) -> super::vals::Pllsrc { - let val = (self.0 >> 0usize) & 0x03; - super::vals::Pllsrc(val as u8) - } - #[doc = "DIVMx and PLLs clock source selection"] - pub fn set_pllsrc(&mut self, val: super::vals::Pllsrc) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val.0 as u32) & 0x03) << 0usize); - } - #[doc = "Prescaler for PLL1"] - pub fn divm(&self, n: usize) -> u8 { - assert!(n < 3usize); - let offs = 4usize + n * 8usize; - let val = (self.0 >> offs) & 0x3f; - val as u8 - } - #[doc = "Prescaler for PLL1"] - pub fn set_divm(&mut self, n: usize, val: u8) { - assert!(n < 3usize); - let offs = 4usize + n * 8usize; - self.0 = (self.0 & !(0x3f << offs)) | (((val as u32) & 0x3f) << offs); - } - } - impl Default for Pllckselr { - fn default() -> Pllckselr { - Pllckselr(0) - } - } - #[doc = "RCC AHB3 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Ahb3lpenr(pub u32); - impl C1Ahb3lpenr { - #[doc = "MDMA Clock Enable During CSleep Mode"] - pub const fn mdmalpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "MDMA Clock Enable During CSleep Mode"] - pub fn set_mdmalpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2D Clock Enable During CSleep Mode"] - pub const fn dma2dlpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "DMA2D Clock Enable During CSleep Mode"] - pub fn set_dma2dlpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "JPGDEC Clock Enable During CSleep Mode"] - pub const fn jpgdeclpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "JPGDEC Clock Enable During CSleep Mode"] - pub fn set_jpgdeclpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Flash interface clock enable during csleep mode"] - pub const fn flashpren(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Flash interface clock enable during csleep mode"] - pub fn set_flashpren(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "FMC Peripheral Clocks Enable During CSleep Mode"] - pub const fn fmclpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "FMC Peripheral Clocks Enable During CSleep Mode"] - pub fn set_fmclpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode"] - pub const fn qspilpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode"] - pub fn set_qspilpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode"] - pub const fn sdmmc1lpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode"] - pub fn set_sdmmc1lpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "D1DTCM1 Block Clock Enable During CSleep mode"] - pub const fn d1dtcm1lpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "D1DTCM1 Block Clock Enable During CSleep mode"] - pub fn set_d1dtcm1lpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "D1 DTCM2 Block Clock Enable During CSleep mode"] - pub const fn dtcm2lpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "D1 DTCM2 Block Clock Enable During CSleep mode"] - pub fn set_dtcm2lpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "D1ITCM Block Clock Enable During CSleep mode"] - pub const fn itcmlpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 30usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "D1ITCM Block Clock Enable During CSleep mode"] - pub fn set_itcmlpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "AXISRAM Block Clock Enable During CSleep mode"] - pub const fn axisramlpen(&self) -> super::vals::C1Ahb3lpenrMdmalpen { - let val = (self.0 >> 31usize) & 0x01; - super::vals::C1Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "AXISRAM Block Clock Enable During CSleep mode"] - pub fn set_axisramlpen(&mut self, val: super::vals::C1Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for C1Ahb3lpenr { - fn default() -> C1Ahb3lpenr { - C1Ahb3lpenr(0) - } - } - #[doc = "RCC Clock Source Interrupt Flag Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cifr(pub u32); - impl Cifr { - #[doc = "LSI ready Interrupt Flag"] - pub const fn lsirdyf(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "LSI ready Interrupt Flag"] - pub fn set_lsirdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "LSE ready Interrupt Flag"] - pub const fn lserdyf(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "LSE ready Interrupt Flag"] - pub fn set_lserdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "HSI ready Interrupt Flag"] - pub const fn hsirdyf(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "HSI ready Interrupt Flag"] - pub fn set_hsirdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "HSE ready Interrupt Flag"] - pub const fn hserdyf(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "HSE ready Interrupt Flag"] - pub fn set_hserdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "CSI ready Interrupt Flag"] - pub const fn csirdy(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "CSI ready Interrupt Flag"] - pub fn set_csirdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "RC48 ready Interrupt Flag"] - pub const fn hsi48rdyf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "RC48 ready Interrupt Flag"] - pub fn set_hsi48rdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "PLL1 ready Interrupt Flag"] - pub fn pllrdyf(&self, n: usize) -> bool { - assert!(n < 3usize); - let offs = 6usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "PLL1 ready Interrupt Flag"] - pub fn set_pllrdyf(&mut self, n: usize, val: bool) { - assert!(n < 3usize); - let offs = 6usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "LSE clock security system Interrupt Flag"] - pub const fn lsecssf(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "LSE clock security system Interrupt Flag"] - pub fn set_lsecssf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "HSE clock security system Interrupt Flag"] - pub const fn hsecssf(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "HSE clock security system Interrupt Flag"] - pub fn set_hsecssf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - } - impl Default for Cifr { - fn default() -> Cifr { - Cifr(0) - } - } - #[doc = "RCC Domain 3 Clock Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D3cfgr(pub u32); - impl D3cfgr { - #[doc = "D3 domain APB4 prescaler"] - pub const fn d3ppre(&self) -> super::vals::D3ppre { - let val = (self.0 >> 4usize) & 0x07; - super::vals::D3ppre(val as u8) - } - #[doc = "D3 domain APB4 prescaler"] - pub fn set_d3ppre(&mut self, val: super::vals::D3ppre) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - } - impl Default for D3cfgr { - fn default() -> D3cfgr { - D3cfgr(0) - } - } - #[doc = "RCC Domain 2 Clock Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct D2cfgr(pub u32); - impl D2cfgr { - #[doc = "D2 domain APB1 prescaler"] - pub const fn d2ppre1(&self) -> super::vals::D2ppre1 { - let val = (self.0 >> 4usize) & 0x07; - super::vals::D2ppre1(val as u8) - } - #[doc = "D2 domain APB1 prescaler"] - pub fn set_d2ppre1(&mut self, val: super::vals::D2ppre1) { - self.0 = (self.0 & !(0x07 << 4usize)) | (((val.0 as u32) & 0x07) << 4usize); - } - #[doc = "D2 domain APB2 prescaler"] - pub const fn d2ppre2(&self) -> super::vals::D2ppre1 { - let val = (self.0 >> 8usize) & 0x07; - super::vals::D2ppre1(val as u8) - } - #[doc = "D2 domain APB2 prescaler"] - pub fn set_d2ppre2(&mut self, val: super::vals::D2ppre1) { - self.0 = (self.0 & !(0x07 << 8usize)) | (((val.0 as u32) & 0x07) << 8usize); - } - } - impl Default for D2cfgr { - fn default() -> D2cfgr { - D2cfgr(0) - } - } - #[doc = "RCC APB1 Peripheral Reset Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1hrstr(pub u32); - impl Apb1hrstr { - #[doc = "Clock Recovery System reset"] - pub const fn crsrst(&self) -> super::vals::Crsrst { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Crsrst(val as u8) - } - #[doc = "Clock Recovery System reset"] - pub fn set_crsrst(&mut self, val: super::vals::Crsrst) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "SWPMI block reset"] - pub const fn swprst(&self) -> super::vals::Crsrst { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Crsrst(val as u8) - } - #[doc = "SWPMI block reset"] - pub fn set_swprst(&mut self, val: super::vals::Crsrst) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "OPAMP block reset"] - pub const fn opamprst(&self) -> super::vals::Crsrst { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Crsrst(val as u8) - } - #[doc = "OPAMP block reset"] - pub fn set_opamprst(&mut self, val: super::vals::Crsrst) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "MDIOS block reset"] - pub const fn mdiosrst(&self) -> super::vals::Crsrst { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Crsrst(val as u8) - } - #[doc = "MDIOS block reset"] - pub fn set_mdiosrst(&mut self, val: super::vals::Crsrst) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FDCAN block reset"] - pub const fn fdcanrst(&self) -> super::vals::Crsrst { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Crsrst(val as u8) - } - #[doc = "FDCAN block reset"] - pub fn set_fdcanrst(&mut self, val: super::vals::Crsrst) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - } - impl Default for Apb1hrstr { - fn default() -> Apb1hrstr { - Apb1hrstr(0) - } - } - #[doc = "RCC APB2 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb2enr(pub u32); - impl Apb2enr { - #[doc = "TIM1 peripheral clock enable"] - pub const fn tim1en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "TIM1 peripheral clock enable"] - pub fn set_tim1en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "TIM8 peripheral clock enable"] - pub const fn tim8en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "TIM8 peripheral clock enable"] - pub fn set_tim8en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "USART1 Peripheral Clocks Enable"] - pub const fn usart1en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "USART1 Peripheral Clocks Enable"] - pub fn set_usart1en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "USART6 Peripheral Clocks Enable"] - pub const fn usart6en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "USART6 Peripheral Clocks Enable"] - pub fn set_usart6en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "SPI1 Peripheral Clocks Enable"] - pub const fn spi1en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "SPI1 Peripheral Clocks Enable"] - pub fn set_spi1en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "SPI4 Peripheral Clocks Enable"] - pub const fn spi4en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 13usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "SPI4 Peripheral Clocks Enable"] - pub fn set_spi4en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "TIM15 peripheral clock enable"] - pub const fn tim15en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "TIM15 peripheral clock enable"] - pub fn set_tim15en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "TIM16 peripheral clock enable"] - pub const fn tim16en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 17usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "TIM16 peripheral clock enable"] - pub fn set_tim16en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val.0 as u32) & 0x01) << 17usize); - } - #[doc = "TIM17 peripheral clock enable"] - pub const fn tim17en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "TIM17 peripheral clock enable"] - pub fn set_tim17en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "SPI5 Peripheral Clocks Enable"] - pub const fn spi5en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 20usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "SPI5 Peripheral Clocks Enable"] - pub fn set_spi5en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val.0 as u32) & 0x01) << 20usize); - } - #[doc = "SAI1 Peripheral Clocks Enable"] - pub const fn sai1en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "SAI1 Peripheral Clocks Enable"] - pub fn set_sai1en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "SAI2 Peripheral Clocks Enable"] - pub const fn sai2en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "SAI2 Peripheral Clocks Enable"] - pub fn set_sai2en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "SAI3 Peripheral Clocks Enable"] - pub const fn sai3en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "SAI3 Peripheral Clocks Enable"] - pub fn set_sai3en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "DFSDM1 Peripheral Clocks Enable"] - pub const fn dfsdm1en(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "DFSDM1 Peripheral Clocks Enable"] - pub fn set_dfsdm1en(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "HRTIM peripheral clock enable"] - pub const fn hrtimen(&self) -> super::vals::Apb2enrTim1en { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Apb2enrTim1en(val as u8) - } - #[doc = "HRTIM peripheral clock enable"] - pub fn set_hrtimen(&mut self, val: super::vals::Apb2enrTim1en) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - } - impl Default for Apb2enr { - fn default() -> Apb2enr { - Apb2enr(0) - } - } - #[doc = "RCC PLLs Configuration Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pllcfgr(pub u32); - impl Pllcfgr { - #[doc = "PLL1 fractional latch enable"] - pub fn pllfracen(&self, n: usize) -> super::vals::Pll1fracen { - assert!(n < 3usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Pll1fracen(val as u8) - } - #[doc = "PLL1 fractional latch enable"] - pub fn set_pllfracen(&mut self, n: usize, val: super::vals::Pll1fracen) { - assert!(n < 3usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "PLL1 VCO selection"] - pub fn pllvcosel(&self, n: usize) -> super::vals::Pll1vcosel { - assert!(n < 3usize); - let offs = 1usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Pll1vcosel(val as u8) - } - #[doc = "PLL1 VCO selection"] - pub fn set_pllvcosel(&mut self, n: usize, val: super::vals::Pll1vcosel) { - assert!(n < 3usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "PLL1 input frequency range"] - pub fn pllrge(&self, n: usize) -> super::vals::Pll1rge { - assert!(n < 3usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Pll1rge(val as u8) - } - #[doc = "PLL1 input frequency range"] - pub fn set_pllrge(&mut self, n: usize, val: super::vals::Pll1rge) { - assert!(n < 3usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - #[doc = "PLL1 DIVP divider output enable"] - pub fn divpen(&self, n: usize) -> super::vals::Divp1en { - assert!(n < 3usize); - let offs = 16usize + n * 3usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Divp1en(val as u8) - } - #[doc = "PLL1 DIVP divider output enable"] - pub fn set_divpen(&mut self, n: usize, val: super::vals::Divp1en) { - assert!(n < 3usize); - let offs = 16usize + n * 3usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "PLL1 DIVQ divider output enable"] - pub fn divqen(&self, n: usize) -> super::vals::Divp1en { - assert!(n < 3usize); - let offs = 17usize + n * 3usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Divp1en(val as u8) - } - #[doc = "PLL1 DIVQ divider output enable"] - pub fn set_divqen(&mut self, n: usize, val: super::vals::Divp1en) { - assert!(n < 3usize); - let offs = 17usize + n * 3usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "PLL1 DIVR divider output enable"] - pub fn divren(&self, n: usize) -> super::vals::Divp1en { - assert!(n < 3usize); - let offs = 18usize + n * 3usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Divp1en(val as u8) - } - #[doc = "PLL1 DIVR divider output enable"] - pub fn set_divren(&mut self, n: usize, val: super::vals::Divp1en) { - assert!(n < 3usize); - let offs = 18usize + n * 3usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Pllcfgr { - fn default() -> Pllcfgr { - Pllcfgr(0) - } - } - #[doc = "RCC AHB4 Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Ahb4enr(pub u32); - impl C1Ahb4enr { - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioaen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioaen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioben(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 1usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioben(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiocen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 2usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiocen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioden(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioden(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioeen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioeen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiofen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiofen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiogen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiogen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiohen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 7usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiohen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioien(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioien(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpiojen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 9usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpiojen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "0GPIO peripheral clock enable"] - pub const fn gpioken(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 10usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "0GPIO peripheral clock enable"] - pub fn set_gpioken(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "CRC peripheral clock enable"] - pub const fn crcen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 19usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "CRC peripheral clock enable"] - pub fn set_crcen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "BDMA and DMAMUX2 Clock Enable"] - pub const fn bdmaen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 21usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "BDMA and DMAMUX2 Clock Enable"] - pub fn set_bdmaen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val.0 as u32) & 0x01) << 21usize); - } - #[doc = "ADC3 Peripheral Clocks Enable"] - pub const fn adc3en(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 24usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "ADC3 Peripheral Clocks Enable"] - pub fn set_adc3en(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "HSEM peripheral clock enable"] - pub const fn hsemen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 25usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "HSEM peripheral clock enable"] - pub fn set_hsemen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "Backup RAM Clock Enable"] - pub const fn bkpramen(&self) -> super::vals::C1Ahb4enrGpioaen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::C1Ahb4enrGpioaen(val as u8) - } - #[doc = "Backup RAM Clock Enable"] - pub fn set_bkpramen(&mut self, val: super::vals::C1Ahb4enrGpioaen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - } - impl Default for C1Ahb4enr { - fn default() -> C1Ahb4enr { - C1Ahb4enr(0) - } - } - #[doc = "RCC APB3 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct C1Apb3lpenr(pub u32); - impl C1Apb3lpenr { - #[doc = "LTDC peripheral clock enable during CSleep mode"] - pub const fn ltdclpen(&self) -> super::vals::C1Apb3lpenrLtdclpen { - let val = (self.0 >> 3usize) & 0x01; - super::vals::C1Apb3lpenrLtdclpen(val as u8) - } - #[doc = "LTDC peripheral clock enable during CSleep mode"] - pub fn set_ltdclpen(&mut self, val: super::vals::C1Apb3lpenrLtdclpen) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val.0 as u32) & 0x01) << 3usize); - } - #[doc = "WWDG1 Clock Enable During CSleep Mode"] - pub const fn wwdg1lpen(&self) -> super::vals::C1Apb3lpenrLtdclpen { - let val = (self.0 >> 6usize) & 0x01; - super::vals::C1Apb3lpenrLtdclpen(val as u8) - } - #[doc = "WWDG1 Clock Enable During CSleep Mode"] - pub fn set_wwdg1lpen(&mut self, val: super::vals::C1Apb3lpenrLtdclpen) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - } - impl Default for C1Apb3lpenr { - fn default() -> C1Apb3lpenr { - C1Apb3lpenr(0) - } - } - #[doc = "RCC AHB3 Sleep Clock Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ahb3lpenr(pub u32); - impl Ahb3lpenr { - #[doc = "MDMA Clock Enable During CSleep Mode"] - pub const fn mdmalpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "MDMA Clock Enable During CSleep Mode"] - pub fn set_mdmalpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "DMA2D Clock Enable During CSleep Mode"] - pub const fn dma2dlpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "DMA2D Clock Enable During CSleep Mode"] - pub fn set_dma2dlpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "JPGDEC Clock Enable During CSleep Mode"] - pub const fn jpgdeclpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "JPGDEC Clock Enable During CSleep Mode"] - pub fn set_jpgdeclpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "FLITF Clock Enable During CSleep Mode"] - pub const fn flashlpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "FLITF Clock Enable During CSleep Mode"] - pub fn set_flashlpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "FMC Peripheral Clocks Enable During CSleep Mode"] - pub const fn fmclpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "FMC Peripheral Clocks Enable During CSleep Mode"] - pub fn set_fmclpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode"] - pub const fn qspilpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode"] - pub fn set_qspilpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode"] - pub const fn sdmmc1lpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode"] - pub fn set_sdmmc1lpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - #[doc = "D1DTCM1 Block Clock Enable During CSleep mode"] - pub const fn d1dtcm1lpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "D1DTCM1 Block Clock Enable During CSleep mode"] - pub fn set_d1dtcm1lpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "D1 DTCM2 Block Clock Enable During CSleep mode"] - pub const fn dtcm2lpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 29usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "D1 DTCM2 Block Clock Enable During CSleep mode"] - pub fn set_dtcm2lpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val.0 as u32) & 0x01) << 29usize); - } - #[doc = "D1ITCM Block Clock Enable During CSleep mode"] - pub const fn itcmlpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "D1ITCM Block Clock Enable During CSleep mode"] - pub fn set_itcmlpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "AXISRAM Block Clock Enable During CSleep mode"] - pub const fn axisramlpen(&self) -> super::vals::Ahb3lpenrMdmalpen { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Ahb3lpenrMdmalpen(val as u8) - } - #[doc = "AXISRAM Block Clock Enable During CSleep mode"] - pub fn set_axisramlpen(&mut self, val: super::vals::Ahb3lpenrMdmalpen) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Ahb3lpenr { - fn default() -> Ahb3lpenr { - Ahb3lpenr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ahb3enrMdmaen(pub u8); - impl Ahb3enrMdmaen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cecsel(pub u8); - impl Cecsel { - #[doc = "LSE selected as peripheral clock"] - pub const LSE: Self = Self(0); - #[doc = "LSI selected as peripheral clock"] - pub const LSI: Self = Self(0x01); - #[doc = "csi_ker selected as peripheral clock"] - pub const CSI_KER: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mdmarst(pub u8); - impl Mdmarst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mco1(pub u8); - impl Mco1 { - #[doc = "HSI selected for micro-controller clock output"] - pub const HSI: Self = Self(0); - #[doc = "LSE selected for micro-controller clock output"] - pub const LSE: Self = Self(0x01); - #[doc = "HSE selected for micro-controller clock output"] - pub const HSE: Self = Self(0x02); - #[doc = "pll1_q selected for micro-controller clock output"] - pub const PLL1_Q: Self = Self(0x03); - #[doc = "HSI48 selected for micro-controller clock output"] - pub const HSI48: Self = Self(0x04); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ahb3lpenrMdmalpen(pub u8); - impl Ahb3lpenrMdmalpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hpre(pub u8); - impl Hpre { - #[doc = "sys_ck not divided"] - pub const DIV1: Self = Self(0); - #[doc = "sys_ck divided by 2"] - pub const DIV2: Self = Self(0x08); - #[doc = "sys_ck divided by 4"] - pub const DIV4: Self = Self(0x09); - #[doc = "sys_ck divided by 8"] - pub const DIV8: Self = Self(0x0a); - #[doc = "sys_ck divided by 16"] - pub const DIV16: Self = Self(0x0b); - #[doc = "sys_ck divided by 64"] - pub const DIV64: Self = Self(0x0c); - #[doc = "sys_ck divided by 128"] - pub const DIV128: Self = Self(0x0d); - #[doc = "sys_ck divided by 256"] - pub const DIV256: Self = Self(0x0e); - #[doc = "sys_ck divided by 512"] - pub const DIV512: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Spdifsel(pub u8); - impl Spdifsel { - #[doc = "pll1_q selected as peripheral clock"] - pub const PLL1_Q: Self = Self(0); - #[doc = "pll2_r selected as peripheral clock"] - pub const PLL2_R: Self = Self(0x01); - #[doc = "pll3_r selected as peripheral clock"] - pub const PLL3_R: Self = Self(0x02); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ahb1enrDma1en(pub u8); - impl Ahb1enrDma1en { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Camitfrst(pub u8); - impl Camitfrst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsirdyr(pub u8); - impl Lsirdyr { - #[doc = "LSI oscillator not ready"] - pub const NOTREADY: Self = Self(0); - #[doc = "LSI oscillator ready"] - pub const READY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb2lpenrTim1lpen(pub u8); - impl Apb2lpenrTim1lpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Gpioarst(pub u8); - impl Gpioarst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1RsrCpurstfr(pub u8); - impl C1RsrCpurstfr { - #[doc = "No reset occoured for block"] - pub const NORESETOCCOURED: Self = Self(0); - #[doc = "Reset occoured for block"] - pub const RESETOCCOURRED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb4enrSyscfgen(pub u8); - impl Apb4enrSyscfgen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sai4asel(pub u8); - impl Sai4asel { - #[doc = "pll1_q selected as peripheral clock"] - pub const PLL1_Q: Self = Self(0); - #[doc = "pll2_p selected as peripheral clock"] - pub const PLL2_P: Self = Self(0x01); - #[doc = "pll3_p selected as peripheral clock"] - pub const PLL3_P: Self = Self(0x02); - #[doc = "i2s_ckin selected as peripheral clock"] - pub const I2S_CKIN: Self = Self(0x03); - #[doc = "PER selected as peripheral clock"] - pub const PER: Self = Self(0x04); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pllsrc(pub u8); - impl Pllsrc { - #[doc = "HSI selected as PLL clock"] - pub const HSI: Self = Self(0); - #[doc = "CSI selected as PLL clock"] - pub const CSI: Self = Self(0x01); - #[doc = "HSE selected as PLL clock"] - pub const HSE: Self = Self(0x02); - #[doc = "No clock sent to DIVMx dividers and PLLs"] - pub const NONE: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb1hlpenrCrslpen(pub u8); - impl C1Apb1hlpenrCrslpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ahb2enrDcmien(pub u8); - impl Ahb2enrDcmien { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Fmcsel(pub u8); - impl Fmcsel { - #[doc = "rcc_hclk3 selected as peripheral clock"] - pub const RCC_HCLK3: Self = Self(0); - #[doc = "pll1_q selected as peripheral clock"] - pub const PLL1_Q: Self = Self(0x01); - #[doc = "pll2_r selected as peripheral clock"] - pub const PLL2_R: Self = Self(0x02); - #[doc = "PER selected as peripheral clock"] - pub const PER: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Swpsel(pub u8); - impl Swpsel { - #[doc = "pclk selected as peripheral clock"] - pub const PCLK: Self = Self(0); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Ahb1lpenrDma1lpen(pub u8); - impl C1Ahb1lpenrDma1lpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rtcen(pub u8); - impl Rtcen { - #[doc = "RTC clock disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "RTC clock enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsirdyie(pub u8); - impl Lsirdyie { - #[doc = "Interrupt disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Interrupt enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb3enrLtdcen(pub u8); - impl C1Apb3enrLtdcen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb3lpenrLtdclpen(pub u8); - impl C1Apb3lpenrLtdclpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsebyp(pub u8); - impl Lsebyp { - #[doc = "LSE crystal oscillator not bypassed"] - pub const NOTBYPASSED: Self = Self(0); - #[doc = "LSE crystal oscillator bypassed with external clock"] - pub const BYPASSED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct D1ppre(pub u8); - impl D1ppre { - #[doc = "rcc_hclk not divided"] - pub const DIV1: Self = Self(0); - #[doc = "rcc_hclk divided by 2"] - pub const DIV2: Self = Self(0x04); - #[doc = "rcc_hclk divided by 4"] - pub const DIV4: Self = Self(0x05); - #[doc = "rcc_hclk divided by 8"] - pub const DIV8: Self = Self(0x06); - #[doc = "rcc_hclk divided by 16"] - pub const DIV16: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb1llpenrTim2lpen(pub u8); - impl C1Apb1llpenrTim2lpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsion(pub u8); - impl Hsion { - #[doc = "Clock Off"] - pub const OFF: Self = Self(0); - #[doc = "Clock On"] - pub const ON: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ahb4lpenrGpioalpen(pub u8); - impl Ahb4lpenrGpioalpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Divp1en(pub u8); - impl Divp1en { - #[doc = "Clock ouput is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Clock output is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsecssdr(pub u8); - impl Lsecssdr { - #[doc = "No failure detected on 32 kHz oscillator"] - pub const NOFAILURE: Self = Self(0); - #[doc = "Failure detected on 32 kHz oscillator"] - pub const FAILURE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsion(pub u8); - impl Lsion { - #[doc = "LSI oscillator Off"] - pub const OFF: Self = Self(0); - #[doc = "LSI oscillator On"] - pub const ON: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb3lpenrLtdclpen(pub u8); - impl Apb3lpenrLtdclpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Usart234578sel(pub u8); - impl Usart234578sel { - #[doc = "rcc_pclk1 selected as peripheral clock"] - pub const RCC_PCLK1: Self = Self(0); - #[doc = "pll2_q selected as peripheral clock"] - pub const PLL2_Q: Self = Self(0x01); - #[doc = "pll3_q selected as peripheral clock"] - pub const PLL3_Q: Self = Self(0x02); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x03); - #[doc = "csi_ker selected as peripheral clock"] - pub const CSI_KER: Self = Self(0x04); - #[doc = "LSE selected as peripheral clock"] - pub const LSE: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Stopwuck(pub u8); - impl Stopwuck { - #[doc = "HSI selected as wake up clock from system Stop"] - pub const HSI: Self = Self(0); - #[doc = "CSI selected as wake up clock from system Stop"] - pub const CSI: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb4lpenrSyscfglpen(pub u8); - impl C1Apb4lpenrSyscfglpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Ahb4enrGpioaen(pub u8); - impl C1Ahb4enrGpioaen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb1llpenrTim2lpen(pub u8); - impl Apb1llpenrTim2lpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb1lenrTim2en(pub u8); - impl Apb1lenrTim2en { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Syscfgrst(pub u8); - impl Syscfgrst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mco2(pub u8); - impl Mco2 { - #[doc = "System clock selected for micro-controller clock output"] - pub const SYSCLK: Self = Self(0); - #[doc = "pll2_p selected for micro-controller clock output"] - pub const PLL2_P: Self = Self(0x01); - #[doc = "HSE selected for micro-controller clock output"] - pub const HSE: Self = Self(0x02); - #[doc = "pll1_p selected for micro-controller clock output"] - pub const PLL1_P: Self = Self(0x03); - #[doc = "CSI selected for micro-controller clock output"] - pub const CSI: Self = Self(0x04); - #[doc = "LSI selected for micro-controller clock output"] - pub const LSI: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ww1rsc(pub u8); - impl Ww1rsc { - #[doc = "Clear WWDG1 scope control"] - pub const CLEAR: Self = Self(0); - #[doc = "Set WWDG1 scope control"] - pub const SET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Spi45sel(pub u8); - impl Spi45sel { - #[doc = "APB clock selected as peripheral clock"] - pub const APB: Self = Self(0); - #[doc = "pll2_q selected as peripheral clock"] - pub const PLL2_Q: Self = Self(0x01); - #[doc = "pll3_q selected as peripheral clock"] - pub const PLL3_Q: Self = Self(0x02); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x03); - #[doc = "csi_ker selected as peripheral clock"] - pub const CSI_KER: Self = Self(0x04); - #[doc = "HSE selected as peripheral clock"] - pub const HSE: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Usbsel(pub u8); - impl Usbsel { - #[doc = "Disable the kernel clock"] - pub const DISABLE: Self = Self(0); - #[doc = "pll1_q selected as peripheral clock"] - pub const PLL1_Q: Self = Self(0x01); - #[doc = "pll3_q selected as peripheral clock"] - pub const PLL3_Q: Self = Self(0x02); - #[doc = "HSI48 selected as peripheral clock"] - pub const HSI48: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bdrst(pub u8); - impl Bdrst { - #[doc = "Resets the entire VSW domain"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Tim1rst(pub u8); - impl Tim1rst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lserdyr(pub u8); - impl Lserdyr { - #[doc = "LSE oscillator not ready"] - pub const NOTREADY: Self = Self(0); - #[doc = "LSE oscillator ready"] - pub const READY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1RsrRmvf(pub u8); - impl C1RsrRmvf { - #[doc = "Not clearing the the reset flags"] - pub const NOTACTIVE: Self = Self(0); - #[doc = "Clear the reset flags"] - pub const CLEAR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb2lpenrTim1lpen(pub u8); - impl C1Apb2lpenrTim1lpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct RsrRmvf(pub u8); - impl RsrRmvf { - #[doc = "Not clearing the the reset flags"] - pub const NOTACTIVE: Self = Self(0); - #[doc = "Clear the reset flags"] - pub const CLEAR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ahb4enrGpioaen(pub u8); - impl Ahb4enrGpioaen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct RsrCpurstfr(pub u8); - impl RsrCpurstfr { - #[doc = "No reset occoured for block"] - pub const NORESETOCCOURED: Self = Self(0); - #[doc = "Reset occoured for block"] - pub const RESETOCCOURRED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Timpre(pub u8); - impl Timpre { - #[doc = "Timer kernel clock equal to 2x pclk by default"] - pub const DEFAULTX2: Self = Self(0); - #[doc = "Timer kernel clock equal to 4x pclk by default"] - pub const DEFAULTX4: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rtcsel(pub u8); - impl Rtcsel { - #[doc = "No clock"] - pub const NOCLOCK: Self = Self(0); - #[doc = "LSE oscillator clock used as RTC clock"] - pub const LSE: Self = Self(0x01); - #[doc = "LSI oscillator clock used as RTC clock"] - pub const LSI: Self = Self(0x02); - #[doc = "HSE oscillator clock divided by a prescaler used as RTC clock"] - pub const HSE: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ltdcrst(pub u8); - impl Ltdcrst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Ahb2enrDcmien(pub u8); - impl C1Ahb2enrDcmien { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pll1vcosel(pub u8); - impl Pll1vcosel { - #[doc = "VCO frequency range 192 to 836 MHz"] - pub const WIDEVCO: Self = Self(0); - #[doc = "VCO frequency range 150 to 420 MHz"] - pub const MEDIUMVCO: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Ahb3lpenrMdmalpen(pub u8); - impl C1Ahb3lpenrMdmalpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb1lenrTim2en(pub u8); - impl C1Apb1lenrTim2en { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsidivfr(pub u8); - impl Hsidivfr { - #[doc = "New HSIDIV ratio has not yet propagated to hsi_ck"] - pub const NOTPROPAGATED: Self = Self(0); - #[doc = "HSIDIV ratio has propagated to hsi_ck"] - pub const PROPAGATED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Fdcansel(pub u8); - impl Fdcansel { - #[doc = "HSE selected as peripheral clock"] - pub const HSE: Self = Self(0); - #[doc = "pll1_q selected as peripheral clock"] - pub const PLL1_Q: Self = Self(0x01); - #[doc = "pll2_q selected as peripheral clock"] - pub const PLL2_Q: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsirdyc(pub u8); - impl Lsirdyc { - #[doc = "Clear interrupt flag"] - pub const CLEAR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb1henrCrsen(pub u8); - impl Apb1henrCrsen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsirdyr(pub u8); - impl Hsirdyr { - #[doc = "Clock not ready"] - pub const NOTREADY: Self = Self(0); - #[doc = "Clock ready"] - pub const READY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsecsson(pub u8); - impl Lsecsson { - #[doc = "Clock security system on 32 kHz oscillator off"] - pub const SECURITYOFF: Self = Self(0); - #[doc = "Clock security system on 32 kHz oscillator on"] - pub const SECURITYON: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sdmmcsel(pub u8); - impl Sdmmcsel { - #[doc = "pll1_q selected as peripheral clock"] - pub const PLL1_Q: Self = Self(0); - #[doc = "pll2_r selected as peripheral clock"] - pub const PLL2_R: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ahb1lpenrDma1lpen(pub u8); - impl Ahb1lpenrDma1lpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Ahb1enrDma1en(pub u8); - impl C1Ahb1enrDma1en { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sai1sel(pub u8); - impl Sai1sel { - #[doc = "pll1_q selected as peripheral clock"] - pub const PLL1_Q: Self = Self(0); - #[doc = "pll2_p selected as peripheral clock"] - pub const PLL2_P: Self = Self(0x01); - #[doc = "pll3_p selected as peripheral clock"] - pub const PLL3_P: Self = Self(0x02); - #[doc = "I2S_CKIN selected as peripheral clock"] - pub const I2S_CKIN: Self = Self(0x03); - #[doc = "PER selected as peripheral clock"] - pub const PER: Self = Self(0x04); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct D2ppre1(pub u8); - impl D2ppre1 { - #[doc = "rcc_hclk not divided"] - pub const DIV1: Self = Self(0); - #[doc = "rcc_hclk divided by 2"] - pub const DIV2: Self = Self(0x04); - #[doc = "rcc_hclk divided by 4"] - pub const DIV4: Self = Self(0x05); - #[doc = "rcc_hclk divided by 8"] - pub const DIV8: Self = Self(0x06); - #[doc = "rcc_hclk divided by 16"] - pub const DIV16: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rngsel(pub u8); - impl Rngsel { - #[doc = "HSI48 selected as peripheral clock"] - pub const HSI48: Self = Self(0); - #[doc = "pll1_q selected as peripheral clock"] - pub const PLL1_Q: Self = Self(0x01); - #[doc = "LSE selected as peripheral clock"] - pub const LSE: Self = Self(0x02); - #[doc = "LSI selected as peripheral clock"] - pub const LSI: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Ahb4lpenrGpioalpen(pub u8); - impl C1Ahb4lpenrGpioalpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hrtimsel(pub u8); - impl Hrtimsel { - #[doc = "The HRTIM prescaler clock source is the same as other timers (rcc_timy_ker_ck)"] - pub const TIMY_KER: Self = Self(0); - #[doc = "The HRTIM prescaler clock source is the CPU clock (c_ck)"] - pub const C_CK: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsebyp(pub u8); - impl Hsebyp { - #[doc = "HSE crystal oscillator not bypassed"] - pub const NOTBYPASSED: Self = Self(0); - #[doc = "HSE crystal oscillator bypassed with external clock"] - pub const BYPASSED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Tim2rst(pub u8); - impl Tim2rst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lseon(pub u8); - impl Lseon { - #[doc = "LSE oscillator Off"] - pub const OFF: Self = Self(0); - #[doc = "LSE oscillator On"] - pub const ON: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Usart16sel(pub u8); - impl Usart16sel { - #[doc = "rcc_pclk2 selected as peripheral clock"] - pub const RCC_PCLK2: Self = Self(0); - #[doc = "pll2_q selected as peripheral clock"] - pub const PLL2_Q: Self = Self(0x01); - #[doc = "pll3_q selected as peripheral clock"] - pub const PLL3_Q: Self = Self(0x02); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x03); - #[doc = "csi_ker selected as peripheral clock"] - pub const CSI_KER: Self = Self(0x04); - #[doc = "LSE selected as peripheral clock"] - pub const LSE: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Ahb2lpenrDcmilpen(pub u8); - impl C1Ahb2lpenrDcmilpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb3enrLtdcen(pub u8); - impl Apb3enrLtdcen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lptim1sel(pub u8); - impl Lptim1sel { - #[doc = "rcc_pclk1 selected as peripheral clock"] - pub const RCC_PCLK1: Self = Self(0); - #[doc = "pll2_p selected as peripheral clock"] - pub const PLL2_P: Self = Self(0x01); - #[doc = "pll3_r selected as peripheral clock"] - pub const PLL3_R: Self = Self(0x02); - #[doc = "LSE selected as peripheral clock"] - pub const LSE: Self = Self(0x03); - #[doc = "LSI selected as peripheral clock"] - pub const LSI: Self = Self(0x04); - #[doc = "PER selected as peripheral clock"] - pub const PER: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Adcsel(pub u8); - impl Adcsel { - #[doc = "pll2_p selected as peripheral clock"] - pub const PLL2_P: Self = Self(0); - #[doc = "pll3_r selected as peripheral clock"] - pub const PLL3_R: Self = Self(0x01); - #[doc = "PER selected as peripheral clock"] - pub const PER: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Divp1(pub u8); - impl Divp1 { - #[doc = "pll_p_ck = vco_ck"] - pub const DIV1: Self = Self(0); - #[doc = "pll_p_ck = vco_ck / 2"] - pub const DIV2: Self = Self(0x01); - #[doc = "pll_p_ck = vco_ck / 4"] - pub const DIV4: Self = Self(0x03); - #[doc = "pll_p_ck = vco_ck / 6"] - pub const DIV6: Self = Self(0x05); - #[doc = "pll_p_ck = vco_ck / 8"] - pub const DIV8: Self = Self(0x07); - #[doc = "pll_p_ck = vco_ck / 10"] - pub const DIV10: Self = Self(0x09); - #[doc = "pll_p_ck = vco_ck / 12"] - pub const DIV12: Self = Self(0x0b); - #[doc = "pll_p_ck = vco_ck / 14"] - pub const DIV14: Self = Self(0x0d); - #[doc = "pll_p_ck = vco_ck / 16"] - pub const DIV16: Self = Self(0x0f); - #[doc = "pll_p_ck = vco_ck / 18"] - pub const DIV18: Self = Self(0x11); - #[doc = "pll_p_ck = vco_ck / 20"] - pub const DIV20: Self = Self(0x13); - #[doc = "pll_p_ck = vco_ck / 22"] - pub const DIV22: Self = Self(0x15); - #[doc = "pll_p_ck = vco_ck / 24"] - pub const DIV24: Self = Self(0x17); - #[doc = "pll_p_ck = vco_ck / 26"] - pub const DIV26: Self = Self(0x19); - #[doc = "pll_p_ck = vco_ck / 28"] - pub const DIV28: Self = Self(0x1b); - #[doc = "pll_p_ck = vco_ck / 30"] - pub const DIV30: Self = Self(0x1d); - #[doc = "pll_p_ck = vco_ck / 32"] - pub const DIV32: Self = Self(0x1f); - #[doc = "pll_p_ck = vco_ck / 34"] - pub const DIV34: Self = Self(0x21); - #[doc = "pll_p_ck = vco_ck / 36"] - pub const DIV36: Self = Self(0x23); - #[doc = "pll_p_ck = vco_ck / 38"] - pub const DIV38: Self = Self(0x25); - #[doc = "pll_p_ck = vco_ck / 40"] - pub const DIV40: Self = Self(0x27); - #[doc = "pll_p_ck = vco_ck / 42"] - pub const DIV42: Self = Self(0x29); - #[doc = "pll_p_ck = vco_ck / 44"] - pub const DIV44: Self = Self(0x2b); - #[doc = "pll_p_ck = vco_ck / 46"] - pub const DIV46: Self = Self(0x2d); - #[doc = "pll_p_ck = vco_ck / 48"] - pub const DIV48: Self = Self(0x2f); - #[doc = "pll_p_ck = vco_ck / 50"] - pub const DIV50: Self = Self(0x31); - #[doc = "pll_p_ck = vco_ck / 52"] - pub const DIV52: Self = Self(0x33); - #[doc = "pll_p_ck = vco_ck / 54"] - pub const DIV54: Self = Self(0x35); - #[doc = "pll_p_ck = vco_ck / 56"] - pub const DIV56: Self = Self(0x37); - #[doc = "pll_p_ck = vco_ck / 58"] - pub const DIV58: Self = Self(0x39); - #[doc = "pll_p_ck = vco_ck / 60"] - pub const DIV60: Self = Self(0x3b); - #[doc = "pll_p_ck = vco_ck / 62"] - pub const DIV62: Self = Self(0x3d); - #[doc = "pll_p_ck = vco_ck / 64"] - pub const DIV64: Self = Self(0x3f); - #[doc = "pll_p_ck = vco_ck / 66"] - pub const DIV66: Self = Self(0x41); - #[doc = "pll_p_ck = vco_ck / 68"] - pub const DIV68: Self = Self(0x43); - #[doc = "pll_p_ck = vco_ck / 70"] - pub const DIV70: Self = Self(0x45); - #[doc = "pll_p_ck = vco_ck / 72"] - pub const DIV72: Self = Self(0x47); - #[doc = "pll_p_ck = vco_ck / 74"] - pub const DIV74: Self = Self(0x49); - #[doc = "pll_p_ck = vco_ck / 76"] - pub const DIV76: Self = Self(0x4b); - #[doc = "pll_p_ck = vco_ck / 78"] - pub const DIV78: Self = Self(0x4d); - #[doc = "pll_p_ck = vco_ck / 80"] - pub const DIV80: Self = Self(0x4f); - #[doc = "pll_p_ck = vco_ck / 82"] - pub const DIV82: Self = Self(0x51); - #[doc = "pll_p_ck = vco_ck / 84"] - pub const DIV84: Self = Self(0x53); - #[doc = "pll_p_ck = vco_ck / 86"] - pub const DIV86: Self = Self(0x55); - #[doc = "pll_p_ck = vco_ck / 88"] - pub const DIV88: Self = Self(0x57); - #[doc = "pll_p_ck = vco_ck / 90"] - pub const DIV90: Self = Self(0x59); - #[doc = "pll_p_ck = vco_ck / 92"] - pub const DIV92: Self = Self(0x5b); - #[doc = "pll_p_ck = vco_ck / 94"] - pub const DIV94: Self = Self(0x5d); - #[doc = "pll_p_ck = vco_ck / 96"] - pub const DIV96: Self = Self(0x5f); - #[doc = "pll_p_ck = vco_ck / 98"] - pub const DIV98: Self = Self(0x61); - #[doc = "pll_p_ck = vco_ck / 100"] - pub const DIV100: Self = Self(0x63); - #[doc = "pll_p_ck = vco_ck / 102"] - pub const DIV102: Self = Self(0x65); - #[doc = "pll_p_ck = vco_ck / 104"] - pub const DIV104: Self = Self(0x67); - #[doc = "pll_p_ck = vco_ck / 106"] - pub const DIV106: Self = Self(0x69); - #[doc = "pll_p_ck = vco_ck / 108"] - pub const DIV108: Self = Self(0x6b); - #[doc = "pll_p_ck = vco_ck / 110"] - pub const DIV110: Self = Self(0x6d); - #[doc = "pll_p_ck = vco_ck / 112"] - pub const DIV112: Self = Self(0x6f); - #[doc = "pll_p_ck = vco_ck / 114"] - pub const DIV114: Self = Self(0x71); - #[doc = "pll_p_ck = vco_ck / 116"] - pub const DIV116: Self = Self(0x73); - #[doc = "pll_p_ck = vco_ck / 118"] - pub const DIV118: Self = Self(0x75); - #[doc = "pll_p_ck = vco_ck / 120"] - pub const DIV120: Self = Self(0x77); - #[doc = "pll_p_ck = vco_ck / 122"] - pub const DIV122: Self = Self(0x79); - #[doc = "pll_p_ck = vco_ck / 124"] - pub const DIV124: Self = Self(0x7b); - #[doc = "pll_p_ck = vco_ck / 126"] - pub const DIV126: Self = Self(0x7d); - #[doc = "pll_p_ck = vco_ck / 128"] - pub const DIV128: Self = Self(0x7f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb2enrTim1en(pub u8); - impl Apb2enrTim1en { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb1henrCrsen(pub u8); - impl C1Apb1henrCrsen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb4lpenrSyscfglpen(pub u8); - impl Apb4lpenrSyscfglpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ckpersel(pub u8); - impl Ckpersel { - #[doc = "HSI selected as peripheral clock"] - pub const HSI: Self = Self(0); - #[doc = "CSI selected as peripheral clock"] - pub const CSI: Self = Self(0x01); - #[doc = "HSE selected as peripheral clock"] - pub const HSE: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Swsr(pub u8); - impl Swsr { - #[doc = "HSI oscillator used as system clock"] - pub const HSI: Self = Self(0); - #[doc = "CSI oscillator used as system clock"] - pub const CSI: Self = Self(0x01); - #[doc = "HSE oscillator used as system clock"] - pub const HSE: Self = Self(0x02); - #[doc = "PLL1 used as system clock"] - pub const PLL1: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb2enrTim1en(pub u8); - impl C1Apb2enrTim1en { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Spi6sel(pub u8); - impl Spi6sel { - #[doc = "rcc_pclk4 selected as peripheral clock"] - pub const RCC_PCLK4: Self = Self(0); - #[doc = "pll2_q selected as peripheral clock"] - pub const PLL2_Q: Self = Self(0x01); - #[doc = "pll3_q selected as peripheral clock"] - pub const PLL3_Q: Self = Self(0x02); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x03); - #[doc = "csi_ker selected as peripheral clock"] - pub const CSI_KER: Self = Self(0x04); - #[doc = "HSE selected as peripheral clock"] - pub const HSE: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bdmaamen(pub u8); - impl Bdmaamen { - #[doc = "Clock disabled in autonomous mode"] - pub const DISABLED: Self = Self(0); - #[doc = "Clock enabled in autonomous mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dma1rst(pub u8); - impl Dma1rst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Apb4enrSyscfgen(pub u8); - impl C1Apb4enrSyscfgen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lptim2sel(pub u8); - impl Lptim2sel { - #[doc = "rcc_pclk4 selected as peripheral clock"] - pub const RCC_PCLK4: Self = Self(0); - #[doc = "pll2_p selected as peripheral clock"] - pub const PLL2_P: Self = Self(0x01); - #[doc = "pll3_r selected as peripheral clock"] - pub const PLL3_R: Self = Self(0x02); - #[doc = "LSE selected as peripheral clock"] - pub const LSE: Self = Self(0x03); - #[doc = "LSI selected as peripheral clock"] - pub const LSI: Self = Self(0x04); - #[doc = "PER selected as peripheral clock"] - pub const PER: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pll1fracen(pub u8); - impl Pll1fracen { - #[doc = "Reset latch to tranfer FRACN to the Sigma-Delta modulator"] - pub const RESET: Self = Self(0); - #[doc = "Set latch to tranfer FRACN to the Sigma-Delta modulator"] - pub const SET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct I2c4sel(pub u8); - impl I2c4sel { - #[doc = "rcc_pclk4 selected as peripheral clock"] - pub const RCC_PCLK4: Self = Self(0); - #[doc = "pll3_r selected as peripheral clock"] - pub const PLL3_R: Self = Self(0x01); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x02); - #[doc = "csi_ker selected as peripheral clock"] - pub const CSI_KER: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lpuart1sel(pub u8); - impl Lpuart1sel { - #[doc = "rcc_pclk_d3 selected as peripheral clock"] - pub const RCC_PCLK_D3: Self = Self(0); - #[doc = "pll2_q selected as peripheral clock"] - pub const PLL2_Q: Self = Self(0x01); - #[doc = "pll3_q selected as peripheral clock"] - pub const PLL3_Q: Self = Self(0x02); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x03); - #[doc = "csi_ker selected as peripheral clock"] - pub const CSI_KER: Self = Self(0x04); - #[doc = "LSE selected as peripheral clock"] - pub const LSE: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sw(pub u8); - impl Sw { - #[doc = "HSI selected as system clock"] - pub const HSI: Self = Self(0); - #[doc = "CSI selected as system clock"] - pub const CSI: Self = Self(0x01); - #[doc = "HSE selected as system clock"] - pub const HSE: Self = Self(0x02); - #[doc = "PLL1 selected as system clock"] - pub const PLL1: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct I2c123sel(pub u8); - impl I2c123sel { - #[doc = "rcc_pclk1 selected as peripheral clock"] - pub const RCC_PCLK1: Self = Self(0); - #[doc = "pll3_r selected as peripheral clock"] - pub const PLL3_R: Self = Self(0x01); - #[doc = "hsi_ker selected as peripheral clock"] - pub const HSI_KER: Self = Self(0x02); - #[doc = "csi_ker selected as peripheral clock"] - pub const CSI_KER: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crsrst(pub u8); - impl Crsrst { - #[doc = "Reset the selected module"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Apb1hlpenrCrslpen(pub u8); - impl Apb1hlpenrCrslpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsedrv(pub u8); - impl Lsedrv { - #[doc = "Lowest LSE oscillator driving capability"] - pub const LOWEST: Self = Self(0); - #[doc = "Medium low LSE oscillator driving capability"] - pub const MEDIUMLOW: Self = Self(0x01); - #[doc = "Medium high LSE oscillator driving capability"] - pub const MEDIUMHIGH: Self = Self(0x02); - #[doc = "Highest LSE oscillator driving capability"] - pub const HIGHEST: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ahb2lpenrDcmilpen(pub u8); - impl Ahb2lpenrDcmilpen { - #[doc = "The selected clock is disabled during csleep mode"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled during csleep mode"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pll1rge(pub u8); - impl Pll1rge { - #[doc = "Frequency is between 1 and 2 MHz"] - pub const RANGE1: Self = Self(0); - #[doc = "Frequency is between 2 and 4 MHz"] - pub const RANGE2: Self = Self(0x01); - #[doc = "Frequency is between 4 and 8 MHz"] - pub const RANGE4: Self = Self(0x02); - #[doc = "Frequency is between 8 and 16 MHz"] - pub const RANGE8: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dfsdm1sel(pub u8); - impl Dfsdm1sel { - #[doc = "rcc_pclk2 selected as peripheral clock"] - pub const RCC_PCLK2: Self = Self(0); - #[doc = "System clock selected as peripheral clock"] - pub const SYS: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct C1Ahb3enrMdmaen(pub u8); - impl C1Ahb3enrMdmaen { - #[doc = "The selected clock is disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "The selected clock is enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct D3ppre(pub u8); - impl D3ppre { - #[doc = "rcc_hclk not divided"] - pub const DIV1: Self = Self(0); - #[doc = "rcc_hclk divided by 2"] - pub const DIV2: Self = Self(0x04); - #[doc = "rcc_hclk divided by 4"] - pub const DIV4: Self = Self(0x05); - #[doc = "rcc_hclk divided by 8"] - pub const DIV8: Self = Self(0x06); - #[doc = "rcc_hclk divided by 16"] - pub const DIV16: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hsidiv(pub u8); - impl Hsidiv { - #[doc = "No division"] - pub const DIV1: Self = Self(0); - #[doc = "Division by 2"] - pub const DIV2: Self = Self(0x01); - #[doc = "Division by 4"] - pub const DIV4: Self = Self(0x02); - #[doc = "Division by 8"] - pub const DIV8: Self = Self(0x03); - } - } -} -pub mod dma_v1 { - use crate::generic::*; - #[doc = "Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers"] - #[derive(Copy, Clone)] - pub struct Ch(pub *mut u8); - unsafe impl Send for Ch {} - unsafe impl Sync for Ch {} - impl Ch { - #[doc = "DMA channel configuration register (DMA_CCR)"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "DMA channel 1 number of data register"] - pub fn ndtr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "DMA channel 1 peripheral address register"] - pub fn par(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "DMA channel 1 memory address register"] - pub fn mar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - } - #[doc = "DMA controller"] - #[derive(Copy, Clone)] - pub struct Dma(pub *mut u8); - unsafe impl Send for Dma {} - unsafe impl Sync for Dma {} - impl Dma { - #[doc = "DMA interrupt status register (DMA_ISR)"] - pub fn isr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "DMA interrupt flag clear register (DMA_IFCR)"] - pub fn ifcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers"] - pub fn ch(self, n: usize) -> Ch { - assert!(n < 7usize); - unsafe { Ch(self.0.add(8usize + n * 20usize)) } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Size(pub u8); - impl Size { - #[doc = "8-bit size"] - pub const BITS8: Self = Self(0); - #[doc = "16-bit size"] - pub const BITS16: Self = Self(0x01); - #[doc = "32-bit size"] - pub const BITS32: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Inc(pub u8); - impl Inc { - #[doc = "Increment mode disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Increment mode enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Memmem(pub u8); - impl Memmem { - #[doc = "Memory to memory mode disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Memory to memory mode enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dir(pub u8); - impl Dir { - #[doc = "Read from peripheral"] - pub const FROMPERIPHERAL: Self = Self(0); - #[doc = "Read from memory"] - pub const FROMMEMORY: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pl(pub u8); - impl Pl { - #[doc = "Low priority"] - pub const LOW: Self = Self(0); - #[doc = "Medium priority"] - pub const MEDIUM: Self = Self(0x01); - #[doc = "High priority"] - pub const HIGH: Self = Self(0x02); - #[doc = "Very high priority"] - pub const VERYHIGH: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Circ(pub u8); - impl Circ { - #[doc = "Circular buffer disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Circular buffer enabled"] - pub const ENABLED: Self = Self(0x01); - } - } - pub mod regs { - use crate::generic::*; - #[doc = "DMA interrupt status register (DMA_ISR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Isr(pub u32); - impl Isr { - #[doc = "Channel 1 Global interrupt flag"] - pub fn gif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Global interrupt flag"] - pub fn set_gif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Transfer Complete flag"] - pub fn tcif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 1usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Transfer Complete flag"] - pub fn set_tcif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Half Transfer Complete flag"] - pub fn htif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Half Transfer Complete flag"] - pub fn set_htif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Transfer Error flag"] - pub fn teif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 3usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Transfer Error flag"] - pub fn set_teif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 3usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Isr { - fn default() -> Isr { - Isr(0) - } - } - #[doc = "DMA channel 1 number of data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ndtr(pub u32); - impl Ndtr { - #[doc = "Number of data to transfer"] - pub const fn ndt(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Number of data to transfer"] - pub fn set_ndt(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Ndtr { - fn default() -> Ndtr { - Ndtr(0) - } - } - #[doc = "DMA channel configuration register (DMA_CCR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Channel enable"] - pub const fn en(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Channel enable"] - pub fn set_en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Transfer complete interrupt enable"] - pub const fn tcie(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Transfer complete interrupt enable"] - pub fn set_tcie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Half Transfer interrupt enable"] - pub const fn htie(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Half Transfer interrupt enable"] - pub fn set_htie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Transfer error interrupt enable"] - pub const fn teie(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Transfer error interrupt enable"] - pub fn set_teie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Data transfer direction"] - pub const fn dir(&self) -> super::vals::Dir { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Dir(val as u8) - } - #[doc = "Data transfer direction"] - pub fn set_dir(&mut self, val: super::vals::Dir) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Circular mode"] - pub const fn circ(&self) -> super::vals::Circ { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Circ(val as u8) - } - #[doc = "Circular mode"] - pub fn set_circ(&mut self, val: super::vals::Circ) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Peripheral increment mode"] - pub const fn pinc(&self) -> super::vals::Inc { - let val = (self.0 >> 6usize) & 0x01; - super::vals::Inc(val as u8) - } - #[doc = "Peripheral increment mode"] - pub fn set_pinc(&mut self, val: super::vals::Inc) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val.0 as u32) & 0x01) << 6usize); - } - #[doc = "Memory increment mode"] - pub const fn minc(&self) -> super::vals::Inc { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Inc(val as u8) - } - #[doc = "Memory increment mode"] - pub fn set_minc(&mut self, val: super::vals::Inc) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Peripheral size"] - pub const fn psize(&self) -> super::vals::Size { - let val = (self.0 >> 8usize) & 0x03; - super::vals::Size(val as u8) - } - #[doc = "Peripheral size"] - pub fn set_psize(&mut self, val: super::vals::Size) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val.0 as u32) & 0x03) << 8usize); - } - #[doc = "Memory size"] - pub const fn msize(&self) -> super::vals::Size { - let val = (self.0 >> 10usize) & 0x03; - super::vals::Size(val as u8) - } - #[doc = "Memory size"] - pub fn set_msize(&mut self, val: super::vals::Size) { - self.0 = (self.0 & !(0x03 << 10usize)) | (((val.0 as u32) & 0x03) << 10usize); - } - #[doc = "Channel Priority level"] - pub const fn pl(&self) -> super::vals::Pl { - let val = (self.0 >> 12usize) & 0x03; - super::vals::Pl(val as u8) - } - #[doc = "Channel Priority level"] - pub fn set_pl(&mut self, val: super::vals::Pl) { - self.0 = (self.0 & !(0x03 << 12usize)) | (((val.0 as u32) & 0x03) << 12usize); - } - #[doc = "Memory to memory mode"] - pub const fn mem2mem(&self) -> super::vals::Memmem { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Memmem(val as u8) - } - #[doc = "Memory to memory mode"] - pub fn set_mem2mem(&mut self, val: super::vals::Memmem) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - #[doc = "DMA interrupt flag clear register (DMA_IFCR)"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ifcr(pub u32); - impl Ifcr { - #[doc = "Channel 1 Global interrupt clear"] - pub fn cgif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Global interrupt clear"] - pub fn set_cgif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Transfer Complete clear"] - pub fn ctcif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 1usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Transfer Complete clear"] - pub fn set_ctcif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 1usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Half Transfer clear"] - pub fn chtif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 2usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Half Transfer clear"] - pub fn set_chtif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 2usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Channel 1 Transfer Error clear"] - pub fn cteif(&self, n: usize) -> bool { - assert!(n < 7usize); - let offs = 3usize + n * 4usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Channel 1 Transfer Error clear"] - pub fn set_cteif(&mut self, n: usize, val: bool) { - assert!(n < 7usize); - let offs = 3usize + n * 4usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Ifcr { - fn default() -> Ifcr { - Ifcr(0) - } - } - } -} -pub mod dma_v2 { - use crate::generic::*; - #[doc = "DMA controller"] - #[derive(Copy, Clone)] - pub struct Dma(pub *mut u8); - unsafe impl Send for Dma {} - unsafe impl Sync for Dma {} - impl Dma { - #[doc = "low interrupt status register"] - pub fn isr(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(0usize + n * 4usize)) } - } - #[doc = "low interrupt flag clear register"] - pub fn ifcr(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } - } - #[doc = "Stream cluster: S?CR, S?NDTR, S?M0AR, S?M1AR and S?FCR registers"] - pub fn st(self, n: usize) -> St { - assert!(n < 8usize); - unsafe { St(self.0.add(16usize + n * 24usize)) } - } - } - #[doc = "Stream cluster: S?CR, S?NDTR, S?M0AR, S?M1AR and S?FCR registers"] - #[derive(Copy, Clone)] - pub struct St(pub *mut u8); - unsafe impl Send for St {} - unsafe impl Sync for St {} - impl St { - #[doc = "stream x configuration register"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "stream x number of data register"] - pub fn ndtr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "stream x peripheral address register"] - pub fn par(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "stream x memory 0 address register"] - pub fn m0ar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "stream x memory 1 address register"] - pub fn m1ar(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "stream x FIFO control register"] - pub fn fcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pfctrl(pub u8); - impl Pfctrl { - #[doc = "The DMA is the flow controller"] - pub const DMA: Self = Self(0); - #[doc = "The peripheral is the flow controller"] - pub const PERIPHERAL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dmdis(pub u8); - impl Dmdis { - #[doc = "Direct mode is enabled"] - pub const ENABLED: Self = Self(0); - #[doc = "Direct mode is disabled"] - pub const DISABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Circ(pub u8); - impl Circ { - #[doc = "Circular mode disabled"] - pub const DISABLED: Self = Self(0); - #[doc = "Circular mode enabled"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dbm(pub u8); - impl Dbm { - #[doc = "No buffer switching at the end of transfer"] - pub const DISABLED: Self = Self(0); - #[doc = "Memory target switched at the end of the DMA transfer"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Fs(pub u8); - impl Fs { - #[doc = "0 < fifo_level < 1/4"] - pub const QUARTER1: Self = Self(0); - #[doc = "1/4 <= fifo_level < 1/2"] - pub const QUARTER2: Self = Self(0x01); - #[doc = "1/2 <= fifo_level < 3/4"] - pub const QUARTER3: Self = Self(0x02); - #[doc = "3/4 <= fifo_level < full"] - pub const QUARTER4: Self = Self(0x03); - #[doc = "FIFO is empty"] - pub const EMPTY: Self = Self(0x04); - #[doc = "FIFO is full"] - pub const FULL: Self = Self(0x05); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ct(pub u8); - impl Ct { - #[doc = "The current target memory is Memory 0"] - pub const MEMORY0: Self = Self(0); - #[doc = "The current target memory is Memory 1"] - pub const MEMORY1: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Fth(pub u8); - impl Fth { - #[doc = "1/4 full FIFO"] - pub const QUARTER: Self = Self(0); - #[doc = "1/2 full FIFO"] - pub const HALF: Self = Self(0x01); - #[doc = "3/4 full FIFO"] - pub const THREEQUARTERS: Self = Self(0x02); - #[doc = "Full FIFO"] - pub const FULL: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pl(pub u8); - impl Pl { - #[doc = "Low"] - pub const LOW: Self = Self(0); - #[doc = "Medium"] - pub const MEDIUM: Self = Self(0x01); - #[doc = "High"] - pub const HIGH: Self = Self(0x02); - #[doc = "Very high"] - pub const VERYHIGH: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dir(pub u8); - impl Dir { - #[doc = "Peripheral-to-memory"] - pub const PERIPHERALTOMEMORY: Self = Self(0); - #[doc = "Memory-to-peripheral"] - pub const MEMORYTOPERIPHERAL: Self = Self(0x01); - #[doc = "Memory-to-memory"] - pub const MEMORYTOMEMORY: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Burst(pub u8); - impl Burst { - #[doc = "Single transfer"] - pub const SINGLE: Self = Self(0); - #[doc = "Incremental burst of 4 beats"] - pub const INCR4: Self = Self(0x01); - #[doc = "Incremental burst of 8 beats"] - pub const INCR8: Self = Self(0x02); - #[doc = "Incremental burst of 16 beats"] - pub const INCR16: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Size(pub u8); - impl Size { - #[doc = "Byte (8-bit)"] - pub const BITS8: Self = Self(0); - #[doc = "Half-word (16-bit)"] - pub const BITS16: Self = Self(0x01); - #[doc = "Word (32-bit)"] - pub const BITS32: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Inc(pub u8); - impl Inc { - #[doc = "Address pointer is fixed"] - pub const FIXED: Self = Self(0); - #[doc = "Address pointer is incremented after each data transfer"] - pub const INCREMENTED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pincos(pub u8); - impl Pincos { - #[doc = "The offset size for the peripheral address calculation is linked to the PSIZE"] - pub const PSIZE: Self = Self(0); - #[doc = "The offset size for the peripheral address calculation is fixed to 4 (32-bit alignment)"] - pub const FIXED4: Self = Self(0x01); - } - } - pub mod regs { - use crate::generic::*; - #[doc = "stream x configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Stream enable / flag stream ready when read low"] - pub const fn en(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Stream enable / flag stream ready when read low"] - pub fn set_en(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Direct mode error interrupt enable"] - pub const fn dmeie(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Direct mode error interrupt enable"] - pub fn set_dmeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Transfer error interrupt enable"] - pub const fn teie(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Transfer error interrupt enable"] - pub fn set_teie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Half transfer interrupt enable"] - pub const fn htie(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Half transfer interrupt enable"] - pub fn set_htie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Transfer complete interrupt enable"] - pub const fn tcie(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Transfer complete interrupt enable"] - pub fn set_tcie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Peripheral flow controller"] - pub const fn pfctrl(&self) -> super::vals::Pfctrl { - let val = (self.0 >> 5usize) & 0x01; - super::vals::Pfctrl(val as u8) - } - #[doc = "Peripheral flow controller"] - pub fn set_pfctrl(&mut self, val: super::vals::Pfctrl) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val.0 as u32) & 0x01) << 5usize); - } - #[doc = "Data transfer direction"] - pub const fn dir(&self) -> super::vals::Dir { - let val = (self.0 >> 6usize) & 0x03; - super::vals::Dir(val as u8) - } - #[doc = "Data transfer direction"] - pub fn set_dir(&mut self, val: super::vals::Dir) { - self.0 = (self.0 & !(0x03 << 6usize)) | (((val.0 as u32) & 0x03) << 6usize); - } - #[doc = "Circular mode"] - pub const fn circ(&self) -> super::vals::Circ { - let val = (self.0 >> 8usize) & 0x01; - super::vals::Circ(val as u8) - } - #[doc = "Circular mode"] - pub fn set_circ(&mut self, val: super::vals::Circ) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val.0 as u32) & 0x01) << 8usize); - } - #[doc = "Peripheral increment mode"] - pub const fn pinc(&self) -> super::vals::Inc { - let val = (self.0 >> 9usize) & 0x01; - super::vals::Inc(val as u8) - } - #[doc = "Peripheral increment mode"] - pub fn set_pinc(&mut self, val: super::vals::Inc) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val.0 as u32) & 0x01) << 9usize); - } - #[doc = "Memory increment mode"] - pub const fn minc(&self) -> super::vals::Inc { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Inc(val as u8) - } - #[doc = "Memory increment mode"] - pub fn set_minc(&mut self, val: super::vals::Inc) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Peripheral data size"] - pub const fn psize(&self) -> super::vals::Size { - let val = (self.0 >> 11usize) & 0x03; - super::vals::Size(val as u8) - } - #[doc = "Peripheral data size"] - pub fn set_psize(&mut self, val: super::vals::Size) { - self.0 = (self.0 & !(0x03 << 11usize)) | (((val.0 as u32) & 0x03) << 11usize); - } - #[doc = "Memory data size"] - pub const fn msize(&self) -> super::vals::Size { - let val = (self.0 >> 13usize) & 0x03; - super::vals::Size(val as u8) - } - #[doc = "Memory data size"] - pub fn set_msize(&mut self, val: super::vals::Size) { - self.0 = (self.0 & !(0x03 << 13usize)) | (((val.0 as u32) & 0x03) << 13usize); - } - #[doc = "Peripheral increment offset size"] - pub const fn pincos(&self) -> super::vals::Pincos { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Pincos(val as u8) - } - #[doc = "Peripheral increment offset size"] - pub fn set_pincos(&mut self, val: super::vals::Pincos) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Priority level"] - pub const fn pl(&self) -> super::vals::Pl { - let val = (self.0 >> 16usize) & 0x03; - super::vals::Pl(val as u8) - } - #[doc = "Priority level"] - pub fn set_pl(&mut self, val: super::vals::Pl) { - self.0 = (self.0 & !(0x03 << 16usize)) | (((val.0 as u32) & 0x03) << 16usize); - } - #[doc = "Double buffer mode"] - pub const fn dbm(&self) -> super::vals::Dbm { - let val = (self.0 >> 18usize) & 0x01; - super::vals::Dbm(val as u8) - } - #[doc = "Double buffer mode"] - pub fn set_dbm(&mut self, val: super::vals::Dbm) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val.0 as u32) & 0x01) << 18usize); - } - #[doc = "Current target (only in double buffer mode)"] - pub const fn ct(&self) -> super::vals::Ct { - let val = (self.0 >> 19usize) & 0x01; - super::vals::Ct(val as u8) - } - #[doc = "Current target (only in double buffer mode)"] - pub fn set_ct(&mut self, val: super::vals::Ct) { - self.0 = (self.0 & !(0x01 << 19usize)) | (((val.0 as u32) & 0x01) << 19usize); - } - #[doc = "Peripheral burst transfer configuration"] - pub const fn pburst(&self) -> super::vals::Burst { - let val = (self.0 >> 21usize) & 0x03; - super::vals::Burst(val as u8) - } - #[doc = "Peripheral burst transfer configuration"] - pub fn set_pburst(&mut self, val: super::vals::Burst) { - self.0 = (self.0 & !(0x03 << 21usize)) | (((val.0 as u32) & 0x03) << 21usize); - } - #[doc = "Memory burst transfer configuration"] - pub const fn mburst(&self) -> super::vals::Burst { - let val = (self.0 >> 23usize) & 0x03; - super::vals::Burst(val as u8) - } - #[doc = "Memory burst transfer configuration"] - pub fn set_mburst(&mut self, val: super::vals::Burst) { - self.0 = (self.0 & !(0x03 << 23usize)) | (((val.0 as u32) & 0x03) << 23usize); - } - #[doc = "Channel selection"] - pub const fn chsel(&self) -> u8 { - let val = (self.0 >> 25usize) & 0x0f; - val as u8 - } - #[doc = "Channel selection"] - pub fn set_chsel(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 25usize)) | (((val as u32) & 0x0f) << 25usize); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - #[doc = "stream x number of data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ndtr(pub u32); - impl Ndtr { - #[doc = "Number of data items to transfer"] - pub const fn ndt(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Number of data items to transfer"] - pub fn set_ndt(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Ndtr { - fn default() -> Ndtr { - Ndtr(0) - } - } - #[doc = "stream x FIFO control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Fcr(pub u32); - impl Fcr { - #[doc = "FIFO threshold selection"] - pub const fn fth(&self) -> super::vals::Fth { - let val = (self.0 >> 0usize) & 0x03; - super::vals::Fth(val as u8) - } - #[doc = "FIFO threshold selection"] - pub fn set_fth(&mut self, val: super::vals::Fth) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val.0 as u32) & 0x03) << 0usize); - } - #[doc = "Direct mode disable"] - pub const fn dmdis(&self) -> super::vals::Dmdis { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Dmdis(val as u8) - } - #[doc = "Direct mode disable"] - pub fn set_dmdis(&mut self, val: super::vals::Dmdis) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "FIFO status"] - pub const fn fs(&self) -> super::vals::Fs { - let val = (self.0 >> 3usize) & 0x07; - super::vals::Fs(val as u8) - } - #[doc = "FIFO status"] - pub fn set_fs(&mut self, val: super::vals::Fs) { - self.0 = (self.0 & !(0x07 << 3usize)) | (((val.0 as u32) & 0x07) << 3usize); - } - #[doc = "FIFO error interrupt enable"] - pub const fn feie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "FIFO error interrupt enable"] - pub fn set_feie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for Fcr { - fn default() -> Fcr { - Fcr(0) - } - } - #[doc = "interrupt register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ixr(pub u32); - impl Ixr { - #[doc = "Stream x FIFO error interrupt flag (x=3..0)"] - pub fn feif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 0usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x FIFO error interrupt flag (x=3..0)"] - pub fn set_feif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 0usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Stream x direct mode error interrupt flag (x=3..0)"] - pub fn dmeif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 2usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x direct mode error interrupt flag (x=3..0)"] - pub fn set_dmeif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 2usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Stream x transfer error interrupt flag (x=3..0)"] - pub fn teif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 3usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x transfer error interrupt flag (x=3..0)"] - pub fn set_teif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 3usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Stream x half transfer interrupt flag (x=3..0)"] - pub fn htif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 4usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x half transfer interrupt flag (x=3..0)"] - pub fn set_htif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 4usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Stream x transfer complete interrupt flag (x = 3..0)"] - pub fn tcif(&self, n: usize) -> bool { - assert!(n < 4usize); - let offs = 5usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Stream x transfer complete interrupt flag (x = 3..0)"] - pub fn set_tcif(&mut self, n: usize, val: bool) { - assert!(n < 4usize); - let offs = 5usize + ([0usize, 6usize, 16usize, 22usize][n] as usize); - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Ixr { - fn default() -> Ixr { - Ixr(0) - } - } - } -} -pub mod dbgmcu_h7 { - use crate::generic::*; - #[doc = "Debug support"] - #[derive(Copy, Clone)] - pub struct Dbgmcu(pub *mut u8); - unsafe impl Send for Dbgmcu {} - unsafe impl Sync for Dbgmcu {} - impl Dbgmcu { - #[doc = "Identity code"] - pub fn idc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "Configuration register"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "APB3 peripheral freeze register"] - pub fn apb3fz1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(52usize)) } - } - #[doc = "APB1L peripheral freeze register"] - pub fn apb1lfz1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(60usize)) } - } - #[doc = "APB2 peripheral freeze register"] - pub fn apb2fz1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - #[doc = "APB4 peripheral freeze register"] - pub fn apb4fz1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(84usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "APB2 peripheral freeze register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb2fz1(pub u32); - impl Apb2fz1 { - #[doc = "TIM1 stop in debug mode"] - pub const fn tim1(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "TIM1 stop in debug mode"] - pub fn set_tim1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "TIM8 stop in debug mode"] - pub const fn tim8(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "TIM8 stop in debug mode"] - pub fn set_tim8(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "TIM15 stop in debug mode"] - pub const fn tim15(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "TIM15 stop in debug mode"] - pub fn set_tim15(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "TIM16 stop in debug mode"] - pub const fn tim16(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "TIM16 stop in debug mode"] - pub fn set_tim16(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "TIM17 stop in debug mode"] - pub const fn tim17(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "TIM17 stop in debug mode"] - pub fn set_tim17(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "HRTIM stop in debug mode"] - pub const fn hrtim(&self) -> bool { - let val = (self.0 >> 29usize) & 0x01; - val != 0 - } - #[doc = "HRTIM stop in debug mode"] - pub fn set_hrtim(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); - } - } - impl Default for Apb2fz1 { - fn default() -> Apb2fz1 { - Apb2fz1(0) - } - } - #[doc = "Identity code"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idc(pub u32); - impl Idc { - #[doc = "Device ID"] - pub const fn dev_id(&self) -> u16 { - let val = (self.0 >> 0usize) & 0x0fff; - val as u16 - } - #[doc = "Device ID"] - pub fn set_dev_id(&mut self, val: u16) { - self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); - } - #[doc = "Revision ID"] - pub const fn rev_id(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Revision ID"] - pub fn set_rev_id(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for Idc { - fn default() -> Idc { - Idc(0) - } - } - #[doc = "APB3 peripheral freeze register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb3fz1(pub u32); - impl Apb3fz1 { - #[doc = "WWDG1 stop in debug mode"] - pub const fn wwdg1(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "WWDG1 stop in debug mode"] - pub fn set_wwdg1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - } - impl Default for Apb3fz1 { - fn default() -> Apb3fz1 { - Apb3fz1(0) - } - } - #[doc = "APB1L peripheral freeze register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb1lfz1(pub u32); - impl Apb1lfz1 { - #[doc = "TIM2 stop in debug mode"] - pub const fn tim2(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "TIM2 stop in debug mode"] - pub fn set_tim2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "TIM3 stop in debug mode"] - pub const fn tim3(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "TIM3 stop in debug mode"] - pub fn set_tim3(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "TIM4 stop in debug mode"] - pub const fn tim4(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "TIM4 stop in debug mode"] - pub fn set_tim4(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "TIM5 stop in debug mode"] - pub const fn tim5(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "TIM5 stop in debug mode"] - pub fn set_tim5(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "TIM6 stop in debug mode"] - pub const fn tim6(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "TIM6 stop in debug mode"] - pub fn set_tim6(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "TIM7 stop in debug mode"] - pub const fn tim7(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "TIM7 stop in debug mode"] - pub fn set_tim7(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "TIM12 stop in debug mode"] - pub const fn tim12(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "TIM12 stop in debug mode"] - pub fn set_tim12(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "TIM13 stop in debug mode"] - pub const fn tim13(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "TIM13 stop in debug mode"] - pub fn set_tim13(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "TIM14 stop in debug mode"] - pub const fn tim14(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "TIM14 stop in debug mode"] - pub fn set_tim14(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "LPTIM1 stop in debug mode"] - pub const fn lptim1(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "LPTIM1 stop in debug mode"] - pub fn set_lptim1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "I2C1 SMBUS timeout stop in debug mode"] - pub const fn i2c1(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "I2C1 SMBUS timeout stop in debug mode"] - pub fn set_i2c1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "I2C2 SMBUS timeout stop in debug mode"] - pub const fn i2c2(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "I2C2 SMBUS timeout stop in debug mode"] - pub fn set_i2c2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "I2C3 SMBUS timeout stop in debug mode"] - pub const fn i2c3(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "I2C3 SMBUS timeout stop in debug mode"] - pub fn set_i2c3(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - } - impl Default for Apb1lfz1 { - fn default() -> Apb1lfz1 { - Apb1lfz1(0) - } - } - #[doc = "APB4 peripheral freeze register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Apb4fz1(pub u32); - impl Apb4fz1 { - #[doc = "I2C4 SMBUS timeout stop in debug mode"] - pub const fn i2c4(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "I2C4 SMBUS timeout stop in debug mode"] - pub fn set_i2c4(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "LPTIM2 stop in debug mode"] - pub const fn lptim2(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "LPTIM2 stop in debug mode"] - pub fn set_lptim2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "LPTIM3 stop in debug mode"] - pub const fn lptim3(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "LPTIM3 stop in debug mode"] - pub fn set_lptim3(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "LPTIM4 stop in debug mode"] - pub const fn lptim4(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "LPTIM4 stop in debug mode"] - pub fn set_lptim4(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "LPTIM5 stop in debug mode"] - pub const fn lptim5(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "LPTIM5 stop in debug mode"] - pub fn set_lptim5(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "RTC stop in debug mode"] - pub const fn rtc(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "RTC stop in debug mode"] - pub fn set_rtc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "Independent watchdog for D1 stop in debug mode"] - pub const fn iwdg1(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "Independent watchdog for D1 stop in debug mode"] - pub fn set_iwdg1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - } - impl Default for Apb4fz1 { - fn default() -> Apb4fz1 { - Apb4fz1(0) - } - } - #[doc = "Configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Allow debug in D1 Sleep mode"] - pub const fn dbgsleep_d1(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Allow debug in D1 Sleep mode"] - pub fn set_dbgsleep_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Allow debug in D1 Stop mode"] - pub const fn dbgstop_d1(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Allow debug in D1 Stop mode"] - pub fn set_dbgstop_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Allow debug in D1 Standby mode"] - pub const fn dbgstby_d1(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Allow debug in D1 Standby mode"] - pub fn set_dbgstby_d1(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Trace clock enable enable"] - pub const fn traceclken(&self) -> bool { - let val = (self.0 >> 20usize) & 0x01; - val != 0 - } - #[doc = "Trace clock enable enable"] - pub fn set_traceclken(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); - } - #[doc = "D1 debug clock enable enable"] - pub const fn d1dbgcken(&self) -> bool { - let val = (self.0 >> 21usize) & 0x01; - val != 0 - } - #[doc = "D1 debug clock enable enable"] - pub fn set_d1dbgcken(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); - } - #[doc = "D3 debug clock enable enable"] - pub const fn d3dbgcken(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "D3 debug clock enable enable"] - pub fn set_d3dbgcken(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "External trigger output enable"] - pub const fn trgoen(&self) -> bool { - let val = (self.0 >> 28usize) & 0x01; - val != 0 - } - #[doc = "External trigger output enable"] - pub fn set_trgoen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - } -} -pub mod gpio_v2 { - use crate::generic::*; - #[doc = "General-purpose I/Os"] - #[derive(Copy, Clone)] - pub struct Gpio(pub *mut u8); - unsafe impl Send for Gpio {} - unsafe impl Sync for Gpio {} - impl Gpio { - #[doc = "GPIO port mode register"] - pub fn moder(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "GPIO port output type register"] - pub fn otyper(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "GPIO port output speed register"] - pub fn ospeedr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "GPIO port pull-up/pull-down register"] - pub fn pupdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "GPIO port input data register"] - pub fn idr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "GPIO port output data register"] - pub fn odr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "GPIO port bit set/reset register"] - pub fn bsrr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "GPIO port configuration lock register"] - pub fn lckr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(28usize)) } - } - #[doc = "GPIO alternate function register (low, high)"] - pub fn afr(self, n: usize) -> Reg { - assert!(n < 2usize); - unsafe { Reg::from_ptr(self.0.add(32usize + n * 4usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "GPIO port pull-up/pull-down register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pupdr(pub u32); - impl Pupdr { - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn pupdr(&self, n: usize) -> super::vals::Pupdr { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Pupdr(val as u8) - } - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn set_pupdr(&mut self, n: usize, val: super::vals::Pupdr) { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - } - impl Default for Pupdr { - fn default() -> Pupdr { - Pupdr(0) - } - } - #[doc = "GPIO port bit set/reset register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Bsrr(pub u32); - impl Bsrr { - #[doc = "Port x set bit y (y= 0..15)"] - pub fn bs(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Port x set bit y (y= 0..15)"] - pub fn set_bs(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - #[doc = "Port x set bit y (y= 0..15)"] - pub fn br(&self, n: usize) -> bool { - assert!(n < 16usize); - let offs = 16usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - val != 0 - } - #[doc = "Port x set bit y (y= 0..15)"] - pub fn set_br(&mut self, n: usize, val: bool) { - assert!(n < 16usize); - let offs = 16usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs); - } - } - impl Default for Bsrr { - fn default() -> Bsrr { - Bsrr(0) - } - } - #[doc = "GPIO port configuration lock register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Lckr(pub u32); - impl Lckr { - #[doc = "Port x lock bit y (y= 0..15)"] - pub fn lck(&self, n: usize) -> super::vals::Lck { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Lck(val as u8) - } - #[doc = "Port x lock bit y (y= 0..15)"] - pub fn set_lck(&mut self, n: usize, val: super::vals::Lck) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - #[doc = "Port x lock bit y (y= 0..15)"] - pub const fn lckk(&self) -> super::vals::Lckk { - let val = (self.0 >> 16usize) & 0x01; - super::vals::Lckk(val as u8) - } - #[doc = "Port x lock bit y (y= 0..15)"] - pub fn set_lckk(&mut self, val: super::vals::Lckk) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val.0 as u32) & 0x01) << 16usize); - } - } - impl Default for Lckr { - fn default() -> Lckr { - Lckr(0) - } - } - #[doc = "GPIO port output data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Odr(pub u32); - impl Odr { - #[doc = "Port output data (y = 0..15)"] - pub fn odr(&self, n: usize) -> super::vals::Odr { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Odr(val as u8) - } - #[doc = "Port output data (y = 0..15)"] - pub fn set_odr(&mut self, n: usize, val: super::vals::Odr) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Odr { - fn default() -> Odr { - Odr(0) - } - } - #[doc = "GPIO port mode register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Moder(pub u32); - impl Moder { - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn moder(&self, n: usize) -> super::vals::Moder { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Moder(val as u8) - } - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn set_moder(&mut self, n: usize, val: super::vals::Moder) { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - } - impl Default for Moder { - fn default() -> Moder { - Moder(0) - } - } - #[doc = "GPIO port output type register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Otyper(pub u32); - impl Otyper { - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn ot(&self, n: usize) -> super::vals::Ot { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Ot(val as u8) - } - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn set_ot(&mut self, n: usize, val: super::vals::Ot) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Otyper { - fn default() -> Otyper { - Otyper(0) - } - } - #[doc = "GPIO port input data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Idr(pub u32); - impl Idr { - #[doc = "Port input data (y = 0..15)"] - pub fn idr(&self, n: usize) -> super::vals::Idr { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - let val = (self.0 >> offs) & 0x01; - super::vals::Idr(val as u8) - } - #[doc = "Port input data (y = 0..15)"] - pub fn set_idr(&mut self, n: usize, val: super::vals::Idr) { - assert!(n < 16usize); - let offs = 0usize + n * 1usize; - self.0 = (self.0 & !(0x01 << offs)) | (((val.0 as u32) & 0x01) << offs); - } - } - impl Default for Idr { - fn default() -> Idr { - Idr(0) - } - } - #[doc = "GPIO alternate function register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Afr(pub u32); - impl Afr { - #[doc = "Alternate function selection for port x bit y (y = 0..15)"] - pub fn afr(&self, n: usize) -> super::vals::Afr { - assert!(n < 8usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x0f; - super::vals::Afr(val as u8) - } - #[doc = "Alternate function selection for port x bit y (y = 0..15)"] - pub fn set_afr(&mut self, n: usize, val: super::vals::Afr) { - assert!(n < 8usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val.0 as u32) & 0x0f) << offs); - } - } - impl Default for Afr { - fn default() -> Afr { - Afr(0) - } - } - #[doc = "GPIO port output speed register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ospeedr(pub u32); - impl Ospeedr { - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn ospeedr(&self, n: usize) -> super::vals::Ospeedr { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - let val = (self.0 >> offs) & 0x03; - super::vals::Ospeedr(val as u8) - } - #[doc = "Port x configuration bits (y = 0..15)"] - pub fn set_ospeedr(&mut self, n: usize, val: super::vals::Ospeedr) { - assert!(n < 16usize); - let offs = 0usize + n * 2usize; - self.0 = (self.0 & !(0x03 << offs)) | (((val.0 as u32) & 0x03) << offs); - } - } - impl Default for Ospeedr { - fn default() -> Ospeedr { - Ospeedr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Idr(pub u8); - impl Idr { - #[doc = "Input is logic low"] - pub const LOW: Self = Self(0); - #[doc = "Input is logic high"] - pub const HIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bsw(pub u8); - impl Bsw { - #[doc = "Sets the corresponding ODRx bit"] - pub const SET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Brw(pub u8); - impl Brw { - #[doc = "Resets the corresponding ODRx bit"] - pub const RESET: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lck(pub u8); - impl Lck { - #[doc = "Port configuration not locked"] - pub const UNLOCKED: Self = Self(0); - #[doc = "Port configuration locked"] - pub const LOCKED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lckk(pub u8); - impl Lckk { - #[doc = "Port configuration lock key not active"] - pub const NOTACTIVE: Self = Self(0); - #[doc = "Port configuration lock key active"] - pub const ACTIVE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Pupdr(pub u8); - impl Pupdr { - #[doc = "No pull-up, pull-down"] - pub const FLOATING: Self = Self(0); - #[doc = "Pull-up"] - pub const PULLUP: Self = Self(0x01); - #[doc = "Pull-down"] - pub const PULLDOWN: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Odr(pub u8); - impl Odr { - #[doc = "Set output to logic low"] - pub const LOW: Self = Self(0); - #[doc = "Set output to logic high"] - pub const HIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Moder(pub u8); - impl Moder { - #[doc = "Input mode (reset state)"] - pub const INPUT: Self = Self(0); - #[doc = "General purpose output mode"] - pub const OUTPUT: Self = Self(0x01); - #[doc = "Alternate function mode"] - pub const ALTERNATE: Self = Self(0x02); - #[doc = "Analog mode"] - pub const ANALOG: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Afr(pub u8); - impl Afr { - #[doc = "AF0"] - pub const AF0: Self = Self(0); - #[doc = "AF1"] - pub const AF1: Self = Self(0x01); - #[doc = "AF2"] - pub const AF2: Self = Self(0x02); - #[doc = "AF3"] - pub const AF3: Self = Self(0x03); - #[doc = "AF4"] - pub const AF4: Self = Self(0x04); - #[doc = "AF5"] - pub const AF5: Self = Self(0x05); - #[doc = "AF6"] - pub const AF6: Self = Self(0x06); - #[doc = "AF7"] - pub const AF7: Self = Self(0x07); - #[doc = "AF8"] - pub const AF8: Self = Self(0x08); - #[doc = "AF9"] - pub const AF9: Self = Self(0x09); - #[doc = "AF10"] - pub const AF10: Self = Self(0x0a); - #[doc = "AF11"] - pub const AF11: Self = Self(0x0b); - #[doc = "AF12"] - pub const AF12: Self = Self(0x0c); - #[doc = "AF13"] - pub const AF13: Self = Self(0x0d); - #[doc = "AF14"] - pub const AF14: Self = Self(0x0e); - #[doc = "AF15"] - pub const AF15: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ospeedr(pub u8); - impl Ospeedr { - #[doc = "Low speed"] - pub const LOWSPEED: Self = Self(0); - #[doc = "Medium speed"] - pub const MEDIUMSPEED: Self = Self(0x01); - #[doc = "High speed"] - pub const HIGHSPEED: Self = Self(0x02); - #[doc = "Very high speed"] - pub const VERYHIGHSPEED: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ot(pub u8); - impl Ot { - #[doc = "Output push-pull (reset state)"] - pub const PUSHPULL: Self = Self(0); - #[doc = "Output open-drain"] - pub const OPENDRAIN: Self = Self(0x01); - } - } -} -pub mod spi_v1 { - use crate::generic::*; - #[doc = "Serial peripheral interface"] - #[derive(Copy, Clone)] - pub struct Spi(pub *mut u8); - unsafe impl Send for Spi {} - unsafe impl Sync for Spi {} - impl Spi { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "CRC polynomial register"] - pub fn crcpr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "RX CRC register"] - pub fn rxcrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "TX CRC register"] - pub fn txcrcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpol(pub u8); - impl Cpol { - #[doc = "CK to 0 when idle"] - pub const IDLELOW: Self = Self(0); - #[doc = "CK to 1 when idle"] - pub const IDLEHIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Dff(pub u8); - impl Dff { - #[doc = "8-bit data frame format is selected for transmission/reception"] - pub const EIGHTBIT: Self = Self(0); - #[doc = "16-bit data frame format is selected for transmission/reception"] - pub const SIXTEENBIT: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bidimode(pub u8); - impl Bidimode { - #[doc = "2-line unidirectional data mode selected"] - pub const UNIDIRECTIONAL: Self = Self(0); - #[doc = "1-line bidirectional data mode selected"] - pub const BIDIRECTIONAL: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpha(pub u8); - impl Cpha { - #[doc = "The first clock transition is the first data capture edge"] - pub const FIRSTEDGE: Self = Self(0); - #[doc = "The second clock transition is the first data capture edge"] - pub const SECONDEDGE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsbfirst(pub u8); - impl Lsbfirst { - #[doc = "Data is transmitted/received with the MSB first"] - pub const MSBFIRST: Self = Self(0); - #[doc = "Data is transmitted/received with the LSB first"] - pub const LSBFIRST: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Bidioe(pub u8); - impl Bidioe { - #[doc = "Output disabled (receive-only mode)"] - pub const OUTPUTDISABLED: Self = Self(0); - #[doc = "Output enabled (transmit-only mode)"] - pub const OUTPUTENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mstr(pub u8); - impl Mstr { - #[doc = "Slave configuration"] - pub const SLAVE: Self = Self(0); - #[doc = "Master configuration"] - pub const MASTER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Iscfg(pub u8); - impl Iscfg { - #[doc = "Slave - transmit"] - pub const SLAVETX: Self = Self(0); - #[doc = "Slave - receive"] - pub const SLAVERX: Self = Self(0x01); - #[doc = "Master - transmit"] - pub const MASTERTX: Self = Self(0x02); - #[doc = "Master - receive"] - pub const MASTERRX: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frf(pub u8); - impl Frf { - #[doc = "SPI Motorola mode"] - pub const MOTOROLA: Self = Self(0); - #[doc = "SPI TI mode"] - pub const TI: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Frer(pub u8); - impl Frer { - #[doc = "No frame format error"] - pub const NOERROR: Self = Self(0); - #[doc = "A frame format error occurred"] - pub const ERROR: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crcnext(pub u8); - impl Crcnext { - #[doc = "Next transmit value is from Tx buffer"] - pub const TXBUFFER: Self = Self(0); - #[doc = "Next transmit value is from Tx CRC register"] - pub const CRC: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rxonly(pub u8); - impl Rxonly { - #[doc = "Full duplex (Transmit and receive)"] - pub const FULLDUPLEX: Self = Self(0); - #[doc = "Output disabled (Receive-only mode)"] - pub const OUTPUTDISABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Br(pub u8); - impl Br { - #[doc = "f_PCLK / 2"] - pub const DIV2: Self = Self(0); - #[doc = "f_PCLK / 4"] - pub const DIV4: Self = Self(0x01); - #[doc = "f_PCLK / 8"] - pub const DIV8: Self = Self(0x02); - #[doc = "f_PCLK / 16"] - pub const DIV16: Self = Self(0x03); - #[doc = "f_PCLK / 32"] - pub const DIV32: Self = Self(0x04); - #[doc = "f_PCLK / 64"] - pub const DIV64: Self = Self(0x05); - #[doc = "f_PCLK / 128"] - pub const DIV128: Self = Self(0x06); - #[doc = "f_PCLK / 256"] - pub const DIV256: Self = Self(0x07); - } - } - pub mod regs { - use crate::generic::*; - #[doc = "TX CRC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Txcrcr(pub u32); - impl Txcrcr { - #[doc = "Tx CRC register"] - pub const fn tx_crc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Tx CRC register"] - pub fn set_tx_crc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Txcrcr { - fn default() -> Txcrcr { - Txcrcr(0) - } - } - #[doc = "data register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Dr(pub u32); - impl Dr { - #[doc = "Data register"] - pub const fn dr(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Data register"] - pub fn set_dr(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Dr { - fn default() -> Dr { - Dr(0) - } - } - #[doc = "RX CRC register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rxcrcr(pub u32); - impl Rxcrcr { - #[doc = "Rx CRC register"] - pub const fn rx_crc(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Rx CRC register"] - pub fn set_rx_crc(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Rxcrcr { - fn default() -> Rxcrcr { - Rxcrcr(0) - } - } - #[doc = "CRC polynomial register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crcpr(pub u32); - impl Crcpr { - #[doc = "CRC polynomial register"] - pub const fn crcpoly(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "CRC polynomial register"] - pub fn set_crcpoly(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - } - impl Default for Crcpr { - fn default() -> Crcpr { - Crcpr(0) - } - } - #[doc = "control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Clock phase"] - pub const fn cpha(&self) -> super::vals::Cpha { - let val = (self.0 >> 0usize) & 0x01; - super::vals::Cpha(val as u8) - } - #[doc = "Clock phase"] - pub fn set_cpha(&mut self, val: super::vals::Cpha) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val.0 as u32) & 0x01) << 0usize); - } - #[doc = "Clock polarity"] - pub const fn cpol(&self) -> super::vals::Cpol { - let val = (self.0 >> 1usize) & 0x01; - super::vals::Cpol(val as u8) - } - #[doc = "Clock polarity"] - pub fn set_cpol(&mut self, val: super::vals::Cpol) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val.0 as u32) & 0x01) << 1usize); - } - #[doc = "Master selection"] - pub const fn mstr(&self) -> super::vals::Mstr { - let val = (self.0 >> 2usize) & 0x01; - super::vals::Mstr(val as u8) - } - #[doc = "Master selection"] - pub fn set_mstr(&mut self, val: super::vals::Mstr) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val.0 as u32) & 0x01) << 2usize); - } - #[doc = "Baud rate control"] - pub const fn br(&self) -> super::vals::Br { - let val = (self.0 >> 3usize) & 0x07; - super::vals::Br(val as u8) - } - #[doc = "Baud rate control"] - pub fn set_br(&mut self, val: super::vals::Br) { - self.0 = (self.0 & !(0x07 << 3usize)) | (((val.0 as u32) & 0x07) << 3usize); - } - #[doc = "SPI enable"] - pub const fn spe(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "SPI enable"] - pub fn set_spe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Frame format"] - pub const fn lsbfirst(&self) -> super::vals::Lsbfirst { - let val = (self.0 >> 7usize) & 0x01; - super::vals::Lsbfirst(val as u8) - } - #[doc = "Frame format"] - pub fn set_lsbfirst(&mut self, val: super::vals::Lsbfirst) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val.0 as u32) & 0x01) << 7usize); - } - #[doc = "Internal slave select"] - pub const fn ssi(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Internal slave select"] - pub fn set_ssi(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Software slave management"] - pub const fn ssm(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Software slave management"] - pub fn set_ssm(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Receive only"] - pub const fn rxonly(&self) -> super::vals::Rxonly { - let val = (self.0 >> 10usize) & 0x01; - super::vals::Rxonly(val as u8) - } - #[doc = "Receive only"] - pub fn set_rxonly(&mut self, val: super::vals::Rxonly) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val.0 as u32) & 0x01) << 10usize); - } - #[doc = "Data frame format"] - pub const fn dff(&self) -> super::vals::Dff { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Dff(val as u8) - } - #[doc = "Data frame format"] - pub fn set_dff(&mut self, val: super::vals::Dff) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "CRC transfer next"] - pub const fn crcnext(&self) -> super::vals::Crcnext { - let val = (self.0 >> 12usize) & 0x01; - super::vals::Crcnext(val as u8) - } - #[doc = "CRC transfer next"] - pub fn set_crcnext(&mut self, val: super::vals::Crcnext) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val.0 as u32) & 0x01) << 12usize); - } - #[doc = "Hardware CRC calculation enable"] - pub const fn crcen(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "Hardware CRC calculation enable"] - pub fn set_crcen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "Output enable in bidirectional mode"] - pub const fn bidioe(&self) -> super::vals::Bidioe { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Bidioe(val as u8) - } - #[doc = "Output enable in bidirectional mode"] - pub fn set_bidioe(&mut self, val: super::vals::Bidioe) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "Bidirectional data mode enable"] - pub const fn bidimode(&self) -> super::vals::Bidimode { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Bidimode(val as u8) - } - #[doc = "Bidirectional data mode enable"] - pub fn set_bidimode(&mut self, val: super::vals::Bidimode) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Receive buffer not empty"] - pub const fn rxne(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Receive buffer not empty"] - pub fn set_rxne(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Transmit buffer empty"] - pub const fn txe(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Transmit buffer empty"] - pub fn set_txe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "CRC error flag"] - pub const fn crcerr(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "CRC error flag"] - pub fn set_crcerr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Mode fault"] - pub const fn modf(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Mode fault"] - pub fn set_modf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Overrun flag"] - pub const fn ovr(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Overrun flag"] - pub fn set_ovr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Busy flag"] - pub const fn bsy(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Busy flag"] - pub fn set_bsy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "TI frame format error"] - pub const fn fre(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "TI frame format error"] - pub fn set_fre(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Rx buffer DMA enable"] - pub const fn rxdmaen(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Rx buffer DMA enable"] - pub fn set_rxdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Tx buffer DMA enable"] - pub const fn txdmaen(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Tx buffer DMA enable"] - pub fn set_txdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "SS output enable"] - pub const fn ssoe(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "SS output enable"] - pub fn set_ssoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Frame format"] - pub const fn frf(&self) -> super::vals::Frf { - let val = (self.0 >> 4usize) & 0x01; - super::vals::Frf(val as u8) - } - #[doc = "Frame format"] - pub fn set_frf(&mut self, val: super::vals::Frf) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val.0 as u32) & 0x01) << 4usize); - } - #[doc = "Error interrupt enable"] - pub const fn errie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Error interrupt enable"] - pub fn set_errie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "RX buffer not empty interrupt enable"] - pub const fn rxneie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "RX buffer not empty interrupt enable"] - pub fn set_rxneie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "Tx buffer empty interrupt enable"] - pub const fn txeie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "Tx buffer empty interrupt enable"] - pub fn set_txeie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - } -} -pub mod syscfg_f4 { - use crate::generic::*; - #[doc = "System configuration controller"] - #[derive(Copy, Clone)] - pub struct Syscfg(pub *mut u8); - unsafe impl Send for Syscfg {} - unsafe impl Sync for Syscfg {} - impl Syscfg { - #[doc = "memory remap register"] - pub fn memrm(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "peripheral mode configuration register"] - pub fn pmc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "external interrupt configuration register"] - pub fn exticr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } - } - #[doc = "Compensation cell control register"] - pub fn cmpcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "peripheral mode configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Pmc(pub u32); - impl Pmc { - #[doc = "ADC1DC2"] - pub const fn adc1dc2(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "ADC1DC2"] - pub fn set_adc1dc2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - #[doc = "ADC2DC2"] - pub const fn adc2dc2(&self) -> bool { - let val = (self.0 >> 17usize) & 0x01; - val != 0 - } - #[doc = "ADC2DC2"] - pub fn set_adc2dc2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); - } - #[doc = "ADC3DC2"] - pub const fn adc3dc2(&self) -> bool { - let val = (self.0 >> 18usize) & 0x01; - val != 0 - } - #[doc = "ADC3DC2"] - pub fn set_adc3dc2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); - } - #[doc = "Ethernet PHY interface selection"] - pub const fn mii_rmii_sel(&self) -> bool { - let val = (self.0 >> 23usize) & 0x01; - val != 0 - } - #[doc = "Ethernet PHY interface selection"] - pub fn set_mii_rmii_sel(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); - } - } - impl Default for Pmc { - fn default() -> Pmc { - Pmc(0) - } - } - #[doc = "external interrupt configuration register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Exticr(pub u32); - impl Exticr { - #[doc = "EXTI x configuration"] - pub fn exti(&self, n: usize) -> u8 { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x0f; - val as u8 - } - #[doc = "EXTI x configuration"] - pub fn set_exti(&mut self, n: usize, val: u8) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val as u32) & 0x0f) << offs); - } - } - impl Default for Exticr { - fn default() -> Exticr { - Exticr(0) - } - } - #[doc = "memory remap register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Memrm(pub u32); - impl Memrm { - #[doc = "Memory mapping selection"] - pub const fn mem_mode(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x07; - val as u8 - } - #[doc = "Memory mapping selection"] - pub fn set_mem_mode(&mut self, val: u8) { - self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); - } - #[doc = "Flash bank mode selection"] - pub const fn fb_mode(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Flash bank mode selection"] - pub fn set_fb_mode(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "FMC memory mapping swap"] - pub const fn swp_fmc(&self) -> u8 { - let val = (self.0 >> 10usize) & 0x03; - val as u8 - } - #[doc = "FMC memory mapping swap"] - pub fn set_swp_fmc(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 10usize)) | (((val as u32) & 0x03) << 10usize); - } - } - impl Default for Memrm { - fn default() -> Memrm { - Memrm(0) - } - } - #[doc = "Compensation cell control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cmpcr(pub u32); - impl Cmpcr { - #[doc = "Compensation cell power-down"] - pub const fn cmp_pd(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Compensation cell power-down"] - pub fn set_cmp_pd(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "READY"] - pub const fn ready(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "READY"] - pub fn set_ready(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - } - impl Default for Cmpcr { - fn default() -> Cmpcr { - Cmpcr(0) - } - } - } -} -pub mod spi_v3 { - use crate::generic::*; - #[doc = "Serial peripheral interface"] - #[derive(Copy, Clone)] - pub struct Spi(pub *mut u8); - unsafe impl Send for Spi {} - unsafe impl Sync for Spi {} - impl Spi { - #[doc = "control register 1"] - pub fn cr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "control register 2"] - pub fn cr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "configuration register 1"] - pub fn cfg1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - #[doc = "configuration register 2"] - pub fn cfg2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(12usize)) } - } - #[doc = "Interrupt Enable Register"] - pub fn ier(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(16usize)) } - } - #[doc = "Status Register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(20usize)) } - } - #[doc = "Interrupt/Status Flags Clear Register"] - pub fn ifcr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(24usize)) } - } - #[doc = "Transmit Data Register"] - pub fn txdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - #[doc = "Receive Data Register"] - pub fn rxdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(48usize)) } - } - #[doc = "Polynomial Register"] - pub fn crcpoly(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(64usize)) } - } - #[doc = "Transmitter CRC Register"] - pub fn txcrc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(68usize)) } - } - #[doc = "Receiver CRC Register"] - pub fn rxcrc(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(72usize)) } - } - #[doc = "Underrun Data Register"] - pub fn udrdr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(76usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "control register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr2(pub u32); - impl Cr2 { - #[doc = "Number of data at current transfer"] - pub const fn tsize(&self) -> u16 { - let val = (self.0 >> 0usize) & 0xffff; - val as u16 - } - #[doc = "Number of data at current transfer"] - pub fn set_tsize(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); - } - #[doc = "Number of data transfer extension to be reload into TSIZE just when a previous"] - pub const fn tser(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Number of data transfer extension to be reload into TSIZE just when a previous"] - pub fn set_tser(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for Cr2 { - fn default() -> Cr2 { - Cr2(0) - } - } - #[doc = "Transmit Data Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Txdr(pub u32); - impl Txdr { - #[doc = "Transmit data register"] - pub const fn txdr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Transmit data register"] - pub fn set_txdr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Txdr { - fn default() -> Txdr { - Txdr(0) - } - } - #[doc = "Polynomial Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Crcpoly(pub u32); - impl Crcpoly { - #[doc = "CRC polynomial register"] - pub const fn crcpoly(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "CRC polynomial register"] - pub fn set_crcpoly(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Crcpoly { - fn default() -> Crcpoly { - Crcpoly(0) - } - } - #[doc = "Status Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Rx-Packet available"] - pub const fn rxp(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Rx-Packet available"] - pub fn set_rxp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Tx-Packet space available"] - pub const fn txp(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Tx-Packet space available"] - pub fn set_txp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Duplex Packet"] - pub const fn dxp(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Duplex Packet"] - pub fn set_dxp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "End Of Transfer"] - pub const fn eot(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "End Of Transfer"] - pub fn set_eot(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Transmission Transfer Filled"] - pub const fn txtf(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Transmission Transfer Filled"] - pub fn set_txtf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Underrun at slave transmission mode"] - pub const fn udr(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Underrun at slave transmission mode"] - pub fn set_udr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Overrun"] - pub const fn ovr(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Overrun"] - pub fn set_ovr(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "CRC Error"] - pub const fn crce(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "CRC Error"] - pub fn set_crce(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "TI frame format error"] - pub const fn tifre(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "TI frame format error"] - pub fn set_tifre(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Mode Fault"] - pub const fn modf(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Mode Fault"] - pub fn set_modf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Additional number of SPI data to be transacted was reload"] - pub const fn tserf(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Additional number of SPI data to be transacted was reload"] - pub fn set_tserf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "SUSPend"] - pub const fn susp(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "SUSPend"] - pub fn set_susp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "TxFIFO transmission complete"] - pub const fn txc(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "TxFIFO transmission complete"] - pub fn set_txc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "RxFIFO Packing LeVeL"] - pub const fn rxplvl(&self) -> super::vals::Rxplvl { - let val = (self.0 >> 13usize) & 0x03; - super::vals::Rxplvl(val as u8) - } - #[doc = "RxFIFO Packing LeVeL"] - pub fn set_rxplvl(&mut self, val: super::vals::Rxplvl) { - self.0 = (self.0 & !(0x03 << 13usize)) | (((val.0 as u32) & 0x03) << 13usize); - } - #[doc = "RxFIFO Word Not Empty"] - pub const fn rxwne(&self) -> super::vals::Rxwne { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Rxwne(val as u8) - } - #[doc = "RxFIFO Word Not Empty"] - pub fn set_rxwne(&mut self, val: super::vals::Rxwne) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Number of data frames remaining in current TSIZE session"] - pub const fn ctsize(&self) -> u16 { - let val = (self.0 >> 16usize) & 0xffff; - val as u16 - } - #[doc = "Number of data frames remaining in current TSIZE session"] - pub fn set_ctsize(&mut self, val: u16) { - self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "Underrun Data Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Udrdr(pub u32); - impl Udrdr { - #[doc = "Data at slave underrun condition"] - pub const fn udrdr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Data at slave underrun condition"] - pub fn set_udrdr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Udrdr { - fn default() -> Udrdr { - Udrdr(0) - } - } - #[doc = "configuration register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfg1(pub u32); - impl Cfg1 { - #[doc = "Number of bits in at single SPI data frame"] - pub const fn dsize(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x1f; - val as u8 - } - #[doc = "Number of bits in at single SPI data frame"] - pub fn set_dsize(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 0usize)) | (((val as u32) & 0x1f) << 0usize); - } - #[doc = "threshold level"] - pub const fn fthlv(&self) -> super::vals::Fthlv { - let val = (self.0 >> 5usize) & 0x0f; - super::vals::Fthlv(val as u8) - } - #[doc = "threshold level"] - pub fn set_fthlv(&mut self, val: super::vals::Fthlv) { - self.0 = (self.0 & !(0x0f << 5usize)) | (((val.0 as u32) & 0x0f) << 5usize); - } - #[doc = "Behavior of slave transmitter at underrun condition"] - pub const fn udrcfg(&self) -> super::vals::Udrcfg { - let val = (self.0 >> 9usize) & 0x03; - super::vals::Udrcfg(val as u8) - } - #[doc = "Behavior of slave transmitter at underrun condition"] - pub fn set_udrcfg(&mut self, val: super::vals::Udrcfg) { - self.0 = (self.0 & !(0x03 << 9usize)) | (((val.0 as u32) & 0x03) << 9usize); - } - #[doc = "Detection of underrun condition at slave transmitter"] - pub const fn udrdet(&self) -> super::vals::Udrdet { - let val = (self.0 >> 11usize) & 0x03; - super::vals::Udrdet(val as u8) - } - #[doc = "Detection of underrun condition at slave transmitter"] - pub fn set_udrdet(&mut self, val: super::vals::Udrdet) { - self.0 = (self.0 & !(0x03 << 11usize)) | (((val.0 as u32) & 0x03) << 11usize); - } - #[doc = "Rx DMA stream enable"] - pub const fn rxdmaen(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "Rx DMA stream enable"] - pub fn set_rxdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - #[doc = "Tx DMA stream enable"] - pub const fn txdmaen(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Tx DMA stream enable"] - pub fn set_txdmaen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "Length of CRC frame to be transacted and compared"] - pub const fn crcsize(&self) -> u8 { - let val = (self.0 >> 16usize) & 0x1f; - val as u8 - } - #[doc = "Length of CRC frame to be transacted and compared"] - pub fn set_crcsize(&mut self, val: u8) { - self.0 = (self.0 & !(0x1f << 16usize)) | (((val as u32) & 0x1f) << 16usize); - } - #[doc = "Hardware CRC computation enable"] - pub const fn crcen(&self) -> bool { - let val = (self.0 >> 22usize) & 0x01; - val != 0 - } - #[doc = "Hardware CRC computation enable"] - pub fn set_crcen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); - } - #[doc = "Master baud rate"] - pub const fn mbr(&self) -> super::vals::Mbr { - let val = (self.0 >> 28usize) & 0x07; - super::vals::Mbr(val as u8) - } - #[doc = "Master baud rate"] - pub fn set_mbr(&mut self, val: super::vals::Mbr) { - self.0 = (self.0 & !(0x07 << 28usize)) | (((val.0 as u32) & 0x07) << 28usize); - } - } - impl Default for Cfg1 { - fn default() -> Cfg1 { - Cfg1(0) - } - } - #[doc = "control register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr1(pub u32); - impl Cr1 { - #[doc = "Serial Peripheral Enable"] - pub const fn spe(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Serial Peripheral Enable"] - pub fn set_spe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Master automatic SUSP in Receive mode"] - pub const fn masrx(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Master automatic SUSP in Receive mode"] - pub fn set_masrx(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Master transfer start"] - pub const fn cstart(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Master transfer start"] - pub fn set_cstart(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Master SUSPend request"] - pub const fn csusp(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Master SUSPend request"] - pub fn set_csusp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Rx/Tx direction at Half-duplex mode"] - pub const fn hddir(&self) -> super::vals::Hddir { - let val = (self.0 >> 11usize) & 0x01; - super::vals::Hddir(val as u8) - } - #[doc = "Rx/Tx direction at Half-duplex mode"] - pub fn set_hddir(&mut self, val: super::vals::Hddir) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val.0 as u32) & 0x01) << 11usize); - } - #[doc = "Internal SS signal input level"] - pub const fn ssi(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "Internal SS signal input level"] - pub fn set_ssi(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "32-bit CRC polynomial configuration"] - pub const fn crc33_17(&self) -> super::vals::Crc { - let val = (self.0 >> 13usize) & 0x01; - super::vals::Crc(val as u8) - } - #[doc = "32-bit CRC polynomial configuration"] - pub fn set_crc33_17(&mut self, val: super::vals::Crc) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val.0 as u32) & 0x01) << 13usize); - } - #[doc = "CRC calculation initialization pattern control for receiver"] - pub const fn rcrcini(&self) -> super::vals::Rcrcini { - let val = (self.0 >> 14usize) & 0x01; - super::vals::Rcrcini(val as u8) - } - #[doc = "CRC calculation initialization pattern control for receiver"] - pub fn set_rcrcini(&mut self, val: super::vals::Rcrcini) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val.0 as u32) & 0x01) << 14usize); - } - #[doc = "CRC calculation initialization pattern control for transmitter"] - pub const fn tcrcini(&self) -> super::vals::Tcrcini { - let val = (self.0 >> 15usize) & 0x01; - super::vals::Tcrcini(val as u8) - } - #[doc = "CRC calculation initialization pattern control for transmitter"] - pub fn set_tcrcini(&mut self, val: super::vals::Tcrcini) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val.0 as u32) & 0x01) << 15usize); - } - #[doc = "Locking the AF configuration of associated IOs"] - pub const fn iolock(&self) -> bool { - let val = (self.0 >> 16usize) & 0x01; - val != 0 - } - #[doc = "Locking the AF configuration of associated IOs"] - pub fn set_iolock(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); - } - } - impl Default for Cr1 { - fn default() -> Cr1 { - Cr1(0) - } - } - #[doc = "Interrupt/Status Flags Clear Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ifcr(pub u32); - impl Ifcr { - #[doc = "End Of Transfer flag clear"] - pub const fn eotc(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "End Of Transfer flag clear"] - pub fn set_eotc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Transmission Transfer Filled flag clear"] - pub const fn txtfc(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "Transmission Transfer Filled flag clear"] - pub fn set_txtfc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "Underrun flag clear"] - pub const fn udrc(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Underrun flag clear"] - pub fn set_udrc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Overrun flag clear"] - pub const fn ovrc(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Overrun flag clear"] - pub fn set_ovrc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "CRC Error flag clear"] - pub const fn crcec(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "CRC Error flag clear"] - pub fn set_crcec(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "TI frame format error flag clear"] - pub const fn tifrec(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "TI frame format error flag clear"] - pub fn set_tifrec(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Mode Fault flag clear"] - pub const fn modfc(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Mode Fault flag clear"] - pub fn set_modfc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "TSERFC flag clear"] - pub const fn tserfc(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "TSERFC flag clear"] - pub fn set_tserfc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "SUSPend flag clear"] - pub const fn suspc(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "SUSPend flag clear"] - pub fn set_suspc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - } - impl Default for Ifcr { - fn default() -> Ifcr { - Ifcr(0) - } - } - #[doc = "Receiver CRC Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rxcrc(pub u32); - impl Rxcrc { - #[doc = "CRC register for receiver"] - pub const fn rxcrc(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "CRC register for receiver"] - pub fn set_rxcrc(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Rxcrc { - fn default() -> Rxcrc { - Rxcrc(0) - } - } - #[doc = "Interrupt Enable Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Ier(pub u32); - impl Ier { - #[doc = "RXP Interrupt Enable"] - pub const fn rxpie(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "RXP Interrupt Enable"] - pub fn set_rxpie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "TXP interrupt enable"] - pub const fn txpie(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "TXP interrupt enable"] - pub fn set_txpie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "DXP interrupt enabled"] - pub const fn dxpie(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "DXP interrupt enabled"] - pub fn set_dxpie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "EOT, SUSP and TXC interrupt enable"] - pub const fn eotie(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "EOT, SUSP and TXC interrupt enable"] - pub fn set_eotie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "TXTFIE interrupt enable"] - pub const fn txtfie(&self) -> bool { - let val = (self.0 >> 4usize) & 0x01; - val != 0 - } - #[doc = "TXTFIE interrupt enable"] - pub fn set_txtfie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); - } - #[doc = "UDR interrupt enable"] - pub const fn udrie(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "UDR interrupt enable"] - pub fn set_udrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "OVR interrupt enable"] - pub const fn ovrie(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "OVR interrupt enable"] - pub fn set_ovrie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - #[doc = "CRC Interrupt enable"] - pub const fn crceie(&self) -> bool { - let val = (self.0 >> 7usize) & 0x01; - val != 0 - } - #[doc = "CRC Interrupt enable"] - pub fn set_crceie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); - } - #[doc = "TIFRE interrupt enable"] - pub const fn tifreie(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "TIFRE interrupt enable"] - pub fn set_tifreie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Mode Fault interrupt enable"] - pub const fn modfie(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Mode Fault interrupt enable"] - pub fn set_modfie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Additional number of transactions reload interrupt enable"] - pub const fn tserfie(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Additional number of transactions reload interrupt enable"] - pub fn set_tserfie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - } - impl Default for Ier { - fn default() -> Ier { - Ier(0) - } - } - #[doc = "Transmitter CRC Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Txcrc(pub u32); - impl Txcrc { - #[doc = "CRC register for transmitter"] - pub const fn txcrc(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "CRC register for transmitter"] - pub fn set_txcrc(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Txcrc { - fn default() -> Txcrc { - Txcrc(0) - } - } - #[doc = "configuration register 2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfg2(pub u32); - impl Cfg2 { - #[doc = "Master SS Idleness"] - pub const fn mssi(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x0f; - val as u8 - } - #[doc = "Master SS Idleness"] - pub fn set_mssi(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); - } - #[doc = "Master Inter-Data Idleness"] - pub const fn midi(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x0f; - val as u8 - } - #[doc = "Master Inter-Data Idleness"] - pub fn set_midi(&mut self, val: u8) { - self.0 = (self.0 & !(0x0f << 4usize)) | (((val as u32) & 0x0f) << 4usize); - } - #[doc = "Swap functionality of MISO and MOSI pins"] - pub const fn ioswp(&self) -> bool { - let val = (self.0 >> 15usize) & 0x01; - val != 0 - } - #[doc = "Swap functionality of MISO and MOSI pins"] - pub fn set_ioswp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); - } - #[doc = "SPI Communication Mode"] - pub const fn comm(&self) -> super::vals::Comm { - let val = (self.0 >> 17usize) & 0x03; - super::vals::Comm(val as u8) - } - #[doc = "SPI Communication Mode"] - pub fn set_comm(&mut self, val: super::vals::Comm) { - self.0 = (self.0 & !(0x03 << 17usize)) | (((val.0 as u32) & 0x03) << 17usize); - } - #[doc = "Serial Protocol"] - pub const fn sp(&self) -> super::vals::Sp { - let val = (self.0 >> 19usize) & 0x07; - super::vals::Sp(val as u8) - } - #[doc = "Serial Protocol"] - pub fn set_sp(&mut self, val: super::vals::Sp) { - self.0 = (self.0 & !(0x07 << 19usize)) | (((val.0 as u32) & 0x07) << 19usize); - } - #[doc = "SPI Master"] - pub const fn master(&self) -> super::vals::Master { - let val = (self.0 >> 22usize) & 0x01; - super::vals::Master(val as u8) - } - #[doc = "SPI Master"] - pub fn set_master(&mut self, val: super::vals::Master) { - self.0 = (self.0 & !(0x01 << 22usize)) | (((val.0 as u32) & 0x01) << 22usize); - } - #[doc = "Data frame format"] - pub const fn lsbfrst(&self) -> super::vals::Lsbfrst { - let val = (self.0 >> 23usize) & 0x01; - super::vals::Lsbfrst(val as u8) - } - #[doc = "Data frame format"] - pub fn set_lsbfrst(&mut self, val: super::vals::Lsbfrst) { - self.0 = (self.0 & !(0x01 << 23usize)) | (((val.0 as u32) & 0x01) << 23usize); - } - #[doc = "Clock phase"] - pub const fn cpha(&self) -> super::vals::Cpha { - let val = (self.0 >> 24usize) & 0x01; - super::vals::Cpha(val as u8) - } - #[doc = "Clock phase"] - pub fn set_cpha(&mut self, val: super::vals::Cpha) { - self.0 = (self.0 & !(0x01 << 24usize)) | (((val.0 as u32) & 0x01) << 24usize); - } - #[doc = "Clock polarity"] - pub const fn cpol(&self) -> super::vals::Cpol { - let val = (self.0 >> 25usize) & 0x01; - super::vals::Cpol(val as u8) - } - #[doc = "Clock polarity"] - pub fn set_cpol(&mut self, val: super::vals::Cpol) { - self.0 = (self.0 & !(0x01 << 25usize)) | (((val.0 as u32) & 0x01) << 25usize); - } - #[doc = "Software management of SS signal input"] - pub const fn ssm(&self) -> bool { - let val = (self.0 >> 26usize) & 0x01; - val != 0 - } - #[doc = "Software management of SS signal input"] - pub fn set_ssm(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); - } - #[doc = "SS input/output polarity"] - pub const fn ssiop(&self) -> super::vals::Ssiop { - let val = (self.0 >> 28usize) & 0x01; - super::vals::Ssiop(val as u8) - } - #[doc = "SS input/output polarity"] - pub fn set_ssiop(&mut self, val: super::vals::Ssiop) { - self.0 = (self.0 & !(0x01 << 28usize)) | (((val.0 as u32) & 0x01) << 28usize); - } - #[doc = "SS output enable"] - pub const fn ssoe(&self) -> bool { - let val = (self.0 >> 29usize) & 0x01; - val != 0 - } - #[doc = "SS output enable"] - pub fn set_ssoe(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); - } - #[doc = "SS output management in master mode"] - pub const fn ssom(&self) -> super::vals::Ssom { - let val = (self.0 >> 30usize) & 0x01; - super::vals::Ssom(val as u8) - } - #[doc = "SS output management in master mode"] - pub fn set_ssom(&mut self, val: super::vals::Ssom) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val.0 as u32) & 0x01) << 30usize); - } - #[doc = "Alternate function GPIOs control"] - pub const fn afcntr(&self) -> super::vals::Afcntr { - let val = (self.0 >> 31usize) & 0x01; - super::vals::Afcntr(val as u8) - } - #[doc = "Alternate function GPIOs control"] - pub fn set_afcntr(&mut self, val: super::vals::Afcntr) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val.0 as u32) & 0x01) << 31usize); - } - } - impl Default for Cfg2 { - fn default() -> Cfg2 { - Cfg2(0) - } - } - #[doc = "Receive Data Register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Rxdr(pub u32); - impl Rxdr { - #[doc = "Receive data register"] - pub const fn rxdr(&self) -> u32 { - let val = (self.0 >> 0usize) & 0xffff_ffff; - val as u32 - } - #[doc = "Receive data register"] - pub fn set_rxdr(&mut self, val: u32) { - self.0 = - (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); - } - } - impl Default for Rxdr { - fn default() -> Rxdr { - Rxdr(0) - } - } - } - pub mod vals { - use crate::generic::*; - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rxwne(pub u8); - impl Rxwne { - #[doc = "Less than 32-bit data frame received"] - pub const LESSTHAN32: Self = Self(0); - #[doc = "At least 32-bit data frame received"] - pub const ATLEAST32: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ssom(pub u8); - impl Ssom { - #[doc = "SS is asserted until data transfer complete"] - pub const ASSERTED: Self = Self(0); - #[doc = "Data frames interleaved with SS not asserted during MIDI"] - pub const NOTASSERTED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Afcntr(pub u8); - impl Afcntr { - #[doc = "Peripheral takes no control of GPIOs while disabled"] - pub const NOTCONTROLLED: Self = Self(0); - #[doc = "Peripheral controls GPIOs while disabled"] - pub const CONTROLLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Udrcfg(pub u8); - impl Udrcfg { - #[doc = "Slave sends a constant underrun pattern"] - pub const CONSTANT: Self = Self(0); - #[doc = "Slave repeats last received data frame from master"] - pub const REPEATRECEIVED: Self = Self(0x01); - #[doc = "Slave repeats last transmitted data frame"] - pub const REPEATTRANSMITTED: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpol(pub u8); - impl Cpol { - #[doc = "CK to 0 when idle"] - pub const IDLELOW: Self = Self(0); - #[doc = "CK to 1 when idle"] - pub const IDLEHIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Lsbfrst(pub u8); - impl Lsbfrst { - #[doc = "Data is transmitted/received with the MSB first"] - pub const MSBFIRST: Self = Self(0); - #[doc = "Data is transmitted/received with the LSB first"] - pub const LSBFIRST: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Fthlv(pub u8); - impl Fthlv { - #[doc = "1 frame"] - pub const ONEFRAME: Self = Self(0); - #[doc = "2 frames"] - pub const TWOFRAMES: Self = Self(0x01); - #[doc = "3 frames"] - pub const THREEFRAMES: Self = Self(0x02); - #[doc = "4 frames"] - pub const FOURFRAMES: Self = Self(0x03); - #[doc = "5 frames"] - pub const FIVEFRAMES: Self = Self(0x04); - #[doc = "6 frames"] - pub const SIXFRAMES: Self = Self(0x05); - #[doc = "7 frames"] - pub const SEVENFRAMES: Self = Self(0x06); - #[doc = "8 frames"] - pub const EIGHTFRAMES: Self = Self(0x07); - #[doc = "9 frames"] - pub const NINEFRAMES: Self = Self(0x08); - #[doc = "10 frames"] - pub const TENFRAMES: Self = Self(0x09); - #[doc = "11 frames"] - pub const ELEVENFRAMES: Self = Self(0x0a); - #[doc = "12 frames"] - pub const TWELVEFRAMES: Self = Self(0x0b); - #[doc = "13 frames"] - pub const THIRTEENFRAMES: Self = Self(0x0c); - #[doc = "14 frames"] - pub const FOURTEENFRAMES: Self = Self(0x0d); - #[doc = "15 frames"] - pub const FIFTEENFRAMES: Self = Self(0x0e); - #[doc = "16 frames"] - pub const SIXTEENFRAMES: Self = Self(0x0f); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Mbr(pub u8); - impl Mbr { - #[doc = "f_spi_ker_ck / 2"] - pub const DIV2: Self = Self(0); - #[doc = "f_spi_ker_ck / 4"] - pub const DIV4: Self = Self(0x01); - #[doc = "f_spi_ker_ck / 8"] - pub const DIV8: Self = Self(0x02); - #[doc = "f_spi_ker_ck / 16"] - pub const DIV16: Self = Self(0x03); - #[doc = "f_spi_ker_ck / 32"] - pub const DIV32: Self = Self(0x04); - #[doc = "f_spi_ker_ck / 64"] - pub const DIV64: Self = Self(0x05); - #[doc = "f_spi_ker_ck / 128"] - pub const DIV128: Self = Self(0x06); - #[doc = "f_spi_ker_ck / 256"] - pub const DIV256: Self = Self(0x07); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rcrcini(pub u8); - impl Rcrcini { - #[doc = "All zeros RX CRC initialization pattern"] - pub const ALLZEROS: Self = Self(0); - #[doc = "All ones RX CRC initialization pattern"] - pub const ALLONES: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Ssiop(pub u8); - impl Ssiop { - #[doc = "Low level is active for SS signal"] - pub const ACTIVELOW: Self = Self(0); - #[doc = "High level is active for SS signal"] - pub const ACTIVEHIGH: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Hddir(pub u8); - impl Hddir { - #[doc = "Receiver in half duplex mode"] - pub const RECEIVER: Self = Self(0); - #[doc = "Transmitter in half duplex mode"] - pub const TRANSMITTER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Udrdet(pub u8); - impl Udrdet { - #[doc = "Underrun is detected at begin of data frame"] - pub const STARTOFFRAME: Self = Self(0); - #[doc = "Underrun is detected at end of last data frame"] - pub const ENDOFFRAME: Self = Self(0x01); - #[doc = "Underrun is detected at begin of active SS signal"] - pub const STARTOFSLAVESELECT: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Datlen(pub u8); - impl Datlen { - #[doc = "16 bit data length"] - pub const BITS16: Self = Self(0); - #[doc = "24 bit data length"] - pub const BITS24: Self = Self(0x01); - #[doc = "32 bit data length"] - pub const BITS32: Self = Self(0x02); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Crc(pub u8); - impl Crc { - #[doc = "Full size (33/17 bit) CRC polynomial is not used"] - pub const DISABLED: Self = Self(0); - #[doc = "Full size (33/17 bit) CRC polynomial is used"] - pub const ENABLED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Rxplvl(pub u8); - impl Rxplvl { - #[doc = "Zero frames beyond packing ratio available"] - pub const ZEROFRAMES: Self = Self(0); - #[doc = "One frame beyond packing ratio available"] - pub const ONEFRAME: Self = Self(0x01); - #[doc = "Two frame beyond packing ratio available"] - pub const TWOFRAMES: Self = Self(0x02); - #[doc = "Three frame beyond packing ratio available"] - pub const THREEFRAMES: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Master(pub u8); - impl Master { - #[doc = "Slave configuration"] - pub const SLAVE: Self = Self(0); - #[doc = "Master configuration"] - pub const MASTER: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Datfmt(pub u8); - impl Datfmt { - #[doc = "The data inside RXDR and TXDR are right aligned"] - pub const RIGHTALIGNED: Self = Self(0); - #[doc = "The data inside RXDR and TXDR are left aligned"] - pub const LEFTALIGNED: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Comm(pub u8); - impl Comm { - #[doc = "Full duplex"] - pub const FULLDUPLEX: Self = Self(0); - #[doc = "Simplex transmitter only"] - pub const TRANSMITTER: Self = Self(0x01); - #[doc = "Simplex receiver only"] - pub const RECEIVER: Self = Self(0x02); - #[doc = "Half duplex"] - pub const HALFDUPLEX: Self = Self(0x03); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Cpha(pub u8); - impl Cpha { - #[doc = "The first clock transition is the first data capture edge"] - pub const FIRSTEDGE: Self = Self(0); - #[doc = "The second clock transition is the first data capture edge"] - pub const SECONDEDGE: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Tcrcini(pub u8); - impl Tcrcini { - #[doc = "All zeros TX CRC initialization pattern"] - pub const ALLZEROS: Self = Self(0); - #[doc = "All ones TX CRC initialization pattern"] - pub const ALLONES: Self = Self(0x01); - } - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] - pub struct Sp(pub u8); - impl Sp { - #[doc = "Motorola SPI protocol"] - pub const MOTOROLA: Self = Self(0); - #[doc = "TI SPI protocol"] - pub const TI: Self = Self(0x01); - } - } -} -pub mod rng_v1 { - use crate::generic::*; - #[doc = "Random number generator"] - #[derive(Copy, Clone)] - pub struct Rng(pub *mut u8); - unsafe impl Send for Rng {} - unsafe impl Sync for Rng {} - impl Rng { - #[doc = "control register"] - pub fn cr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "status register"] - pub fn sr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "data register"] - pub fn dr(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(8usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "status register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Sr(pub u32); - impl Sr { - #[doc = "Data ready"] - pub const fn drdy(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Data ready"] - pub fn set_drdy(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Clock error current status"] - pub const fn cecs(&self) -> bool { - let val = (self.0 >> 1usize) & 0x01; - val != 0 - } - #[doc = "Clock error current status"] - pub fn set_cecs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); - } - #[doc = "Seed error current status"] - pub const fn secs(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Seed error current status"] - pub fn set_secs(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Clock error interrupt status"] - pub const fn ceis(&self) -> bool { - let val = (self.0 >> 5usize) & 0x01; - val != 0 - } - #[doc = "Clock error interrupt status"] - pub fn set_ceis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); - } - #[doc = "Seed error interrupt status"] - pub const fn seis(&self) -> bool { - let val = (self.0 >> 6usize) & 0x01; - val != 0 - } - #[doc = "Seed error interrupt status"] - pub fn set_seis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); - } - } - impl Default for Sr { - fn default() -> Sr { - Sr(0) - } - } - #[doc = "control register"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cr(pub u32); - impl Cr { - #[doc = "Random number generator enable"] - pub const fn rngen(&self) -> bool { - let val = (self.0 >> 2usize) & 0x01; - val != 0 - } - #[doc = "Random number generator enable"] - pub fn set_rngen(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); - } - #[doc = "Interrupt enable"] - pub const fn ie(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "Interrupt enable"] - pub fn set_ie(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - } - impl Default for Cr { - fn default() -> Cr { - Cr(0) - } - } - } -} -pub mod syscfg_l0 { - use crate::generic::*; - #[doc = "System configuration controller"] - #[derive(Copy, Clone)] - pub struct Syscfg(pub *mut u8); - unsafe impl Send for Syscfg {} - unsafe impl Sync for Syscfg {} - impl Syscfg { - #[doc = "configuration register 1"] - pub fn cfgr1(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(0usize)) } - } - #[doc = "CFGR2"] - pub fn cfgr2(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(4usize)) } - } - #[doc = "external interrupt configuration register"] - pub fn exticr(self, n: usize) -> Reg { - assert!(n < 4usize); - unsafe { Reg::from_ptr(self.0.add(8usize + n * 4usize)) } - } - #[doc = "CFGR3"] - pub fn cfgr3(self) -> Reg { - unsafe { Reg::from_ptr(self.0.add(32usize)) } - } - } - pub mod regs { - use crate::generic::*; - #[doc = "external interrupt configuration register 1-4"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Exticr(pub u32); - impl Exticr { - #[doc = "EXTI configuration bits"] - pub fn exti(&self, n: usize) -> u8 { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - let val = (self.0 >> offs) & 0x0f; - val as u8 - } - #[doc = "EXTI configuration bits"] - pub fn set_exti(&mut self, n: usize, val: u8) { - assert!(n < 4usize); - let offs = 0usize + n * 4usize; - self.0 = (self.0 & !(0x0f << offs)) | (((val as u32) & 0x0f) << offs); - } - } - impl Default for Exticr { - fn default() -> Exticr { - Exticr(0) - } - } - #[doc = "configuration register 1"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr1(pub u32); - impl Cfgr1 { - #[doc = "Memory mapping selection bits"] - pub const fn mem_mode(&self) -> u8 { - let val = (self.0 >> 0usize) & 0x03; - val as u8 - } - #[doc = "Memory mapping selection bits"] - pub fn set_mem_mode(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); - } - #[doc = "User bank swapping"] - pub const fn ufb(&self) -> bool { - let val = (self.0 >> 3usize) & 0x01; - val != 0 - } - #[doc = "User bank swapping"] - pub fn set_ufb(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); - } - #[doc = "Boot mode selected by the boot pins status bits"] - pub const fn boot_mode(&self) -> u8 { - let val = (self.0 >> 8usize) & 0x03; - val as u8 - } - #[doc = "Boot mode selected by the boot pins status bits"] - pub fn set_boot_mode(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 8usize)) | (((val as u32) & 0x03) << 8usize); - } - } - impl Default for Cfgr1 { - fn default() -> Cfgr1 { - Cfgr1(0) - } - } - #[doc = "CFGR3"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr3(pub u32); - impl Cfgr3 { - #[doc = "VREFINT enable and scaler control for COMP2 enable bit"] - pub const fn en_vrefint(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "VREFINT enable and scaler control for COMP2 enable bit"] - pub fn set_en_vrefint(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "VREFINT_ADC connection bit"] - pub const fn sel_vref_out(&self) -> u8 { - let val = (self.0 >> 4usize) & 0x03; - val as u8 - } - #[doc = "VREFINT_ADC connection bit"] - pub fn set_sel_vref_out(&mut self, val: u8) { - self.0 = (self.0 & !(0x03 << 4usize)) | (((val as u32) & 0x03) << 4usize); - } - #[doc = "VREFINT reference for ADC enable bit"] - pub const fn enbuf_vrefint_adc(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "VREFINT reference for ADC enable bit"] - pub fn set_enbuf_vrefint_adc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Temperature sensor reference for ADC enable bit"] - pub const fn enbuf_sensor_adc(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Temperature sensor reference for ADC enable bit"] - pub fn set_enbuf_sensor_adc(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "VREFINT reference for COMP2 scaler enable bit"] - pub const fn enbuf_vrefint_comp2(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "VREFINT reference for COMP2 scaler enable bit"] - pub fn set_enbuf_vrefint_comp2(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "VREFINT reference for HSI48 oscillator enable bit"] - pub const fn enref_hsi48(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "VREFINT reference for HSI48 oscillator enable bit"] - pub fn set_enref_hsi48(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "VREFINT ready flag"] - pub const fn vrefint_rdyf(&self) -> bool { - let val = (self.0 >> 30usize) & 0x01; - val != 0 - } - #[doc = "VREFINT ready flag"] - pub fn set_vrefint_rdyf(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); - } - #[doc = "SYSCFG_CFGR3 lock bit"] - pub const fn ref_lock(&self) -> bool { - let val = (self.0 >> 31usize) & 0x01; - val != 0 - } - #[doc = "SYSCFG_CFGR3 lock bit"] - pub fn set_ref_lock(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); - } - } - impl Default for Cfgr3 { - fn default() -> Cfgr3 { - Cfgr3(0) - } - } - #[doc = "CFGR2"] - #[repr(transparent)] - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Cfgr2(pub u32); - impl Cfgr2 { - #[doc = "Firewall disable bit"] - pub const fn fwdis(&self) -> bool { - let val = (self.0 >> 0usize) & 0x01; - val != 0 - } - #[doc = "Firewall disable bit"] - pub fn set_fwdis(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); - } - #[doc = "Fm+ drive capability on PB6 enable bit"] - pub const fn i2c_pb6_fmp(&self) -> bool { - let val = (self.0 >> 8usize) & 0x01; - val != 0 - } - #[doc = "Fm+ drive capability on PB6 enable bit"] - pub fn set_i2c_pb6_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); - } - #[doc = "Fm+ drive capability on PB7 enable bit"] - pub const fn i2c_pb7_fmp(&self) -> bool { - let val = (self.0 >> 9usize) & 0x01; - val != 0 - } - #[doc = "Fm+ drive capability on PB7 enable bit"] - pub fn set_i2c_pb7_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); - } - #[doc = "Fm+ drive capability on PB8 enable bit"] - pub const fn i2c_pb8_fmp(&self) -> bool { - let val = (self.0 >> 10usize) & 0x01; - val != 0 - } - #[doc = "Fm+ drive capability on PB8 enable bit"] - pub fn set_i2c_pb8_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); - } - #[doc = "Fm+ drive capability on PB9 enable bit"] - pub const fn i2c_pb9_fmp(&self) -> bool { - let val = (self.0 >> 11usize) & 0x01; - val != 0 - } - #[doc = "Fm+ drive capability on PB9 enable bit"] - pub fn set_i2c_pb9_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); - } - #[doc = "I2C1 Fm+ drive capability enable bit"] - pub const fn i2c1_fmp(&self) -> bool { - let val = (self.0 >> 12usize) & 0x01; - val != 0 - } - #[doc = "I2C1 Fm+ drive capability enable bit"] - pub fn set_i2c1_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); - } - #[doc = "I2C2 Fm+ drive capability enable bit"] - pub const fn i2c2_fmp(&self) -> bool { - let val = (self.0 >> 13usize) & 0x01; - val != 0 - } - #[doc = "I2C2 Fm+ drive capability enable bit"] - pub fn set_i2c2_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); - } - #[doc = "I2C3 Fm+ drive capability enable bit"] - pub const fn i2c3_fmp(&self) -> bool { - let val = (self.0 >> 14usize) & 0x01; - val != 0 - } - #[doc = "I2C3 Fm+ drive capability enable bit"] - pub fn set_i2c3_fmp(&mut self, val: bool) { - self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); - } - } - impl Default for Cfgr2 { - fn default() -> Cfgr2 { - Cfgr2(0) - } - } - } -} diff --git a/embassy-stm32/src/pac/stm32f401cb.rs b/embassy-stm32/src/pac/stm32f401cb.rs deleted file mode 100644 index f9d7eb1a..00000000 --- a/embassy-stm32/src/pac/stm32f401cb.rs +++ /dev/null @@ -1,554 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401cc.rs b/embassy-stm32/src/pac/stm32f401cc.rs deleted file mode 100644 index f9d7eb1a..00000000 --- a/embassy-stm32/src/pac/stm32f401cc.rs +++ /dev/null @@ -1,554 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401cd.rs b/embassy-stm32/src/pac/stm32f401cd.rs deleted file mode 100644 index f9d7eb1a..00000000 --- a/embassy-stm32/src/pac/stm32f401cd.rs +++ /dev/null @@ -1,554 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401ce.rs b/embassy-stm32/src/pac/stm32f401ce.rs deleted file mode 100644 index f9d7eb1a..00000000 --- a/embassy-stm32/src/pac/stm32f401ce.rs +++ /dev/null @@ -1,554 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401rb.rs b/embassy-stm32/src/pac/stm32f401rb.rs deleted file mode 100644 index f9d7eb1a..00000000 --- a/embassy-stm32/src/pac/stm32f401rb.rs +++ /dev/null @@ -1,554 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401rc.rs b/embassy-stm32/src/pac/stm32f401rc.rs deleted file mode 100644 index f9d7eb1a..00000000 --- a/embassy-stm32/src/pac/stm32f401rc.rs +++ /dev/null @@ -1,554 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401rd.rs b/embassy-stm32/src/pac/stm32f401rd.rs deleted file mode 100644 index f9d7eb1a..00000000 --- a/embassy-stm32/src/pac/stm32f401rd.rs +++ /dev/null @@ -1,554 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401re.rs b/embassy-stm32/src/pac/stm32f401re.rs deleted file mode 100644 index f9d7eb1a..00000000 --- a/embassy-stm32/src/pac/stm32f401re.rs +++ /dev/null @@ -1,554 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401vb.rs b/embassy-stm32/src/pac/stm32f401vb.rs deleted file mode 100644 index 958776e9..00000000 --- a/embassy-stm32/src/pac/stm32f401vb.rs +++ /dev/null @@ -1,562 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401vc.rs b/embassy-stm32/src/pac/stm32f401vc.rs deleted file mode 100644 index 958776e9..00000000 --- a/embassy-stm32/src/pac/stm32f401vc.rs +++ /dev/null @@ -1,562 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401vd.rs b/embassy-stm32/src/pac/stm32f401vd.rs deleted file mode 100644 index 958776e9..00000000 --- a/embassy-stm32/src/pac/stm32f401vd.rs +++ /dev/null @@ -1,562 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f401ve.rs b/embassy-stm32/src/pac/stm32f401ve.rs deleted file mode 100644 index 958776e9..00000000 --- a/embassy-stm32/src/pac/stm32f401ve.rs +++ /dev/null @@ -1,562 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f405oe.rs b/embassy-stm32/src/pac/stm32f405oe.rs deleted file mode 100644 index 8bb67b7a..00000000 --- a/embassy-stm32/src/pac/stm32f405oe.rs +++ /dev/null @@ -1,711 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f405og.rs b/embassy-stm32/src/pac/stm32f405og.rs deleted file mode 100644 index 8bb67b7a..00000000 --- a/embassy-stm32/src/pac/stm32f405og.rs +++ /dev/null @@ -1,711 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f405rg.rs b/embassy-stm32/src/pac/stm32f405rg.rs deleted file mode 100644 index 8bb67b7a..00000000 --- a/embassy-stm32/src/pac/stm32f405rg.rs +++ /dev/null @@ -1,711 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f405vg.rs b/embassy-stm32/src/pac/stm32f405vg.rs deleted file mode 100644 index 8bb67b7a..00000000 --- a/embassy-stm32/src/pac/stm32f405vg.rs +++ /dev/null @@ -1,711 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f405zg.rs b/embassy-stm32/src/pac/stm32f405zg.rs deleted file mode 100644 index 8bb67b7a..00000000 --- a/embassy-stm32/src/pac/stm32f405zg.rs +++ /dev/null @@ -1,711 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f407ie.rs b/embassy-stm32/src/pac/stm32f407ie.rs deleted file mode 100644 index 039454c3..00000000 --- a/embassy-stm32/src/pac/stm32f407ie.rs +++ /dev/null @@ -1,720 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f407ig.rs b/embassy-stm32/src/pac/stm32f407ig.rs deleted file mode 100644 index 039454c3..00000000 --- a/embassy-stm32/src/pac/stm32f407ig.rs +++ /dev/null @@ -1,720 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f407ve.rs b/embassy-stm32/src/pac/stm32f407ve.rs deleted file mode 100644 index 039454c3..00000000 --- a/embassy-stm32/src/pac/stm32f407ve.rs +++ /dev/null @@ -1,720 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f407vg.rs b/embassy-stm32/src/pac/stm32f407vg.rs deleted file mode 100644 index 039454c3..00000000 --- a/embassy-stm32/src/pac/stm32f407vg.rs +++ /dev/null @@ -1,720 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f407ze.rs b/embassy-stm32/src/pac/stm32f407ze.rs deleted file mode 100644 index 039454c3..00000000 --- a/embassy-stm32/src/pac/stm32f407ze.rs +++ /dev/null @@ -1,720 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f407zg.rs b/embassy-stm32/src/pac/stm32f407zg.rs deleted file mode 100644 index 039454c3..00000000 --- a/embassy-stm32/src/pac/stm32f407zg.rs +++ /dev/null @@ -1,720 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f410c8.rs b/embassy-stm32/src/pac/stm32f410c8.rs deleted file mode 100644 index a0eee347..00000000 --- a/embassy-stm32/src/pac/stm32f410c8.rs +++ /dev/null @@ -1,488 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const RNG: rng::Rng = rng::Rng(0x40080000 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, RNG, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - LPTIM1 = 97, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP = 25, - TIM5 = 50, - TIM6_DAC = 54, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP(); - fn TIM5(); - fn TIM6_DAC(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 98] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f410cb.rs b/embassy-stm32/src/pac/stm32f410cb.rs deleted file mode 100644 index a0eee347..00000000 --- a/embassy-stm32/src/pac/stm32f410cb.rs +++ /dev/null @@ -1,488 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const RNG: rng::Rng = rng::Rng(0x40080000 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, RNG, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - LPTIM1 = 97, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP = 25, - TIM5 = 50, - TIM6_DAC = 54, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP(); - fn TIM5(); - fn TIM6_DAC(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 98] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f410r8.rs b/embassy-stm32/src/pac/stm32f410r8.rs deleted file mode 100644 index a0eee347..00000000 --- a/embassy-stm32/src/pac/stm32f410r8.rs +++ /dev/null @@ -1,488 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const RNG: rng::Rng = rng::Rng(0x40080000 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, RNG, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - LPTIM1 = 97, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP = 25, - TIM5 = 50, - TIM6_DAC = 54, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP(); - fn TIM5(); - fn TIM6_DAC(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 98] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f410rb.rs b/embassy-stm32/src/pac/stm32f410rb.rs deleted file mode 100644 index a0eee347..00000000 --- a/embassy-stm32/src/pac/stm32f410rb.rs +++ /dev/null @@ -1,488 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const RNG: rng::Rng = rng::Rng(0x40080000 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, RNG, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - LPTIM1 = 97, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP = 25, - TIM5 = 50, - TIM6_DAC = 54, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP(); - fn TIM5(); - fn TIM6_DAC(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 98] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f410t8.rs b/embassy-stm32/src/pac/stm32f410t8.rs deleted file mode 100644 index e8a1bce0..00000000 --- a/embassy-stm32/src/pac/stm32f410t8.rs +++ /dev/null @@ -1,472 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const RNG: rng::Rng = rng::Rng(0x40080000 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - LPTIM1 = 97, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP = 25, - TIM5 = 50, - TIM6_DAC = 54, - USART1 = 37, - USART2 = 38, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP(); - fn TIM5(); - fn TIM6_DAC(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 98] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f410tb.rs b/embassy-stm32/src/pac/stm32f410tb.rs deleted file mode 100644 index e8a1bce0..00000000 --- a/embassy-stm32/src/pac/stm32f410tb.rs +++ /dev/null @@ -1,472 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const RNG: rng::Rng = rng::Rng(0x40080000 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - LPTIM1 = 97, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP = 25, - TIM5 = 50, - TIM6_DAC = 54, - USART1 = 37, - USART2 = 38, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP(); - fn TIM5(); - fn TIM6_DAC(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 98] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f411cc.rs b/embassy-stm32/src/pac/stm32f411cc.rs deleted file mode 100644 index 99b80c41..00000000 --- a/embassy-stm32/src/pac/stm32f411cc.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, - USART1, USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 86] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f411ce.rs b/embassy-stm32/src/pac/stm32f411ce.rs deleted file mode 100644 index 99b80c41..00000000 --- a/embassy-stm32/src/pac/stm32f411ce.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, - USART1, USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 86] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f411rc.rs b/embassy-stm32/src/pac/stm32f411rc.rs deleted file mode 100644 index 99b80c41..00000000 --- a/embassy-stm32/src/pac/stm32f411rc.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, - USART1, USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 86] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f411re.rs b/embassy-stm32/src/pac/stm32f411re.rs deleted file mode 100644 index 99b80c41..00000000 --- a/embassy-stm32/src/pac/stm32f411re.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, - USART1, USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 86] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f411vc.rs b/embassy-stm32/src/pac/stm32f411vc.rs deleted file mode 100644 index 99b80c41..00000000 --- a/embassy-stm32/src/pac/stm32f411vc.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, - USART1, USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 86] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f411ve.rs b/embassy-stm32/src/pac/stm32f411ve.rs deleted file mode 100644 index 99b80c41..00000000 --- a/embassy-stm32/src/pac/stm32f411ve.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, - USART1, USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - USART1 = 37, - USART2 = 38, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(USART1); - declare!(USART2); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn USART1(); - fn USART2(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 86] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f412ce.rs b/embassy-stm32/src/pac/stm32f412ce.rs deleted file mode 100644 index 22ae7a1c..00000000 --- a/embassy-stm32/src/pac/stm32f412ce.rs +++ /dev/null @@ -1,631 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, - SPI3, SPI4, SPI5, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6 = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f412cg.rs b/embassy-stm32/src/pac/stm32f412cg.rs deleted file mode 100644 index 22ae7a1c..00000000 --- a/embassy-stm32/src/pac/stm32f412cg.rs +++ /dev/null @@ -1,631 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, - SPI3, SPI4, SPI5, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6 = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f412re.rs b/embassy-stm32/src/pac/stm32f412re.rs deleted file mode 100644 index 8fc147e0..00000000 --- a/embassy-stm32/src/pac/stm32f412re.rs +++ /dev/null @@ -1,664 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, - SPI5, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6 = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f412rg.rs b/embassy-stm32/src/pac/stm32f412rg.rs deleted file mode 100644 index 8fc147e0..00000000 --- a/embassy-stm32/src/pac/stm32f412rg.rs +++ /dev/null @@ -1,664 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, - SPI5, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6 = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f412ve.rs b/embassy-stm32/src/pac/stm32f412ve.rs deleted file mode 100644 index 635a3e3e..00000000 --- a/embassy-stm32/src/pac/stm32f412ve.rs +++ /dev/null @@ -1,739 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6 = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f412vg.rs b/embassy-stm32/src/pac/stm32f412vg.rs deleted file mode 100644 index 635a3e3e..00000000 --- a/embassy-stm32/src/pac/stm32f412vg.rs +++ /dev/null @@ -1,739 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6 = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f412ze.rs b/embassy-stm32/src/pac/stm32f412ze.rs deleted file mode 100644 index 635a3e3e..00000000 --- a/embassy-stm32/src/pac/stm32f412ze.rs +++ /dev/null @@ -1,739 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6 = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f412zg.rs b/embassy-stm32/src/pac/stm32f412zg.rs deleted file mode 100644 index 635a3e3e..00000000 --- a/embassy-stm32/src/pac/stm32f412zg.rs +++ /dev/null @@ -1,739 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6 = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413cg.rs b/embassy-stm32/src/pac/stm32f413cg.rs deleted file mode 100644 index 41bbc0a2..00000000 --- a/embassy-stm32/src/pac/stm32f413cg.rs +++ /dev/null @@ -1,787 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413ch.rs b/embassy-stm32/src/pac/stm32f413ch.rs deleted file mode 100644 index 41bbc0a2..00000000 --- a/embassy-stm32/src/pac/stm32f413ch.rs +++ /dev/null @@ -1,787 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413mg.rs b/embassy-stm32/src/pac/stm32f413mg.rs deleted file mode 100644 index 12bb3ae0..00000000 --- a/embassy-stm32/src/pac/stm32f413mg.rs +++ /dev/null @@ -1,803 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413mh.rs b/embassy-stm32/src/pac/stm32f413mh.rs deleted file mode 100644 index 12bb3ae0..00000000 --- a/embassy-stm32/src/pac/stm32f413mh.rs +++ /dev/null @@ -1,803 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413rg.rs b/embassy-stm32/src/pac/stm32f413rg.rs deleted file mode 100644 index 12bb3ae0..00000000 --- a/embassy-stm32/src/pac/stm32f413rg.rs +++ /dev/null @@ -1,803 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413rh.rs b/embassy-stm32/src/pac/stm32f413rh.rs deleted file mode 100644 index 12bb3ae0..00000000 --- a/embassy-stm32/src/pac/stm32f413rh.rs +++ /dev/null @@ -1,803 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413vg.rs b/embassy-stm32/src/pac/stm32f413vg.rs deleted file mode 100644 index 12bb3ae0..00000000 --- a/embassy-stm32/src/pac/stm32f413vg.rs +++ /dev/null @@ -1,803 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413vh.rs b/embassy-stm32/src/pac/stm32f413vh.rs deleted file mode 100644 index 12bb3ae0..00000000 --- a/embassy-stm32/src/pac/stm32f413vh.rs +++ /dev/null @@ -1,803 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413zg.rs b/embassy-stm32/src/pac/stm32f413zg.rs deleted file mode 100644 index 12bb3ae0..00000000 --- a/embassy-stm32/src/pac/stm32f413zg.rs +++ /dev/null @@ -1,803 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f413zh.rs b/embassy-stm32/src/pac/stm32f413zh.rs deleted file mode 100644 index 12bb3ae0..00000000 --- a/embassy-stm32/src/pac/stm32f413zh.rs +++ /dev/null @@ -1,803 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f415og.rs b/embassy-stm32/src/pac/stm32f415og.rs deleted file mode 100644 index c260fcdb..00000000 --- a/embassy-stm32/src/pac/stm32f415og.rs +++ /dev/null @@ -1,714 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f415rg.rs b/embassy-stm32/src/pac/stm32f415rg.rs deleted file mode 100644 index c260fcdb..00000000 --- a/embassy-stm32/src/pac/stm32f415rg.rs +++ /dev/null @@ -1,714 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f415vg.rs b/embassy-stm32/src/pac/stm32f415vg.rs deleted file mode 100644 index c260fcdb..00000000 --- a/embassy-stm32/src/pac/stm32f415vg.rs +++ /dev/null @@ -1,714 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f415zg.rs b/embassy-stm32/src/pac/stm32f415zg.rs deleted file mode 100644 index c260fcdb..00000000 --- a/embassy-stm32/src/pac/stm32f415zg.rs +++ /dev/null @@ -1,714 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _reserved: 0 }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f417ie.rs b/embassy-stm32/src/pac/stm32f417ie.rs deleted file mode 100644 index 382c8832..00000000 --- a/embassy-stm32/src/pac/stm32f417ie.rs +++ /dev/null @@ -1,723 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f417ig.rs b/embassy-stm32/src/pac/stm32f417ig.rs deleted file mode 100644 index 382c8832..00000000 --- a/embassy-stm32/src/pac/stm32f417ig.rs +++ /dev/null @@ -1,723 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f417ve.rs b/embassy-stm32/src/pac/stm32f417ve.rs deleted file mode 100644 index 382c8832..00000000 --- a/embassy-stm32/src/pac/stm32f417ve.rs +++ /dev/null @@ -1,723 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f417vg.rs b/embassy-stm32/src/pac/stm32f417vg.rs deleted file mode 100644 index 382c8832..00000000 --- a/embassy-stm32/src/pac/stm32f417vg.rs +++ /dev/null @@ -1,723 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f417ze.rs b/embassy-stm32/src/pac/stm32f417ze.rs deleted file mode 100644 index 382c8832..00000000 --- a/embassy-stm32/src/pac/stm32f417ze.rs +++ /dev/null @@ -1,723 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f417zg.rs b/embassy-stm32/src/pac/stm32f417zg.rs deleted file mode 100644 index 382c8832..00000000 --- a/embassy-stm32/src/pac/stm32f417zg.rs +++ /dev/null @@ -1,723 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - FSMC = 48, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(FSMC); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn FSMC(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FSMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f423ch.rs b/embassy-stm32/src/pac/stm32f423ch.rs deleted file mode 100644 index 22c55b01..00000000 --- a/embassy-stm32/src/pac/stm32f423ch.rs +++ /dev/null @@ -1,790 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f423mh.rs b/embassy-stm32/src/pac/stm32f423mh.rs deleted file mode 100644 index e2782d3a..00000000 --- a/embassy-stm32/src/pac/stm32f423mh.rs +++ /dev/null @@ -1,806 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f423rh.rs b/embassy-stm32/src/pac/stm32f423rh.rs deleted file mode 100644 index e2782d3a..00000000 --- a/embassy-stm32/src/pac/stm32f423rh.rs +++ /dev/null @@ -1,806 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f423vh.rs b/embassy-stm32/src/pac/stm32f423vh.rs deleted file mode 100644 index e2782d3a..00000000 --- a/embassy-stm32/src/pac/stm32f423vh.rs +++ /dev/null @@ -1,806 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f423zh.rs b/embassy-stm32/src/pac/stm32f423zh.rs deleted file mode 100644 index e2782d3a..00000000 --- a/embassy-stm32/src/pac/stm32f423zh.rs +++ /dev/null @@ -1,806 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 9); -impl_i2c_pin!(I2C2, SdaPin, PB9, 9); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 9); -impl_i2c_pin!(I2C3, SdaPin, PB8, 9); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, MosiPin, PA10, 5); -impl_spi_pin!(SPI2, MisoPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB12, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MosiPin, PA1, 5); -impl_spi_pin!(SPI4, MisoPin, PA11, 6); -impl_spi_pin!(SPI4, SckPin, PB13, 6); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PA10, 6); -impl_spi_pin!(SPI5, MisoPin, PA12, 6); -impl_spi_pin!(SPI5, SckPin, PB0, 6); -impl_spi_pin!(SPI5, MosiPin, PB8, 6); -impl_spi_pin!(SPI5, SckPin, PE12, 6); -impl_spi_pin!(SPI5, MisoPin, PE13, 6); -impl_spi_pin!(SPI5, MosiPin, PE14, 6); -impl_spi_pin!(SPI5, SckPin, PE2, 6); -impl_spi_pin!(SPI5, MisoPin, PE5, 6); -impl_spi_pin!(SPI5, MosiPin, PE6, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, TxPin, PA15, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RxPin, PB3, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 8); -impl_usart_pin!(USART3, CtsPin, PB13, 8); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PA11, 8); -impl_usart_pin!(USART6, RxPin, PA12, 8); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, - USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CAN3_RX0 = 75, - CAN3_RX1 = 76, - CAN3_SCE = 77, - CAN3_TX = 74, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM2_FLT0 = 98, - DFSDM2_FLT1 = 99, - DFSDM2_FLT2 = 100, - DFSDM2_FLT3 = 101, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 97, - OTG_FS = 67, - OTG_FS_WKUP = 42, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART10 = 89, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 88, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CAN3_RX0); - declare!(CAN3_RX1); - declare!(CAN3_SCE); - declare!(CAN3_TX); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM2_FLT0); - declare!(DFSDM2_FLT1); - declare!(DFSDM2_FLT2); - declare!(DFSDM2_FLT3); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART10); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CAN3_RX0(); - fn CAN3_RX1(); - fn CAN3_SCE(); - fn CAN3_TX(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM2_FLT0(); - fn DFSDM2_FLT1(); - fn DFSDM2_FLT2(); - fn DFSDM2_FLT3(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART10(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 102] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _reserved: 0 }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: CAN3_TX }, - Vector { _handler: CAN3_RX0 }, - Vector { _handler: CAN3_RX1 }, - Vector { _handler: CAN3_SCE }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _handler: UART9 }, - Vector { _handler: UART10 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: QUADSPI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - Vector { _handler: LPTIM1 }, - Vector { - _handler: DFSDM2_FLT0, - }, - Vector { - _handler: DFSDM2_FLT1, - }, - Vector { - _handler: DFSDM2_FLT2, - }, - Vector { - _handler: DFSDM2_FLT3, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f427ag.rs b/embassy-stm32/src/pac/stm32f427ag.rs deleted file mode 100644 index f89e938d..00000000 --- a/embassy-stm32/src/pac/stm32f427ag.rs +++ /dev/null @@ -1,804 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f427ai.rs b/embassy-stm32/src/pac/stm32f427ai.rs deleted file mode 100644 index f89e938d..00000000 --- a/embassy-stm32/src/pac/stm32f427ai.rs +++ /dev/null @@ -1,804 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f427ig.rs b/embassy-stm32/src/pac/stm32f427ig.rs deleted file mode 100644 index cc48a910..00000000 --- a/embassy-stm32/src/pac/stm32f427ig.rs +++ /dev/null @@ -1,809 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f427ii.rs b/embassy-stm32/src/pac/stm32f427ii.rs deleted file mode 100644 index cc48a910..00000000 --- a/embassy-stm32/src/pac/stm32f427ii.rs +++ /dev/null @@ -1,809 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f427vg.rs b/embassy-stm32/src/pac/stm32f427vg.rs deleted file mode 100644 index eae6a603..00000000 --- a/embassy-stm32/src/pac/stm32f427vg.rs +++ /dev/null @@ -1,795 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f427vi.rs b/embassy-stm32/src/pac/stm32f427vi.rs deleted file mode 100644 index eae6a603..00000000 --- a/embassy-stm32/src/pac/stm32f427vi.rs +++ /dev/null @@ -1,795 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f427zg.rs b/embassy-stm32/src/pac/stm32f427zg.rs deleted file mode 100644 index cc48a910..00000000 --- a/embassy-stm32/src/pac/stm32f427zg.rs +++ /dev/null @@ -1,809 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f427zi.rs b/embassy-stm32/src/pac/stm32f427zi.rs deleted file mode 100644 index cc48a910..00000000 --- a/embassy-stm32/src/pac/stm32f427zi.rs +++ /dev/null @@ -1,809 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ag.rs b/embassy-stm32/src/pac/stm32f429ag.rs deleted file mode 100644 index f4bd912a..00000000 --- a/embassy-stm32/src/pac/stm32f429ag.rs +++ /dev/null @@ -1,810 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ai.rs b/embassy-stm32/src/pac/stm32f429ai.rs deleted file mode 100644 index f4bd912a..00000000 --- a/embassy-stm32/src/pac/stm32f429ai.rs +++ /dev/null @@ -1,810 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429be.rs b/embassy-stm32/src/pac/stm32f429be.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429be.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429bg.rs b/embassy-stm32/src/pac/stm32f429bg.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429bg.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429bi.rs b/embassy-stm32/src/pac/stm32f429bi.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429bi.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ie.rs b/embassy-stm32/src/pac/stm32f429ie.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429ie.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ig.rs b/embassy-stm32/src/pac/stm32f429ig.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429ig.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ii.rs b/embassy-stm32/src/pac/stm32f429ii.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429ii.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ne.rs b/embassy-stm32/src/pac/stm32f429ne.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429ne.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ng.rs b/embassy-stm32/src/pac/stm32f429ng.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429ng.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ni.rs b/embassy-stm32/src/pac/stm32f429ni.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429ni.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ve.rs b/embassy-stm32/src/pac/stm32f429ve.rs deleted file mode 100644 index b361da59..00000000 --- a/embassy-stm32/src/pac/stm32f429ve.rs +++ /dev/null @@ -1,801 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429vg.rs b/embassy-stm32/src/pac/stm32f429vg.rs deleted file mode 100644 index b361da59..00000000 --- a/embassy-stm32/src/pac/stm32f429vg.rs +++ /dev/null @@ -1,801 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429vi.rs b/embassy-stm32/src/pac/stm32f429vi.rs deleted file mode 100644 index b361da59..00000000 --- a/embassy-stm32/src/pac/stm32f429vi.rs +++ /dev/null @@ -1,801 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429ze.rs b/embassy-stm32/src/pac/stm32f429ze.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429ze.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429zg.rs b/embassy-stm32/src/pac/stm32f429zg.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429zg.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f429zi.rs b/embassy-stm32/src/pac/stm32f429zi.rs deleted file mode 100644 index 37f5ab9d..00000000 --- a/embassy-stm32/src/pac/stm32f429zi.rs +++ /dev/null @@ -1,815 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f437ai.rs b/embassy-stm32/src/pac/stm32f437ai.rs deleted file mode 100644 index 789e5482..00000000 --- a/embassy-stm32/src/pac/stm32f437ai.rs +++ /dev/null @@ -1,807 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f437ig.rs b/embassy-stm32/src/pac/stm32f437ig.rs deleted file mode 100644 index 757cdf62..00000000 --- a/embassy-stm32/src/pac/stm32f437ig.rs +++ /dev/null @@ -1,812 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f437ii.rs b/embassy-stm32/src/pac/stm32f437ii.rs deleted file mode 100644 index 757cdf62..00000000 --- a/embassy-stm32/src/pac/stm32f437ii.rs +++ /dev/null @@ -1,812 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f437vg.rs b/embassy-stm32/src/pac/stm32f437vg.rs deleted file mode 100644 index 69f17f8c..00000000 --- a/embassy-stm32/src/pac/stm32f437vg.rs +++ /dev/null @@ -1,798 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f437vi.rs b/embassy-stm32/src/pac/stm32f437vi.rs deleted file mode 100644 index 69f17f8c..00000000 --- a/embassy-stm32/src/pac/stm32f437vi.rs +++ /dev/null @@ -1,798 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f437zg.rs b/embassy-stm32/src/pac/stm32f437zg.rs deleted file mode 100644 index 757cdf62..00000000 --- a/embassy-stm32/src/pac/stm32f437zg.rs +++ /dev/null @@ -1,812 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f437zi.rs b/embassy-stm32/src/pac/stm32f437zi.rs deleted file mode 100644 index 757cdf62..00000000 --- a/embassy-stm32/src/pac/stm32f437zi.rs +++ /dev/null @@ -1,812 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439ai.rs b/embassy-stm32/src/pac/stm32f439ai.rs deleted file mode 100644 index 4b986af9..00000000 --- a/embassy-stm32/src/pac/stm32f439ai.rs +++ /dev/null @@ -1,813 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439bg.rs b/embassy-stm32/src/pac/stm32f439bg.rs deleted file mode 100644 index bd29d15b..00000000 --- a/embassy-stm32/src/pac/stm32f439bg.rs +++ /dev/null @@ -1,818 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439bi.rs b/embassy-stm32/src/pac/stm32f439bi.rs deleted file mode 100644 index bd29d15b..00000000 --- a/embassy-stm32/src/pac/stm32f439bi.rs +++ /dev/null @@ -1,818 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439ig.rs b/embassy-stm32/src/pac/stm32f439ig.rs deleted file mode 100644 index bd29d15b..00000000 --- a/embassy-stm32/src/pac/stm32f439ig.rs +++ /dev/null @@ -1,818 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439ii.rs b/embassy-stm32/src/pac/stm32f439ii.rs deleted file mode 100644 index bd29d15b..00000000 --- a/embassy-stm32/src/pac/stm32f439ii.rs +++ /dev/null @@ -1,818 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439ng.rs b/embassy-stm32/src/pac/stm32f439ng.rs deleted file mode 100644 index bd29d15b..00000000 --- a/embassy-stm32/src/pac/stm32f439ng.rs +++ /dev/null @@ -1,818 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439ni.rs b/embassy-stm32/src/pac/stm32f439ni.rs deleted file mode 100644 index bd29d15b..00000000 --- a/embassy-stm32/src/pac/stm32f439ni.rs +++ /dev/null @@ -1,818 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439vg.rs b/embassy-stm32/src/pac/stm32f439vg.rs deleted file mode 100644 index 98ae2ae9..00000000 --- a/embassy-stm32/src/pac/stm32f439vg.rs +++ /dev/null @@ -1,804 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439vi.rs b/embassy-stm32/src/pac/stm32f439vi.rs deleted file mode 100644 index 98ae2ae9..00000000 --- a/embassy-stm32/src/pac/stm32f439vi.rs +++ /dev/null @@ -1,804 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439zg.rs b/embassy-stm32/src/pac/stm32f439zg.rs deleted file mode 100644 index bd29d15b..00000000 --- a/embassy-stm32/src/pac/stm32f439zg.rs +++ /dev/null @@ -1,818 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f439zi.rs b/embassy-stm32/src/pac/stm32f439zi.rs deleted file mode 100644 index bd29d15b..00000000 --- a/embassy-stm32/src/pac/stm32f439zi.rs +++ /dev/null @@ -1,818 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -pub const SPI6: spi::Spi = spi::Spi(0x40015400 as _); -impl_spi!(SPI6, APB2); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f446mc.rs b/embassy-stm32/src/pac/stm32f446mc.rs deleted file mode 100644 index 598041a5..00000000 --- a/embassy-stm32/src/pac/stm32f446mc.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 4); -impl_i2c_pin!(I2C2, SdaPin, PC12, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 7); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB0, 7); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, MosiPin, PC1, 5); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD0, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MisoPin, PD0, 5); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -impl_spi_pin!(SPI4, SckPin, PG11, 6); -impl_spi_pin!(SPI4, MisoPin, PG12, 6); -impl_spi_pin!(SPI4, MosiPin, PG13, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CEC = 93, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDIO = 49, - SPDIF_RX = 94, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CEC); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDIO); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CEC(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDIO(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: CEC }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f446me.rs b/embassy-stm32/src/pac/stm32f446me.rs deleted file mode 100644 index 598041a5..00000000 --- a/embassy-stm32/src/pac/stm32f446me.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 4); -impl_i2c_pin!(I2C2, SdaPin, PC12, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 7); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB0, 7); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, MosiPin, PC1, 5); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD0, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MisoPin, PD0, 5); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -impl_spi_pin!(SPI4, SckPin, PG11, 6); -impl_spi_pin!(SPI4, MisoPin, PG12, 6); -impl_spi_pin!(SPI4, MosiPin, PG13, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CEC = 93, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDIO = 49, - SPDIF_RX = 94, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CEC); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDIO); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CEC(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDIO(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: CEC }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f446rc.rs b/embassy-stm32/src/pac/stm32f446rc.rs deleted file mode 100644 index 418e27c3..00000000 --- a/embassy-stm32/src/pac/stm32f446rc.rs +++ /dev/null @@ -1,739 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 4); -impl_i2c_pin!(I2C2, SdaPin, PC12, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 7); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB0, 7); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, MosiPin, PC1, 5); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD0, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CEC = 93, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDIO = 49, - SPDIF_RX = 94, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CEC); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDIO); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CEC(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDIO(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: CEC }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f446re.rs b/embassy-stm32/src/pac/stm32f446re.rs deleted file mode 100644 index 418e27c3..00000000 --- a/embassy-stm32/src/pac/stm32f446re.rs +++ /dev/null @@ -1,739 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 4); -impl_i2c_pin!(I2C2, SdaPin, PC12, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 7); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB0, 7); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, MosiPin, PC1, 5); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD0, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3, - USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CEC = 93, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDIO = 49, - SPDIF_RX = 94, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CEC); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDIO); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CEC(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDIO(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: CEC }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f446vc.rs b/embassy-stm32/src/pac/stm32f446vc.rs deleted file mode 100644 index 598041a5..00000000 --- a/embassy-stm32/src/pac/stm32f446vc.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 4); -impl_i2c_pin!(I2C2, SdaPin, PC12, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 7); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB0, 7); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, MosiPin, PC1, 5); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD0, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MisoPin, PD0, 5); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -impl_spi_pin!(SPI4, SckPin, PG11, 6); -impl_spi_pin!(SPI4, MisoPin, PG12, 6); -impl_spi_pin!(SPI4, MosiPin, PG13, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CEC = 93, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDIO = 49, - SPDIF_RX = 94, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CEC); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDIO); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CEC(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDIO(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: CEC }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f446ve.rs b/embassy-stm32/src/pac/stm32f446ve.rs deleted file mode 100644 index 598041a5..00000000 --- a/embassy-stm32/src/pac/stm32f446ve.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 4); -impl_i2c_pin!(I2C2, SdaPin, PC12, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 7); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB0, 7); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, MosiPin, PC1, 5); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD0, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MisoPin, PD0, 5); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -impl_spi_pin!(SPI4, SckPin, PG11, 6); -impl_spi_pin!(SPI4, MisoPin, PG12, 6); -impl_spi_pin!(SPI4, MosiPin, PG13, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CEC = 93, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDIO = 49, - SPDIF_RX = 94, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CEC); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDIO); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CEC(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDIO(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: CEC }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f446zc.rs b/embassy-stm32/src/pac/stm32f446zc.rs deleted file mode 100644 index 598041a5..00000000 --- a/embassy-stm32/src/pac/stm32f446zc.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 4); -impl_i2c_pin!(I2C2, SdaPin, PC12, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 7); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB0, 7); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, MosiPin, PC1, 5); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD0, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MisoPin, PD0, 5); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -impl_spi_pin!(SPI4, SckPin, PG11, 6); -impl_spi_pin!(SPI4, MisoPin, PG12, 6); -impl_spi_pin!(SPI4, MosiPin, PG13, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CEC = 93, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDIO = 49, - SPDIF_RX = 94, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CEC); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDIO); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CEC(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDIO(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: CEC }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f446ze.rs b/embassy-stm32/src/pac/stm32f446ze.rs deleted file mode 100644 index 598041a5..00000000 --- a/embassy-stm32/src/pac/stm32f446ze.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PB3, 4); -impl_i2c_pin!(I2C2, SdaPin, PC12, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PB4, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 7); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PC7, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB0, 7); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, MosiPin, PC1, 5); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD0, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, MisoPin, PD0, 5); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -impl_spi_pin!(SPI4, SckPin, PG11, 6); -impl_spi_pin!(SPI4, MisoPin, PG12, 6); -impl_spi_pin!(SPI4, MosiPin, PG13, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::spi_v1 as spi; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, I2C1, I2C2, I2C3, SPI1, SPI2, SPI3, SPI4, SYSCFG, USART1, USART2, - USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CEC = 93, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FMPI2C1_ER = 96, - FMPI2C1_EV = 95, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDIO = 49, - SPDIF_RX = 94, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CEC); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FMPI2C1_ER); - declare!(FMPI2C1_EV); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDIO); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CEC(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FMPI2C1_ER(); - fn FMPI2C1_EV(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDIO(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 97] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FPU }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: CEC }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: FMPI2C1_EV, - }, - Vector { - _handler: FMPI2C1_ER, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ae.rs b/embassy-stm32/src/pac/stm32f469ae.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ae.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ag.rs b/embassy-stm32/src/pac/stm32f469ag.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ag.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ai.rs b/embassy-stm32/src/pac/stm32f469ai.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ai.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469be.rs b/embassy-stm32/src/pac/stm32f469be.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469be.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469bg.rs b/embassy-stm32/src/pac/stm32f469bg.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469bg.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469bi.rs b/embassy-stm32/src/pac/stm32f469bi.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469bi.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ie.rs b/embassy-stm32/src/pac/stm32f469ie.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ie.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ig.rs b/embassy-stm32/src/pac/stm32f469ig.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ig.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ii.rs b/embassy-stm32/src/pac/stm32f469ii.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ii.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ne.rs b/embassy-stm32/src/pac/stm32f469ne.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ne.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ng.rs b/embassy-stm32/src/pac/stm32f469ng.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ng.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ni.rs b/embassy-stm32/src/pac/stm32f469ni.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ni.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ve.rs b/embassy-stm32/src/pac/stm32f469ve.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ve.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469vg.rs b/embassy-stm32/src/pac/stm32f469vg.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469vg.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469vi.rs b/embassy-stm32/src/pac/stm32f469vi.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469vi.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469ze.rs b/embassy-stm32/src/pac/stm32f469ze.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469ze.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469zg.rs b/embassy-stm32/src/pac/stm32f469zg.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469zg.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f469zi.rs b/embassy-stm32/src/pac/stm32f469zi.rs deleted file mode 100644 index 9f9fff64..00000000 --- a/embassy-stm32/src/pac/stm32f469zi.rs +++ /dev/null @@ -1,771 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479ag.rs b/embassy-stm32/src/pac/stm32f479ag.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479ag.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479ai.rs b/embassy-stm32/src/pac/stm32f479ai.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479ai.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479bg.rs b/embassy-stm32/src/pac/stm32f479bg.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479bg.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479bi.rs b/embassy-stm32/src/pac/stm32f479bi.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479bi.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479ig.rs b/embassy-stm32/src/pac/stm32f479ig.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479ig.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479ii.rs b/embassy-stm32/src/pac/stm32f479ii.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479ii.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479ng.rs b/embassy-stm32/src/pac/stm32f479ng.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479ng.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479ni.rs b/embassy-stm32/src/pac/stm32f479ni.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479ni.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479vg.rs b/embassy-stm32/src/pac/stm32f479vg.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479vg.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479vi.rs b/embassy-stm32/src/pac/stm32f479vi.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479vi.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479zg.rs b/embassy-stm32/src/pac/stm32f479zg.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479zg.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32f479zi.rs b/embassy-stm32/src/pac/stm32f479zi.rs deleted file mode 100644 index bcc3abd0..00000000 --- a/embassy-stm32/src/pac/stm32f479zi.rs +++ /dev/null @@ -1,774 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x40020000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40026000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40026400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40013c00 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x40020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x40020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x40020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x40020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x40021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x40021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x40021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x40021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x40022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x40022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x40022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40013800 as _); -pub const USART1: usart::Usart = usart::Usart(0x40011000 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub const USART6: usart::Usart = usart::Usart(0x40011400 as _); -impl_usart!(USART6); -impl_usart_pin!(USART6, TxPin, PC6, 8); -impl_usart_pin!(USART6, RxPin, PC7, 8); -impl_usart_pin!(USART6, CkPin, PC8, 8); -impl_usart_pin!(USART6, RtsPin, PG12, 8); -impl_usart_pin!(USART6, CtsPin, PG13, 8); -impl_usart_pin!(USART6, TxPin, PG14, 8); -impl_usart_pin!(USART6, CtsPin, PG15, 8); -impl_usart_pin!(USART6, CkPin, PG7, 8); -impl_usart_pin!(USART6, RtsPin, PG8, 8); -impl_usart_pin!(USART6, RxPin, PG9, 8); -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v1 as i2c; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_f4 as syscfg; -pub use super::regs::usart_v1 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, - PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, PK11, PK12, PK13, PK14, - PK15, I2C1, I2C2, I2C3, RNG, SYSCFG, USART1, USART2, USART3, USART6 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 64, - CAN2_RX1 = 65, - CAN2_SCE = 66, - CAN2_TX = 63, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 92, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LTDC = 88, - LTDC_ER = 89, - OTG_FS = 67, - OTG_FS_WKUP = 42, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD = 1, - QUADSPI = 91, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SDIO = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - TAMP_STAMP = 2, - TIM1_BRK_TIM9 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM11 = 26, - TIM1_UP_TIM10 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OTG_FS); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDIO); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM9); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM11); - declare!(TIM1_UP_TIM10); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LTDC(); - fn LTDC_ER(); - fn OTG_FS(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDIO(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM9(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM11(); - fn TIM1_UP_TIM10(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 93] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM9, - }, - Vector { - _handler: TIM1_UP_TIM10, - }, - Vector { - _handler: TIM1_TRG_COM_TIM11, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDIO }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: QUADSPI }, - Vector { _handler: DSI }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h723ve.rs b/embassy-stm32/src/pac/stm32h723ve.rs deleted file mode 100644 index f66dc1fc..00000000 --- a/embassy-stm32/src/pac/stm32h723ve.rs +++ /dev/null @@ -1,1033 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h723vg.rs b/embassy-stm32/src/pac/stm32h723vg.rs deleted file mode 100644 index f66dc1fc..00000000 --- a/embassy-stm32/src/pac/stm32h723vg.rs +++ /dev/null @@ -1,1033 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h723ze.rs b/embassy-stm32/src/pac/stm32h723ze.rs deleted file mode 100644 index 23795b49..00000000 --- a/embassy-stm32/src/pac/stm32h723ze.rs +++ /dev/null @@ -1,1044 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h723zg.rs b/embassy-stm32/src/pac/stm32h723zg.rs deleted file mode 100644 index 23795b49..00000000 --- a/embassy-stm32/src/pac/stm32h723zg.rs +++ /dev/null @@ -1,1044 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725ae.rs b/embassy-stm32/src/pac/stm32h725ae.rs deleted file mode 100644 index 23795b49..00000000 --- a/embassy-stm32/src/pac/stm32h725ae.rs +++ /dev/null @@ -1,1044 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725ag.rs b/embassy-stm32/src/pac/stm32h725ag.rs deleted file mode 100644 index 23795b49..00000000 --- a/embassy-stm32/src/pac/stm32h725ag.rs +++ /dev/null @@ -1,1044 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725ie.rs b/embassy-stm32/src/pac/stm32h725ie.rs deleted file mode 100644 index 23795b49..00000000 --- a/embassy-stm32/src/pac/stm32h725ie.rs +++ /dev/null @@ -1,1044 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725ig.rs b/embassy-stm32/src/pac/stm32h725ig.rs deleted file mode 100644 index 23795b49..00000000 --- a/embassy-stm32/src/pac/stm32h725ig.rs +++ /dev/null @@ -1,1044 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725re.rs b/embassy-stm32/src/pac/stm32h725re.rs deleted file mode 100644 index 1828a254..00000000 --- a/embassy-stm32/src/pac/stm32h725re.rs +++ /dev/null @@ -1,1017 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725rg.rs b/embassy-stm32/src/pac/stm32h725rg.rs deleted file mode 100644 index 1828a254..00000000 --- a/embassy-stm32/src/pac/stm32h725rg.rs +++ /dev/null @@ -1,1017 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725ve.rs b/embassy-stm32/src/pac/stm32h725ve.rs deleted file mode 100644 index f66dc1fc..00000000 --- a/embassy-stm32/src/pac/stm32h725ve.rs +++ /dev/null @@ -1,1033 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725vg.rs b/embassy-stm32/src/pac/stm32h725vg.rs deleted file mode 100644 index f66dc1fc..00000000 --- a/embassy-stm32/src/pac/stm32h725vg.rs +++ /dev/null @@ -1,1033 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725ze.rs b/embassy-stm32/src/pac/stm32h725ze.rs deleted file mode 100644 index 23795b49..00000000 --- a/embassy-stm32/src/pac/stm32h725ze.rs +++ /dev/null @@ -1,1044 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h725zg.rs b/embassy-stm32/src/pac/stm32h725zg.rs deleted file mode 100644 index 23795b49..00000000 --- a/embassy-stm32/src/pac/stm32h725zg.rs +++ /dev/null @@ -1,1044 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h730ab.rs b/embassy-stm32/src/pac/stm32h730ab.rs deleted file mode 100644 index 9fc4c1fd..00000000 --- a/embassy-stm32/src/pac/stm32h730ab.rs +++ /dev/null @@ -1,1053 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h730ib.rs b/embassy-stm32/src/pac/stm32h730ib.rs deleted file mode 100644 index 9fc4c1fd..00000000 --- a/embassy-stm32/src/pac/stm32h730ib.rs +++ /dev/null @@ -1,1053 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h730vb.rs b/embassy-stm32/src/pac/stm32h730vb.rs deleted file mode 100644 index d7c86ac3..00000000 --- a/embassy-stm32/src/pac/stm32h730vb.rs +++ /dev/null @@ -1,1042 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h730zb.rs b/embassy-stm32/src/pac/stm32h730zb.rs deleted file mode 100644 index 9fc4c1fd..00000000 --- a/embassy-stm32/src/pac/stm32h730zb.rs +++ /dev/null @@ -1,1053 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h733vg.rs b/embassy-stm32/src/pac/stm32h733vg.rs deleted file mode 100644 index d7c86ac3..00000000 --- a/embassy-stm32/src/pac/stm32h733vg.rs +++ /dev/null @@ -1,1042 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h733zg.rs b/embassy-stm32/src/pac/stm32h733zg.rs deleted file mode 100644 index 9fc4c1fd..00000000 --- a/embassy-stm32/src/pac/stm32h733zg.rs +++ /dev/null @@ -1,1053 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h735ag.rs b/embassy-stm32/src/pac/stm32h735ag.rs deleted file mode 100644 index 9fc4c1fd..00000000 --- a/embassy-stm32/src/pac/stm32h735ag.rs +++ /dev/null @@ -1,1053 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h735ig.rs b/embassy-stm32/src/pac/stm32h735ig.rs deleted file mode 100644 index 9fc4c1fd..00000000 --- a/embassy-stm32/src/pac/stm32h735ig.rs +++ /dev/null @@ -1,1053 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h735rg.rs b/embassy-stm32/src/pac/stm32h735rg.rs deleted file mode 100644 index bae83aec..00000000 --- a/embassy-stm32/src/pac/stm32h735rg.rs +++ /dev/null @@ -1,1026 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h735vg.rs b/embassy-stm32/src/pac/stm32h735vg.rs deleted file mode 100644 index d7c86ac3..00000000 --- a/embassy-stm32/src/pac/stm32h735vg.rs +++ /dev/null @@ -1,1042 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h735zg.rs b/embassy-stm32/src/pac/stm32h735zg.rs deleted file mode 100644 index 9fc4c1fd..00000000 --- a/embassy-stm32/src/pac/stm32h735zg.rs +++ /dev/null @@ -1,1053 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const I2C5: i2c::I2c = i2c::I2c(0x40006400 as _); -impl_i2c!(I2C5); -impl_i2c_pin!(I2C5, SclPin, PA8, 6); -impl_i2c_pin!(I2C5, SdaPin, PC10, 4); -impl_i2c_pin!(I2C5, SclPin, PC11, 4); -impl_i2c_pin!(I2C5, SdaPin, PC9, 6); -impl_i2c_pin!(I2C5, SdaPin, PF0, 6); -impl_i2c_pin!(I2C5, SclPin, PF1, 6); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, - PJ8, PJ9, PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, - PK10, PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, I2C5, PWR, RNG, SDMMC1, SDMMC2, - SPI1, SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CORDIC = 154, - CRS = 144, - CRYP = 79, - DCMI_PSSI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN3_IT0 = 159, - FDCAN3_IT1 = 160, - FDCAN_CAL = 63, - FLASH = 4, - FMAC = 153, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - I2C5_ER = 158, - I2C5_EV = 157, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM23 = 161, - TIM24 = 162, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 155, - USART1 = 37, - USART10 = 156, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CORDIC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI_PSSI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN3_IT0); - declare!(FDCAN3_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMAC); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(I2C5_ER); - declare!(I2C5_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM23); - declare!(TIM24); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CORDIC(); - fn CRS(); - fn CRYP(); - fn DCMI_PSSI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN3_IT0(); - fn FDCAN3_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMAC(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn I2C5_ER(); - fn I2C5_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM23(); - fn TIM24(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 163] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: FMAC }, - Vector { _handler: CORDIC }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: I2C5_EV }, - Vector { _handler: I2C5_ER }, - Vector { - _handler: FDCAN3_IT0, - }, - Vector { - _handler: FDCAN3_IT1, - }, - Vector { _handler: TIM23 }, - Vector { _handler: TIM24 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742ag.rs b/embassy-stm32/src/pac/stm32h742ag.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742ag.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742ai.rs b/embassy-stm32/src/pac/stm32h742ai.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742ai.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742bg.rs b/embassy-stm32/src/pac/stm32h742bg.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742bg.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742bi.rs b/embassy-stm32/src/pac/stm32h742bi.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742bi.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742ig.rs b/embassy-stm32/src/pac/stm32h742ig.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742ig.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742ii.rs b/embassy-stm32/src/pac/stm32h742ii.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742ii.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742vg.rs b/embassy-stm32/src/pac/stm32h742vg.rs deleted file mode 100644 index ab99bd65..00000000 --- a/embassy-stm32/src/pac/stm32h742vg.rs +++ /dev/null @@ -1,1028 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742vi.rs b/embassy-stm32/src/pac/stm32h742vi.rs deleted file mode 100644 index ab99bd65..00000000 --- a/embassy-stm32/src/pac/stm32h742vi.rs +++ /dev/null @@ -1,1028 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742xg.rs b/embassy-stm32/src/pac/stm32h742xg.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742xg.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742xi.rs b/embassy-stm32/src/pac/stm32h742xi.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742xi.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742zg.rs b/embassy-stm32/src/pac/stm32h742zg.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742zg.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h742zi.rs b/embassy-stm32/src/pac/stm32h742zi.rs deleted file mode 100644 index 61fac469..00000000 --- a/embassy-stm32/src/pac/stm32h742zi.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _reserved: 0 }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743ag.rs b/embassy-stm32/src/pac/stm32h743ag.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743ag.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743ai.rs b/embassy-stm32/src/pac/stm32h743ai.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743ai.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743bg.rs b/embassy-stm32/src/pac/stm32h743bg.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743bg.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743bi.rs b/embassy-stm32/src/pac/stm32h743bi.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743bi.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743ig.rs b/embassy-stm32/src/pac/stm32h743ig.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743ig.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743ii.rs b/embassy-stm32/src/pac/stm32h743ii.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743ii.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743vg.rs b/embassy-stm32/src/pac/stm32h743vg.rs deleted file mode 100644 index 4aa96486..00000000 --- a/embassy-stm32/src/pac/stm32h743vg.rs +++ /dev/null @@ -1,1037 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743vi.rs b/embassy-stm32/src/pac/stm32h743vi.rs deleted file mode 100644 index 4aa96486..00000000 --- a/embassy-stm32/src/pac/stm32h743vi.rs +++ /dev/null @@ -1,1037 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743xg.rs b/embassy-stm32/src/pac/stm32h743xg.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743xg.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743xi.rs b/embassy-stm32/src/pac/stm32h743xi.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743xi.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743zg.rs b/embassy-stm32/src/pac/stm32h743zg.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743zg.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h743zi.rs b/embassy-stm32/src/pac/stm32h743zi.rs deleted file mode 100644 index c1162ba7..00000000 --- a/embassy-stm32/src/pac/stm32h743zi.rs +++ /dev/null @@ -1,1048 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h745bg.rs b/embassy-stm32/src/pac/stm32h745bg.rs deleted file mode 100644 index 259e34ed..00000000 --- a/embassy-stm32/src/pac/stm32h745bg.rs +++ /dev/null @@ -1,1062 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h745bi.rs b/embassy-stm32/src/pac/stm32h745bi.rs deleted file mode 100644 index 259e34ed..00000000 --- a/embassy-stm32/src/pac/stm32h745bi.rs +++ /dev/null @@ -1,1062 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h745ig.rs b/embassy-stm32/src/pac/stm32h745ig.rs deleted file mode 100644 index 259e34ed..00000000 --- a/embassy-stm32/src/pac/stm32h745ig.rs +++ /dev/null @@ -1,1062 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h745ii.rs b/embassy-stm32/src/pac/stm32h745ii.rs deleted file mode 100644 index 259e34ed..00000000 --- a/embassy-stm32/src/pac/stm32h745ii.rs +++ /dev/null @@ -1,1062 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h745xg.rs b/embassy-stm32/src/pac/stm32h745xg.rs deleted file mode 100644 index 259e34ed..00000000 --- a/embassy-stm32/src/pac/stm32h745xg.rs +++ /dev/null @@ -1,1062 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h745xi.rs b/embassy-stm32/src/pac/stm32h745xi.rs deleted file mode 100644 index 259e34ed..00000000 --- a/embassy-stm32/src/pac/stm32h745xi.rs +++ /dev/null @@ -1,1062 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h745zg.rs b/embassy-stm32/src/pac/stm32h745zg.rs deleted file mode 100644 index 259e34ed..00000000 --- a/embassy-stm32/src/pac/stm32h745zg.rs +++ /dev/null @@ -1,1062 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h745zi.rs b/embassy-stm32/src/pac/stm32h745zi.rs deleted file mode 100644 index 259e34ed..00000000 --- a/embassy-stm32/src/pac/stm32h745zi.rs +++ /dev/null @@ -1,1062 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747ag.rs b/embassy-stm32/src/pac/stm32h747ag.rs deleted file mode 100644 index ed397bf6..00000000 --- a/embassy-stm32/src/pac/stm32h747ag.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747ai.rs b/embassy-stm32/src/pac/stm32h747ai.rs deleted file mode 100644 index ed397bf6..00000000 --- a/embassy-stm32/src/pac/stm32h747ai.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747bg.rs b/embassy-stm32/src/pac/stm32h747bg.rs deleted file mode 100644 index ed397bf6..00000000 --- a/embassy-stm32/src/pac/stm32h747bg.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747bi.rs b/embassy-stm32/src/pac/stm32h747bi.rs deleted file mode 100644 index ed397bf6..00000000 --- a/embassy-stm32/src/pac/stm32h747bi.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747ig.rs b/embassy-stm32/src/pac/stm32h747ig.rs deleted file mode 100644 index ed397bf6..00000000 --- a/embassy-stm32/src/pac/stm32h747ig.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747ii.rs b/embassy-stm32/src/pac/stm32h747ii.rs deleted file mode 100644 index ed397bf6..00000000 --- a/embassy-stm32/src/pac/stm32h747ii.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747xg.rs b/embassy-stm32/src/pac/stm32h747xg.rs deleted file mode 100644 index ed397bf6..00000000 --- a/embassy-stm32/src/pac/stm32h747xg.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747xi.rs b/embassy-stm32/src/pac/stm32h747xi.rs deleted file mode 100644 index ed397bf6..00000000 --- a/embassy-stm32/src/pac/stm32h747xi.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h747zi.rs b/embassy-stm32/src/pac/stm32h747zi.rs deleted file mode 100644 index a830d2d5..00000000 --- a/embassy-stm32/src/pac/stm32h747zi.rs +++ /dev/null @@ -1,1054 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h750ib.rs b/embassy-stm32/src/pac/stm32h750ib.rs deleted file mode 100644 index 67be74e7..00000000 --- a/embassy-stm32/src/pac/stm32h750ib.rs +++ /dev/null @@ -1,1051 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h750vb.rs b/embassy-stm32/src/pac/stm32h750vb.rs deleted file mode 100644 index b6ec3702..00000000 --- a/embassy-stm32/src/pac/stm32h750vb.rs +++ /dev/null @@ -1,1040 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h750xb.rs b/embassy-stm32/src/pac/stm32h750xb.rs deleted file mode 100644 index 67be74e7..00000000 --- a/embassy-stm32/src/pac/stm32h750xb.rs +++ /dev/null @@ -1,1051 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h750zb.rs b/embassy-stm32/src/pac/stm32h750zb.rs deleted file mode 100644 index 67be74e7..00000000 --- a/embassy-stm32/src/pac/stm32h750zb.rs +++ /dev/null @@ -1,1051 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h753ai.rs b/embassy-stm32/src/pac/stm32h753ai.rs deleted file mode 100644 index 67be74e7..00000000 --- a/embassy-stm32/src/pac/stm32h753ai.rs +++ /dev/null @@ -1,1051 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h753bi.rs b/embassy-stm32/src/pac/stm32h753bi.rs deleted file mode 100644 index 67be74e7..00000000 --- a/embassy-stm32/src/pac/stm32h753bi.rs +++ /dev/null @@ -1,1051 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h753ii.rs b/embassy-stm32/src/pac/stm32h753ii.rs deleted file mode 100644 index 67be74e7..00000000 --- a/embassy-stm32/src/pac/stm32h753ii.rs +++ /dev/null @@ -1,1051 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h753vi.rs b/embassy-stm32/src/pac/stm32h753vi.rs deleted file mode 100644 index b6ec3702..00000000 --- a/embassy-stm32/src/pac/stm32h753vi.rs +++ /dev/null @@ -1,1040 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h753xi.rs b/embassy-stm32/src/pac/stm32h753xi.rs deleted file mode 100644 index 67be74e7..00000000 --- a/embassy-stm32/src/pac/stm32h753xi.rs +++ /dev/null @@ -1,1051 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h753zi.rs b/embassy-stm32/src/pac/stm32h753zi.rs deleted file mode 100644 index 67be74e7..00000000 --- a/embassy-stm32/src/pac/stm32h753zi.rs +++ /dev/null @@ -1,1051 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h755bi.rs b/embassy-stm32/src/pac/stm32h755bi.rs deleted file mode 100644 index 316c62bc..00000000 --- a/embassy-stm32/src/pac/stm32h755bi.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h755ii.rs b/embassy-stm32/src/pac/stm32h755ii.rs deleted file mode 100644 index 316c62bc..00000000 --- a/embassy-stm32/src/pac/stm32h755ii.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h755xi.rs b/embassy-stm32/src/pac/stm32h755xi.rs deleted file mode 100644 index 316c62bc..00000000 --- a/embassy-stm32/src/pac/stm32h755xi.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h755zi.rs b/embassy-stm32/src/pac/stm32h755zi.rs deleted file mode 100644 index 316c62bc..00000000 --- a/embassy-stm32/src/pac/stm32h755zi.rs +++ /dev/null @@ -1,1065 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h757ai.rs b/embassy-stm32/src/pac/stm32h757ai.rs deleted file mode 100644 index e3fe0cfb..00000000 --- a/embassy-stm32/src/pac/stm32h757ai.rs +++ /dev/null @@ -1,1068 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h757bi.rs b/embassy-stm32/src/pac/stm32h757bi.rs deleted file mode 100644 index e3fe0cfb..00000000 --- a/embassy-stm32/src/pac/stm32h757bi.rs +++ /dev/null @@ -1,1068 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h757ii.rs b/embassy-stm32/src/pac/stm32h757ii.rs deleted file mode 100644 index e3fe0cfb..00000000 --- a/embassy-stm32/src/pac/stm32h757ii.rs +++ /dev/null @@ -1,1068 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h757xi.rs b/embassy-stm32/src/pac/stm32h757xi.rs deleted file mode 100644 index e3fe0cfb..00000000 --- a/embassy-stm32/src/pac/stm32h757xi.rs +++ /dev/null @@ -1,1068 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h757zi.rs b/embassy-stm32/src/pac/stm32h757zi.rs deleted file mode 100644 index 682fd38e..00000000 --- a/embassy-stm32/src/pac/stm32h757zi.rs +++ /dev/null @@ -1,1057 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RCC: rcc::Rcc = rcc::Rcc(0x58024400 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rcc_h7 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RCC, RNG, SDMMC1, SDMMC2, SPI1, - SPI2, SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - ADC3 = 127, - BDMA_Channel0 = 129, - BDMA_Channel1 = 130, - BDMA_Channel2 = 131, - BDMA_Channel3 = 132, - BDMA_Channel4 = 133, - BDMA_Channel5 = 134, - BDMA_Channel6 = 135, - BDMA_Channel7 = 136, - CEC = 94, - CM4_SEV = 65, - CM7_SEV = 64, - CRS = 144, - CRYP = 79, - DCMI = 78, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DSI = 123, - ECC = 145, - ETH = 61, - ETH_WKUP = 62, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - HOLD_CORE = 148, - HRTIM1_FLT = 109, - HRTIM1_Master = 103, - HRTIM1_TIMA = 104, - HRTIM1_TIMB = 105, - HRTIM1_TIMC = 106, - HRTIM1_TIMD = 107, - HRTIM1_TIME = 108, - HSEM1 = 125, - HSEM2 = 126, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPTIM4 = 140, - LPTIM5 = 141, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OTG_FS = 101, - OTG_FS_EP1_IN = 99, - OTG_FS_EP1_OUT = 98, - OTG_FS_WKUP = 100, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_AVD = 1, - QUADSPI = 92, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SAI3 = 114, - SAI4 = 146, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TAMP_STAMP = 2, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(ADC3); - declare!(BDMA_Channel0); - declare!(BDMA_Channel1); - declare!(BDMA_Channel2); - declare!(BDMA_Channel3); - declare!(BDMA_Channel4); - declare!(BDMA_Channel5); - declare!(BDMA_Channel6); - declare!(BDMA_Channel7); - declare!(CEC); - declare!(CM4_SEV); - declare!(CM7_SEV); - declare!(CRS); - declare!(CRYP); - declare!(DCMI); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DSI); - declare!(ECC); - declare!(ETH); - declare!(ETH_WKUP); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(HOLD_CORE); - declare!(HRTIM1_FLT); - declare!(HRTIM1_Master); - declare!(HRTIM1_TIMA); - declare!(HRTIM1_TIMB); - declare!(HRTIM1_TIMC); - declare!(HRTIM1_TIMD); - declare!(HRTIM1_TIME); - declare!(HSEM1); - declare!(HSEM2); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPTIM4); - declare!(LPTIM5); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OTG_FS); - declare!(OTG_FS_EP1_IN); - declare!(OTG_FS_EP1_OUT); - declare!(OTG_FS_WKUP); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_AVD); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SAI3); - declare!(SAI4); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn ADC3(); - fn BDMA_Channel0(); - fn BDMA_Channel1(); - fn BDMA_Channel2(); - fn BDMA_Channel3(); - fn BDMA_Channel4(); - fn BDMA_Channel5(); - fn BDMA_Channel6(); - fn BDMA_Channel7(); - fn CEC(); - fn CM4_SEV(); - fn CM7_SEV(); - fn CRS(); - fn CRYP(); - fn DCMI(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DSI(); - fn ECC(); - fn ETH(); - fn ETH_WKUP(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn HOLD_CORE(); - fn HRTIM1_FLT(); - fn HRTIM1_Master(); - fn HRTIM1_TIMA(); - fn HRTIM1_TIMB(); - fn HRTIM1_TIMC(); - fn HRTIM1_TIMD(); - fn HRTIM1_TIME(); - fn HSEM1(); - fn HSEM2(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPTIM4(); - fn LPTIM5(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OTG_FS(); - fn OTG_FS_EP1_IN(); - fn OTG_FS_EP1_OUT(); - fn OTG_FS_WKUP(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_AVD(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SAI3(); - fn SAI4(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 150] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_AVD }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _handler: ETH }, - Vector { _handler: ETH_WKUP }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { _handler: CM7_SEV }, - Vector { _handler: CM4_SEV }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { _handler: DCMI }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: QUADSPI }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { - _handler: OTG_FS_EP1_OUT, - }, - Vector { - _handler: OTG_FS_EP1_IN, - }, - Vector { - _handler: OTG_FS_WKUP, - }, - Vector { _handler: OTG_FS }, - Vector { _reserved: 0 }, - Vector { - _handler: HRTIM1_Master, - }, - Vector { - _handler: HRTIM1_TIMA, - }, - Vector { - _handler: HRTIM1_TIMB, - }, - Vector { - _handler: HRTIM1_TIMC, - }, - Vector { - _handler: HRTIM1_TIMD, - }, - Vector { - _handler: HRTIM1_TIME, - }, - Vector { - _handler: HRTIM1_FLT, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SAI3 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _handler: DSI }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _handler: HSEM2 }, - Vector { _handler: ADC3 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA_Channel0, - }, - Vector { - _handler: BDMA_Channel1, - }, - Vector { - _handler: BDMA_Channel2, - }, - Vector { - _handler: BDMA_Channel3, - }, - Vector { - _handler: BDMA_Channel4, - }, - Vector { - _handler: BDMA_Channel5, - }, - Vector { - _handler: BDMA_Channel6, - }, - Vector { - _handler: BDMA_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: LPTIM4 }, - Vector { _handler: LPTIM5 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _handler: SAI4 }, - Vector { _reserved: 0 }, - Vector { - _handler: HOLD_CORE, - }, - Vector { - _handler: WAKEUP_PIN, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3ag.rs b/embassy-stm32/src/pac/stm32h7a3ag.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3ag.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3ai.rs b/embassy-stm32/src/pac/stm32h7a3ai.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3ai.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3ig.rs b/embassy-stm32/src/pac/stm32h7a3ig.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3ig.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3ii.rs b/embassy-stm32/src/pac/stm32h7a3ii.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3ii.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3lg.rs b/embassy-stm32/src/pac/stm32h7a3lg.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3lg.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3li.rs b/embassy-stm32/src/pac/stm32h7a3li.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3li.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3ng.rs b/embassy-stm32/src/pac/stm32h7a3ng.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3ng.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3ni.rs b/embassy-stm32/src/pac/stm32h7a3ni.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3ni.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3qi.rs b/embassy-stm32/src/pac/stm32h7a3qi.rs deleted file mode 100644 index 61f719c6..00000000 --- a/embassy-stm32/src/pac/stm32h7a3qi.rs +++ /dev/null @@ -1,1030 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3rg.rs b/embassy-stm32/src/pac/stm32h7a3rg.rs deleted file mode 100644 index 98193a34..00000000 --- a/embassy-stm32/src/pac/stm32h7a3rg.rs +++ /dev/null @@ -1,1014 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3ri.rs b/embassy-stm32/src/pac/stm32h7a3ri.rs deleted file mode 100644 index 98193a34..00000000 --- a/embassy-stm32/src/pac/stm32h7a3ri.rs +++ /dev/null @@ -1,1014 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3vg.rs b/embassy-stm32/src/pac/stm32h7a3vg.rs deleted file mode 100644 index 61f719c6..00000000 --- a/embassy-stm32/src/pac/stm32h7a3vg.rs +++ /dev/null @@ -1,1030 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3vi.rs b/embassy-stm32/src/pac/stm32h7a3vi.rs deleted file mode 100644 index 61f719c6..00000000 --- a/embassy-stm32/src/pac/stm32h7a3vi.rs +++ /dev/null @@ -1,1030 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3zg.rs b/embassy-stm32/src/pac/stm32h7a3zg.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3zg.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7a3zi.rs b/embassy-stm32/src/pac/stm32h7a3zi.rs deleted file mode 100644 index f5bfc4ac..00000000 --- a/embassy-stm32/src/pac/stm32h7a3zi.rs +++ /dev/null @@ -1,1041 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b0ab.rs b/embassy-stm32/src/pac/stm32h7b0ab.rs deleted file mode 100644 index 815c4414..00000000 --- a/embassy-stm32/src/pac/stm32h7b0ab.rs +++ /dev/null @@ -1,1050 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b0ib.rs b/embassy-stm32/src/pac/stm32h7b0ib.rs deleted file mode 100644 index 815c4414..00000000 --- a/embassy-stm32/src/pac/stm32h7b0ib.rs +++ /dev/null @@ -1,1050 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b0rb.rs b/embassy-stm32/src/pac/stm32h7b0rb.rs deleted file mode 100644 index 1c57ffd8..00000000 --- a/embassy-stm32/src/pac/stm32h7b0rb.rs +++ /dev/null @@ -1,1023 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b0vb.rs b/embassy-stm32/src/pac/stm32h7b0vb.rs deleted file mode 100644 index f9ef389f..00000000 --- a/embassy-stm32/src/pac/stm32h7b0vb.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b0zb.rs b/embassy-stm32/src/pac/stm32h7b0zb.rs deleted file mode 100644 index 815c4414..00000000 --- a/embassy-stm32/src/pac/stm32h7b0zb.rs +++ /dev/null @@ -1,1050 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b3ai.rs b/embassy-stm32/src/pac/stm32h7b3ai.rs deleted file mode 100644 index 815c4414..00000000 --- a/embassy-stm32/src/pac/stm32h7b3ai.rs +++ /dev/null @@ -1,1050 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b3ii.rs b/embassy-stm32/src/pac/stm32h7b3ii.rs deleted file mode 100644 index 815c4414..00000000 --- a/embassy-stm32/src/pac/stm32h7b3ii.rs +++ /dev/null @@ -1,1050 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b3li.rs b/embassy-stm32/src/pac/stm32h7b3li.rs deleted file mode 100644 index 815c4414..00000000 --- a/embassy-stm32/src/pac/stm32h7b3li.rs +++ /dev/null @@ -1,1050 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b3ni.rs b/embassy-stm32/src/pac/stm32h7b3ni.rs deleted file mode 100644 index 815c4414..00000000 --- a/embassy-stm32/src/pac/stm32h7b3ni.rs +++ /dev/null @@ -1,1050 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b3qi.rs b/embassy-stm32/src/pac/stm32h7b3qi.rs deleted file mode 100644 index f9ef389f..00000000 --- a/embassy-stm32/src/pac/stm32h7b3qi.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b3ri.rs b/embassy-stm32/src/pac/stm32h7b3ri.rs deleted file mode 100644 index 1c57ffd8..00000000 --- a/embassy-stm32/src/pac/stm32h7b3ri.rs +++ /dev/null @@ -1,1023 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, SPI3, - SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b3vi.rs b/embassy-stm32/src/pac/stm32h7b3vi.rs deleted file mode 100644 index f9ef389f..00000000 --- a/embassy-stm32/src/pac/stm32h7b3vi.rs +++ /dev/null @@ -1,1039 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32h7b3zi.rs b/embassy-stm32/src/pac/stm32h7b3zi.rs deleted file mode 100644 index 815c4414..00000000 --- a/embassy-stm32/src/pac/stm32h7b3zi.rs +++ /dev/null @@ -1,1050 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x58020000 + 0x400 * n) as _) -} -pub const DBGMCU: dbgmcu::Dbgmcu = dbgmcu::Dbgmcu(0x5c001000 as _); -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x58000000 as _); -pub const FLASH: flash::Flash = flash::Flash(0x52002000 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x58020000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x58020400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x58020800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x58020c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x58021000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x58021400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x58021800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x58021c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x58022000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const GPIOJ: gpio::Gpio = gpio::Gpio(0x58022400 as _); -impl_gpio_pin!(PJ0, 9, 0, EXTI0); -impl_gpio_pin!(PJ1, 9, 1, EXTI1); -impl_gpio_pin!(PJ2, 9, 2, EXTI2); -impl_gpio_pin!(PJ3, 9, 3, EXTI3); -impl_gpio_pin!(PJ4, 9, 4, EXTI4); -impl_gpio_pin!(PJ5, 9, 5, EXTI5); -impl_gpio_pin!(PJ6, 9, 6, EXTI6); -impl_gpio_pin!(PJ7, 9, 7, EXTI7); -impl_gpio_pin!(PJ8, 9, 8, EXTI8); -impl_gpio_pin!(PJ9, 9, 9, EXTI9); -impl_gpio_pin!(PJ10, 9, 10, EXTI10); -impl_gpio_pin!(PJ11, 9, 11, EXTI11); -impl_gpio_pin!(PJ12, 9, 12, EXTI12); -impl_gpio_pin!(PJ13, 9, 13, EXTI13); -impl_gpio_pin!(PJ14, 9, 14, EXTI14); -impl_gpio_pin!(PJ15, 9, 15, EXTI15); -pub const GPIOK: gpio::Gpio = gpio::Gpio(0x58022800 as _); -impl_gpio_pin!(PK0, 10, 0, EXTI0); -impl_gpio_pin!(PK1, 10, 1, EXTI1); -impl_gpio_pin!(PK2, 10, 2, EXTI2); -impl_gpio_pin!(PK3, 10, 3, EXTI3); -impl_gpio_pin!(PK4, 10, 4, EXTI4); -impl_gpio_pin!(PK5, 10, 5, EXTI5); -impl_gpio_pin!(PK6, 10, 6, EXTI6); -impl_gpio_pin!(PK7, 10, 7, EXTI7); -impl_gpio_pin!(PK8, 10, 8, EXTI8); -impl_gpio_pin!(PK9, 10, 9, EXTI9); -impl_gpio_pin!(PK10, 10, 10, EXTI10); -impl_gpio_pin!(PK11, 10, 11, EXTI11); -impl_gpio_pin!(PK12, 10, 12, EXTI12); -impl_gpio_pin!(PK13, 10, 13, EXTI13); -impl_gpio_pin!(PK14, 10, 14, EXTI14); -impl_gpio_pin!(PK15, 10, 15, EXTI15); -pub const I2C1: i2c::I2c = i2c::I2c(0x40005400 as _); -impl_i2c!(I2C1); -impl_i2c_pin!(I2C1, SclPin, PB6, 4); -impl_i2c_pin!(I2C1, SdaPin, PB7, 4); -impl_i2c_pin!(I2C1, SclPin, PB8, 4); -impl_i2c_pin!(I2C1, SdaPin, PB9, 4); -pub const I2C2: i2c::I2c = i2c::I2c(0x40005800 as _); -impl_i2c!(I2C2); -impl_i2c_pin!(I2C2, SclPin, PB10, 4); -impl_i2c_pin!(I2C2, SdaPin, PB11, 4); -impl_i2c_pin!(I2C2, SdaPin, PF0, 4); -impl_i2c_pin!(I2C2, SclPin, PF1, 4); -impl_i2c_pin!(I2C2, SclPin, PH4, 4); -impl_i2c_pin!(I2C2, SdaPin, PH5, 4); -pub const I2C3: i2c::I2c = i2c::I2c(0x40005c00 as _); -impl_i2c!(I2C3); -impl_i2c_pin!(I2C3, SclPin, PA8, 4); -impl_i2c_pin!(I2C3, SdaPin, PC9, 4); -impl_i2c_pin!(I2C3, SclPin, PH7, 4); -impl_i2c_pin!(I2C3, SdaPin, PH8, 4); -pub const I2C4: i2c::I2c = i2c::I2c(0x58001c00 as _); -impl_i2c!(I2C4); -impl_i2c_pin!(I2C4, SclPin, PB6, 6); -impl_i2c_pin!(I2C4, SdaPin, PB7, 6); -impl_i2c_pin!(I2C4, SclPin, PB8, 6); -impl_i2c_pin!(I2C4, SdaPin, PB9, 6); -impl_i2c_pin!(I2C4, SclPin, PD12, 4); -impl_i2c_pin!(I2C4, SdaPin, PD13, 4); -impl_i2c_pin!(I2C4, SclPin, PF14, 4); -impl_i2c_pin!(I2C4, SdaPin, PF15, 4); -impl_i2c_pin!(I2C4, SclPin, PH11, 4); -impl_i2c_pin!(I2C4, SdaPin, PH12, 4); -pub const PWR: pwr::Pwr = pwr::Pwr(0x58024800 as _); -pub const RNG: rng::Rng = rng::Rng(0x48021800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SDMMC1: sdmmc::Sdmmc = sdmmc::Sdmmc(0x52007000 as _); -impl_sdmmc!(SDMMC1); -impl_sdmmc_pin!(SDMMC1, D0Pin, PB13, 12); -impl_sdmmc_pin!(SDMMC1, D4Pin, PB8, 12); -impl_sdmmc_pin!(SDMMC1, D5Pin, PB9, 12); -impl_sdmmc_pin!(SDMMC1, D2Pin, PC10, 12); -impl_sdmmc_pin!(SDMMC1, D3Pin, PC11, 12); -impl_sdmmc_pin!(SDMMC1, CkPin, PC12, 12); -impl_sdmmc_pin!(SDMMC1, D6Pin, PC6, 12); -impl_sdmmc_pin!(SDMMC1, D7Pin, PC7, 12); -impl_sdmmc_pin!(SDMMC1, D0Pin, PC8, 12); -impl_sdmmc_pin!(SDMMC1, D1Pin, PC9, 12); -impl_sdmmc_pin!(SDMMC1, CmdPin, PD2, 12); -pub const SDMMC2: sdmmc::Sdmmc = sdmmc::Sdmmc(0x48022400 as _); -impl_sdmmc!(SDMMC2); -impl_sdmmc_pin!(SDMMC2, CmdPin, PA0, 9); -impl_sdmmc_pin!(SDMMC2, D0Pin, PB14, 9); -impl_sdmmc_pin!(SDMMC2, D1Pin, PB15, 9); -impl_sdmmc_pin!(SDMMC2, D2Pin, PB3, 9); -impl_sdmmc_pin!(SDMMC2, D3Pin, PB4, 9); -impl_sdmmc_pin!(SDMMC2, D4Pin, PB8, 10); -impl_sdmmc_pin!(SDMMC2, D5Pin, PB9, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PC1, 9); -impl_sdmmc_pin!(SDMMC2, D6Pin, PC6, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PC7, 10); -impl_sdmmc_pin!(SDMMC2, CkPin, PD6, 11); -impl_sdmmc_pin!(SDMMC2, CmdPin, PD7, 11); -impl_sdmmc_pin!(SDMMC2, D1Pin, PG10, 11); -impl_sdmmc_pin!(SDMMC2, D2Pin, PG11, 10); -impl_sdmmc_pin!(SDMMC2, D3Pin, PG12, 10); -impl_sdmmc_pin!(SDMMC2, D6Pin, PG13, 10); -impl_sdmmc_pin!(SDMMC2, D7Pin, PG14, 10); -impl_sdmmc_pin!(SDMMC2, D0Pin, PG9, 11); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, MosiPin, PD7, 5); -impl_spi_pin!(SPI1, SckPin, PG11, 5); -impl_spi_pin!(SPI1, MisoPin, PG9, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA12, 5); -impl_spi_pin!(SPI2, SckPin, PA9, 5); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, MosiPin, PB2, 7); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 7); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -pub const SPI4: spi::Spi = spi::Spi(0x40013400 as _); -impl_spi!(SPI4, APB2); -impl_spi_pin!(SPI4, SckPin, PE12, 5); -impl_spi_pin!(SPI4, MisoPin, PE13, 5); -impl_spi_pin!(SPI4, MosiPin, PE14, 5); -impl_spi_pin!(SPI4, SckPin, PE2, 5); -impl_spi_pin!(SPI4, MisoPin, PE5, 5); -impl_spi_pin!(SPI4, MosiPin, PE6, 5); -pub const SPI5: spi::Spi = spi::Spi(0x40015000 as _); -impl_spi!(SPI5, APB2); -impl_spi_pin!(SPI5, MosiPin, PF11, 5); -impl_spi_pin!(SPI5, SckPin, PF7, 5); -impl_spi_pin!(SPI5, MisoPin, PF8, 5); -impl_spi_pin!(SPI5, MosiPin, PF9, 5); -impl_spi_pin!(SPI5, SckPin, PH6, 5); -impl_spi_pin!(SPI5, MisoPin, PH7, 5); -impl_spi_pin!(SPI5, MosiPin, PJ10, 5); -impl_spi_pin!(SPI5, MisoPin, PJ11, 5); -impl_spi_pin!(SPI5, SckPin, PK0, 5); -pub const SPI6: spi::Spi = spi::Spi(0x58001400 as _); -impl_spi!(SPI6, APB4); -impl_spi_pin!(SPI6, SckPin, PA5, 8); -impl_spi_pin!(SPI6, MisoPin, PA6, 8); -impl_spi_pin!(SPI6, MosiPin, PA7, 8); -impl_spi_pin!(SPI6, SckPin, PB3, 8); -impl_spi_pin!(SPI6, MisoPin, PB4, 8); -impl_spi_pin!(SPI6, MosiPin, PB5, 8); -impl_spi_pin!(SPI6, SckPin, PC12, 5); -impl_spi_pin!(SPI6, MisoPin, PG12, 5); -impl_spi_pin!(SPI6, SckPin, PG13, 5); -impl_spi_pin!(SPI6, MosiPin, PG14, 5); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x58000400 as _); -pub use super::regs::dbgmcu_h7 as dbgmcu; -pub use super::regs::dma_v2 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::flash_h7 as flash; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::i2c_v2 as i2c; -pub use super::regs::pwr_h7 as pwr; -pub use super::regs::rng_v1 as rng; -pub use super::regs::sdmmc_v2 as sdmmc; -pub use super::regs::spi_v3 as spi; -pub use super::regs::syscfg_h7 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DBGMCU, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, - DMA1_CH6, DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, - DMA2_CH7, EXTI, FLASH, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, - PA13, PA14, PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, - PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, - PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, - PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, - PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, - PG4, PG5, PG6, PG7, PG8, PG9, PG10, PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, - PI8, PI9, PI10, PI11, PI12, PI13, PI14, PI15, PJ0, PJ1, PJ2, PJ3, PJ4, PJ5, PJ6, PJ7, PJ8, PJ9, - PJ10, PJ11, PJ12, PJ13, PJ14, PJ15, PK0, PK1, PK2, PK3, PK4, PK5, PK6, PK7, PK8, PK9, PK10, - PK11, PK12, PK13, PK14, PK15, I2C1, I2C2, I2C3, I2C4, PWR, RNG, SDMMC1, SDMMC2, SPI1, SPI2, - SPI3, SPI4, SPI5, SPI6, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC = 18, - BDMA1 = 154, - BDMA2_Channel0 = 129, - BDMA2_Channel1 = 130, - BDMA2_Channel2 = 131, - BDMA2_Channel3 = 132, - BDMA2_Channel4 = 133, - BDMA2_Channel5 = 134, - BDMA2_Channel6 = 135, - BDMA2_Channel7 = 136, - CEC = 94, - CRS = 144, - CRYP = 79, - DAC2 = 127, - DCMI_PSSI = 78, - DFSDM1_FLT4 = 64, - DFSDM1_FLT5 = 65, - DFSDM1_FLT6 = 66, - DFSDM1_FLT7 = 67, - DFSDM2 = 42, - DMA1_Stream0 = 11, - DMA1_Stream1 = 12, - DMA1_Stream2 = 13, - DMA1_Stream3 = 14, - DMA1_Stream4 = 15, - DMA1_Stream5 = 16, - DMA1_Stream6 = 17, - DMA1_Stream7 = 47, - DMA2D = 90, - DMA2_Stream0 = 56, - DMA2_Stream1 = 57, - DMA2_Stream2 = 58, - DMA2_Stream3 = 59, - DMA2_Stream4 = 60, - DMA2_Stream5 = 68, - DMA2_Stream6 = 69, - DMA2_Stream7 = 70, - DTS = 147, - ECC = 145, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FDCAN1_IT0 = 19, - FDCAN1_IT1 = 21, - FDCAN2_IT0 = 20, - FDCAN2_IT1 = 22, - FDCAN_CAL = 63, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 153, - HASH_RNG = 80, - HSEM1 = 125, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 96, - I2C4_EV = 95, - JPEG = 121, - LPTIM1 = 93, - LPTIM2 = 138, - LPTIM3 = 139, - LPUART1 = 142, - LTDC = 88, - LTDC_ER = 89, - MDIOS = 120, - MDIOS_WKUP = 119, - MDMA = 122, - OCTOSPI1 = 92, - OCTOSPI2 = 150, - OTFDEC1 = 151, - OTFDEC2 = 152, - OTG_HS = 77, - OTG_HS_EP1_IN = 75, - OTG_HS_EP1_OUT = 74, - OTG_HS_WKUP = 76, - PVD_PVM = 1, - RCC = 5, - RTC_Alarm = 41, - RTC_TAMP_STAMP_CSS_LSE = 2, - RTC_WKUP = 3, - SAI1 = 87, - SAI2 = 91, - SDMMC1 = 49, - SDMMC2 = 124, - SPDIF_RX = 97, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SPI4 = 84, - SPI5 = 85, - SPI6 = 86, - SWPMI1 = 115, - TIM15 = 116, - TIM16 = 117, - TIM17 = 118, - TIM1_BRK = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK_TIM12 = 43, - TIM8_CC = 46, - TIM8_TRG_COM_TIM14 = 45, - TIM8_UP_TIM13 = 44, - UART4 = 52, - UART5 = 53, - UART7 = 82, - UART8 = 83, - UART9 = 140, - USART1 = 37, - USART10 = 141, - USART2 = 38, - USART3 = 39, - USART6 = 71, - WAKEUP_PIN = 149, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC); - declare!(BDMA1); - declare!(BDMA2_Channel0); - declare!(BDMA2_Channel1); - declare!(BDMA2_Channel2); - declare!(BDMA2_Channel3); - declare!(BDMA2_Channel4); - declare!(BDMA2_Channel5); - declare!(BDMA2_Channel6); - declare!(BDMA2_Channel7); - declare!(CEC); - declare!(CRS); - declare!(CRYP); - declare!(DAC2); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT4); - declare!(DFSDM1_FLT5); - declare!(DFSDM1_FLT6); - declare!(DFSDM1_FLT7); - declare!(DFSDM2); - declare!(DMA1_Stream0); - declare!(DMA1_Stream1); - declare!(DMA1_Stream2); - declare!(DMA1_Stream3); - declare!(DMA1_Stream4); - declare!(DMA1_Stream5); - declare!(DMA1_Stream6); - declare!(DMA1_Stream7); - declare!(DMA2D); - declare!(DMA2_Stream0); - declare!(DMA2_Stream1); - declare!(DMA2_Stream2); - declare!(DMA2_Stream3); - declare!(DMA2_Stream4); - declare!(DMA2_Stream5); - declare!(DMA2_Stream6); - declare!(DMA2_Stream7); - declare!(DTS); - declare!(ECC); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FDCAN1_IT0); - declare!(FDCAN1_IT1); - declare!(FDCAN2_IT0); - declare!(FDCAN2_IT1); - declare!(FDCAN_CAL); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_RNG); - declare!(HSEM1); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(JPEG); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPTIM3); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(MDIOS); - declare!(MDIOS_WKUP); - declare!(MDMA); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTFDEC1); - declare!(OTFDEC2); - declare!(OTG_HS); - declare!(OTG_HS_EP1_IN); - declare!(OTG_HS_EP1_OUT); - declare!(OTG_HS_WKUP); - declare!(PVD_PVM); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_TAMP_STAMP_CSS_LSE); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPDIF_RX); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SPI4); - declare!(SPI5); - declare!(SPI6); - declare!(SWPMI1); - declare!(TIM15); - declare!(TIM16); - declare!(TIM17); - declare!(TIM1_BRK); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK_TIM12); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM_TIM14); - declare!(TIM8_UP_TIM13); - declare!(UART4); - declare!(UART5); - declare!(UART7); - declare!(UART8); - declare!(UART9); - declare!(USART1); - declare!(USART10); - declare!(USART2); - declare!(USART3); - declare!(USART6); - declare!(WAKEUP_PIN); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC(); - fn BDMA1(); - fn BDMA2_Channel0(); - fn BDMA2_Channel1(); - fn BDMA2_Channel2(); - fn BDMA2_Channel3(); - fn BDMA2_Channel4(); - fn BDMA2_Channel5(); - fn BDMA2_Channel6(); - fn BDMA2_Channel7(); - fn CEC(); - fn CRS(); - fn CRYP(); - fn DAC2(); - fn DCMI_PSSI(); - fn DFSDM1_FLT4(); - fn DFSDM1_FLT5(); - fn DFSDM1_FLT6(); - fn DFSDM1_FLT7(); - fn DFSDM2(); - fn DMA1_Stream0(); - fn DMA1_Stream1(); - fn DMA1_Stream2(); - fn DMA1_Stream3(); - fn DMA1_Stream4(); - fn DMA1_Stream5(); - fn DMA1_Stream6(); - fn DMA1_Stream7(); - fn DMA2D(); - fn DMA2_Stream0(); - fn DMA2_Stream1(); - fn DMA2_Stream2(); - fn DMA2_Stream3(); - fn DMA2_Stream4(); - fn DMA2_Stream5(); - fn DMA2_Stream6(); - fn DMA2_Stream7(); - fn DTS(); - fn ECC(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FDCAN1_IT0(); - fn FDCAN1_IT1(); - fn FDCAN2_IT0(); - fn FDCAN2_IT1(); - fn FDCAN_CAL(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_RNG(); - fn HSEM1(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn JPEG(); - fn LPTIM1(); - fn LPTIM2(); - fn LPTIM3(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn MDIOS(); - fn MDIOS_WKUP(); - fn MDMA(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTFDEC1(); - fn OTFDEC2(); - fn OTG_HS(); - fn OTG_HS_EP1_IN(); - fn OTG_HS_EP1_OUT(); - fn OTG_HS_WKUP(); - fn PVD_PVM(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_TAMP_STAMP_CSS_LSE(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPDIF_RX(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SPI4(); - fn SPI5(); - fn SPI6(); - fn SWPMI1(); - fn TIM15(); - fn TIM16(); - fn TIM17(); - fn TIM1_BRK(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK_TIM12(); - fn TIM8_CC(); - fn TIM8_TRG_COM_TIM14(); - fn TIM8_UP_TIM13(); - fn UART4(); - fn UART5(); - fn UART7(); - fn UART8(); - fn UART9(); - fn USART1(); - fn USART10(); - fn USART2(); - fn USART3(); - fn USART6(); - fn WAKEUP_PIN(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 155] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: RTC_TAMP_STAMP_CSS_LSE, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Stream0, - }, - Vector { - _handler: DMA1_Stream1, - }, - Vector { - _handler: DMA1_Stream2, - }, - Vector { - _handler: DMA1_Stream3, - }, - Vector { - _handler: DMA1_Stream4, - }, - Vector { - _handler: DMA1_Stream5, - }, - Vector { - _handler: DMA1_Stream6, - }, - Vector { _handler: ADC }, - Vector { - _handler: FDCAN1_IT0, - }, - Vector { - _handler: FDCAN2_IT0, - }, - Vector { - _handler: FDCAN1_IT1, - }, - Vector { - _handler: FDCAN2_IT1, - }, - Vector { _handler: EXTI9_5 }, - Vector { _handler: TIM1_BRK }, - Vector { _handler: TIM1_UP }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _handler: DFSDM2 }, - Vector { - _handler: TIM8_BRK_TIM12, - }, - Vector { - _handler: TIM8_UP_TIM13, - }, - Vector { - _handler: TIM8_TRG_COM_TIM14, - }, - Vector { _handler: TIM8_CC }, - Vector { - _handler: DMA1_Stream7, - }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Stream0, - }, - Vector { - _handler: DMA2_Stream1, - }, - Vector { - _handler: DMA2_Stream2, - }, - Vector { - _handler: DMA2_Stream3, - }, - Vector { - _handler: DMA2_Stream4, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: FDCAN_CAL, - }, - Vector { - _handler: DFSDM1_FLT4, - }, - Vector { - _handler: DFSDM1_FLT5, - }, - Vector { - _handler: DFSDM1_FLT6, - }, - Vector { - _handler: DFSDM1_FLT7, - }, - Vector { - _handler: DMA2_Stream5, - }, - Vector { - _handler: DMA2_Stream6, - }, - Vector { - _handler: DMA2_Stream7, - }, - Vector { _handler: USART6 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { - _handler: OTG_HS_EP1_OUT, - }, - Vector { - _handler: OTG_HS_EP1_IN, - }, - Vector { - _handler: OTG_HS_WKUP, - }, - Vector { _handler: OTG_HS }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: CRYP }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: UART7 }, - Vector { _handler: UART8 }, - Vector { _handler: SPI4 }, - Vector { _handler: SPI5 }, - Vector { _handler: SPI6 }, - Vector { _handler: SAI1 }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: DMA2D }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: LPTIM1 }, - Vector { _handler: CEC }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: SPDIF_RX }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TIM15 }, - Vector { _handler: TIM16 }, - Vector { _handler: TIM17 }, - Vector { - _handler: MDIOS_WKUP, - }, - Vector { _handler: MDIOS }, - Vector { _handler: JPEG }, - Vector { _handler: MDMA }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC2 }, - Vector { _handler: HSEM1 }, - Vector { _reserved: 0 }, - Vector { _handler: DAC2 }, - Vector { _reserved: 0 }, - Vector { - _handler: BDMA2_Channel0, - }, - Vector { - _handler: BDMA2_Channel1, - }, - Vector { - _handler: BDMA2_Channel2, - }, - Vector { - _handler: BDMA2_Channel3, - }, - Vector { - _handler: BDMA2_Channel4, - }, - Vector { - _handler: BDMA2_Channel5, - }, - Vector { - _handler: BDMA2_Channel6, - }, - Vector { - _handler: BDMA2_Channel7, - }, - Vector { _reserved: 0 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: LPTIM3 }, - Vector { _handler: UART9 }, - Vector { _handler: USART10 }, - Vector { _handler: LPUART1 }, - Vector { _reserved: 0 }, - Vector { _handler: CRS }, - Vector { _handler: ECC }, - Vector { _reserved: 0 }, - Vector { _handler: DTS }, - Vector { _reserved: 0 }, - Vector { - _handler: WAKEUP_PIN, - }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: OTFDEC1 }, - Vector { _handler: OTFDEC2 }, - Vector { _handler: GFXMMU }, - Vector { _handler: BDMA1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l010c6.rs b/embassy-stm32/src/pac/stm32l010c6.rs deleted file mode 100644 index 74693fa5..00000000 --- a/embassy-stm32/src/pac/stm32l010c6.rs +++ /dev/null @@ -1,244 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _reserved: 0 }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l010f4.rs b/embassy-stm32/src/pac/stm32l010f4.rs deleted file mode 100644 index a8d70872..00000000 --- a/embassy-stm32/src/pac/stm32l010f4.rs +++ /dev/null @@ -1,226 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _reserved: 0 }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { _handler: ADC1 }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l010k4.rs b/embassy-stm32/src/pac/stm32l010k4.rs deleted file mode 100644 index a8d70872..00000000 --- a/embassy-stm32/src/pac/stm32l010k4.rs +++ /dev/null @@ -1,226 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _reserved: 0 }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { _handler: ADC1 }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l010k8.rs b/embassy-stm32/src/pac/stm32l010k8.rs deleted file mode 100644 index 0dadd62d..00000000 --- a/embassy-stm32/src/pac/stm32l010k8.rs +++ /dev/null @@ -1,254 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _reserved: 0 }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l010r8.rs b/embassy-stm32/src/pac/stm32l010r8.rs deleted file mode 100644 index 0dadd62d..00000000 --- a/embassy-stm32/src/pac/stm32l010r8.rs +++ /dev/null @@ -1,254 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _reserved: 0 }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l010rb.rs b/embassy-stm32/src/pac/stm32l010rb.rs deleted file mode 100644 index e68122c6..00000000 --- a/embassy-stm32/src/pac/stm32l010rb.rs +++ /dev/null @@ -1,275 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _reserved: 0 }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011d3.rs b/embassy-stm32/src/pac/stm32l011d3.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011d3.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011d4.rs b/embassy-stm32/src/pac/stm32l011d4.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011d4.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011e3.rs b/embassy-stm32/src/pac/stm32l011e3.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011e3.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011e4.rs b/embassy-stm32/src/pac/stm32l011e4.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011e4.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011f3.rs b/embassy-stm32/src/pac/stm32l011f3.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011f3.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011f4.rs b/embassy-stm32/src/pac/stm32l011f4.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011f4.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011g3.rs b/embassy-stm32/src/pac/stm32l011g3.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011g3.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011g4.rs b/embassy-stm32/src/pac/stm32l011g4.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011g4.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011k3.rs b/embassy-stm32/src/pac/stm32l011k3.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011k3.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l011k4.rs b/embassy-stm32/src/pac/stm32l011k4.rs deleted file mode 100644 index d0cc305e..00000000 --- a/embassy-stm32/src/pac/stm32l011k4.rs +++ /dev/null @@ -1,231 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l021d4.rs b/embassy-stm32/src/pac/stm32l021d4.rs deleted file mode 100644 index c1ec6530..00000000 --- a/embassy-stm32/src/pac/stm32l021d4.rs +++ /dev/null @@ -1,233 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l021f4.rs b/embassy-stm32/src/pac/stm32l021f4.rs deleted file mode 100644 index c1ec6530..00000000 --- a/embassy-stm32/src/pac/stm32l021f4.rs +++ /dev/null @@ -1,233 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l021g4.rs b/embassy-stm32/src/pac/stm32l021g4.rs deleted file mode 100644 index c1ec6530..00000000 --- a/embassy-stm32/src/pac/stm32l021g4.rs +++ /dev/null @@ -1,233 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l021k4.rs b/embassy-stm32/src/pac/stm32l021k4.rs deleted file mode 100644 index c1ec6530..00000000 --- a/embassy-stm32/src/pac/stm32l021k4.rs +++ /dev/null @@ -1,233 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC, - SYSCFG, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031c4.rs b/embassy-stm32/src/pac/stm32l031c4.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031c4.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031c6.rs b/embassy-stm32/src/pac/stm32l031c6.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031c6.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031e4.rs b/embassy-stm32/src/pac/stm32l031e4.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031e4.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031e6.rs b/embassy-stm32/src/pac/stm32l031e6.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031e6.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031f4.rs b/embassy-stm32/src/pac/stm32l031f4.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031f4.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031f6.rs b/embassy-stm32/src/pac/stm32l031f6.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031f6.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031g4.rs b/embassy-stm32/src/pac/stm32l031g4.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031g4.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031g6.rs b/embassy-stm32/src/pac/stm32l031g6.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031g6.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031k4.rs b/embassy-stm32/src/pac/stm32l031k4.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031k4.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l031k6.rs b/embassy-stm32/src/pac/stm32l031k6.rs deleted file mode 100644 index d07f9d5c..00000000 --- a/embassy-stm32/src/pac/stm32l031k6.rs +++ /dev/null @@ -1,252 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l041c4.rs b/embassy-stm32/src/pac/stm32l041c4.rs deleted file mode 100644 index 70723095..00000000 --- a/embassy-stm32/src/pac/stm32l041c4.rs +++ /dev/null @@ -1,254 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l041c6.rs b/embassy-stm32/src/pac/stm32l041c6.rs deleted file mode 100644 index 70723095..00000000 --- a/embassy-stm32/src/pac/stm32l041c6.rs +++ /dev/null @@ -1,254 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l041e6.rs b/embassy-stm32/src/pac/stm32l041e6.rs deleted file mode 100644 index 70723095..00000000 --- a/embassy-stm32/src/pac/stm32l041e6.rs +++ /dev/null @@ -1,254 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l041f6.rs b/embassy-stm32/src/pac/stm32l041f6.rs deleted file mode 100644 index 70723095..00000000 --- a/embassy-stm32/src/pac/stm32l041f6.rs +++ /dev/null @@ -1,254 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l041g6.rs b/embassy-stm32/src/pac/stm32l041g6.rs deleted file mode 100644 index 70723095..00000000 --- a/embassy-stm32/src/pac/stm32l041g6.rs +++ /dev/null @@ -1,254 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l041k6.rs b/embassy-stm32/src/pac/stm32l041k6.rs deleted file mode 100644 index 70723095..00000000 --- a/embassy-stm32/src/pac/stm32l041k6.rs +++ /dev/null @@ -1,254 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, RxPin, PA10, 4); -impl_usart_pin!(USART2, CtsPin, PA11, 4); -impl_usart_pin!(USART2, RtsPin, PA12, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -impl_usart_pin!(USART2, CtsPin, PA7, 4); -impl_usart_pin!(USART2, CkPin, PA8, 4); -impl_usart_pin!(USART2, TxPin, PA9, 4); -impl_usart_pin!(USART2, RtsPin, PB0, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, - PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l051c6.rs b/embassy-stm32/src/pac/stm32l051c6.rs deleted file mode 100644 index 0400bf51..00000000 --- a/embassy-stm32/src/pac/stm32l051c6.rs +++ /dev/null @@ -1,281 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6 = 17, - USART1 = 27, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l051c8.rs b/embassy-stm32/src/pac/stm32l051c8.rs deleted file mode 100644 index 0400bf51..00000000 --- a/embassy-stm32/src/pac/stm32l051c8.rs +++ /dev/null @@ -1,281 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6 = 17, - USART1 = 27, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l051k6.rs b/embassy-stm32/src/pac/stm32l051k6.rs deleted file mode 100644 index 0400bf51..00000000 --- a/embassy-stm32/src/pac/stm32l051k6.rs +++ /dev/null @@ -1,281 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6 = 17, - USART1 = 27, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l051k8.rs b/embassy-stm32/src/pac/stm32l051k8.rs deleted file mode 100644 index 0400bf51..00000000 --- a/embassy-stm32/src/pac/stm32l051k8.rs +++ /dev/null @@ -1,281 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6 = 17, - USART1 = 27, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l051r6.rs b/embassy-stm32/src/pac/stm32l051r6.rs deleted file mode 100644 index 0400bf51..00000000 --- a/embassy-stm32/src/pac/stm32l051r6.rs +++ /dev/null @@ -1,281 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6 = 17, - USART1 = 27, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l051r8.rs b/embassy-stm32/src/pac/stm32l051r8.rs deleted file mode 100644 index 0400bf51..00000000 --- a/embassy-stm32/src/pac/stm32l051r8.rs +++ /dev/null @@ -1,281 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6 = 17, - USART1 = 27, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l051t6.rs b/embassy-stm32/src/pac/stm32l051t6.rs deleted file mode 100644 index 0400bf51..00000000 --- a/embassy-stm32/src/pac/stm32l051t6.rs +++ /dev/null @@ -1,281 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6 = 17, - USART1 = 27, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l051t8.rs b/embassy-stm32/src/pac/stm32l051t8.rs deleted file mode 100644 index 0400bf51..00000000 --- a/embassy-stm32/src/pac/stm32l051t8.rs +++ /dev/null @@ -1,281 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6 = 17, - USART1 = 27, - USART2 = 28, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6); - declare!(USART1); - declare!(USART2); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6(); - fn USART1(); - fn USART2(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l052c6.rs b/embassy-stm32/src/pac/stm32l052c6.rs deleted file mode 100644 index c0ccd453..00000000 --- a/embassy-stm32/src/pac/stm32l052c6.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l052c8.rs b/embassy-stm32/src/pac/stm32l052c8.rs deleted file mode 100644 index c0ccd453..00000000 --- a/embassy-stm32/src/pac/stm32l052c8.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l052k6.rs b/embassy-stm32/src/pac/stm32l052k6.rs deleted file mode 100644 index c0ccd453..00000000 --- a/embassy-stm32/src/pac/stm32l052k6.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l052k8.rs b/embassy-stm32/src/pac/stm32l052k8.rs deleted file mode 100644 index c0ccd453..00000000 --- a/embassy-stm32/src/pac/stm32l052k8.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l052r6.rs b/embassy-stm32/src/pac/stm32l052r6.rs deleted file mode 100644 index c0ccd453..00000000 --- a/embassy-stm32/src/pac/stm32l052r6.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l052r8.rs b/embassy-stm32/src/pac/stm32l052r8.rs deleted file mode 100644 index c0ccd453..00000000 --- a/embassy-stm32/src/pac/stm32l052r8.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l052t6.rs b/embassy-stm32/src/pac/stm32l052t6.rs deleted file mode 100644 index c0ccd453..00000000 --- a/embassy-stm32/src/pac/stm32l052t6.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l052t8.rs b/embassy-stm32/src/pac/stm32l052t8.rs deleted file mode 100644 index c0ccd453..00000000 --- a/embassy-stm32/src/pac/stm32l052t8.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l053c6.rs b/embassy-stm32/src/pac/stm32l053c6.rs deleted file mode 100644 index 23df4047..00000000 --- a/embassy-stm32/src/pac/stm32l053c6.rs +++ /dev/null @@ -1,298 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l053c8.rs b/embassy-stm32/src/pac/stm32l053c8.rs deleted file mode 100644 index 23df4047..00000000 --- a/embassy-stm32/src/pac/stm32l053c8.rs +++ /dev/null @@ -1,298 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l053r6.rs b/embassy-stm32/src/pac/stm32l053r6.rs deleted file mode 100644 index 23df4047..00000000 --- a/embassy-stm32/src/pac/stm32l053r6.rs +++ /dev/null @@ -1,298 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l053r8.rs b/embassy-stm32/src/pac/stm32l053r8.rs deleted file mode 100644 index 23df4047..00000000 --- a/embassy-stm32/src/pac/stm32l053r8.rs +++ /dev/null @@ -1,298 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l062c8.rs b/embassy-stm32/src/pac/stm32l062c8.rs deleted file mode 100644 index 4a6c0eef..00000000 --- a/embassy-stm32/src/pac/stm32l062c8.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l062k8.rs b/embassy-stm32/src/pac/stm32l062k8.rs deleted file mode 100644 index 4a6c0eef..00000000 --- a/embassy-stm32/src/pac/stm32l062k8.rs +++ /dev/null @@ -1,295 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l063c8.rs b/embassy-stm32/src/pac/stm32l063c8.rs deleted file mode 100644 index 32d26733..00000000 --- a/embassy-stm32/src/pac/stm32l063c8.rs +++ /dev/null @@ -1,298 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l063r8.rs b/embassy-stm32/src/pac/stm32l063r8.rs deleted file mode 100644 index 32d26733..00000000 --- a/embassy-stm32/src/pac/stm32l063r8.rs +++ /dev/null @@ -1,298 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, - PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM6_DAC = 17, - TSC = 8, - USART1 = 27, - USART2 = 28, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM6_DAC); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM6_DAC(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071c8.rs b/embassy-stm32/src/pac/stm32l071c8.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071c8.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071cb.rs b/embassy-stm32/src/pac/stm32l071cb.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071cb.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071cz.rs b/embassy-stm32/src/pac/stm32l071cz.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071cz.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071k8.rs b/embassy-stm32/src/pac/stm32l071k8.rs deleted file mode 100644 index 7222da76..00000000 --- a/embassy-stm32/src/pac/stm32l071k8.rs +++ /dev/null @@ -1,325 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071kb.rs b/embassy-stm32/src/pac/stm32l071kb.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071kb.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071kz.rs b/embassy-stm32/src/pac/stm32l071kz.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071kz.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071rb.rs b/embassy-stm32/src/pac/stm32l071rb.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071rb.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071rz.rs b/embassy-stm32/src/pac/stm32l071rz.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071rz.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071v8.rs b/embassy-stm32/src/pac/stm32l071v8.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071v8.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071vb.rs b/embassy-stm32/src/pac/stm32l071vb.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071vb.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l071vz.rs b/embassy-stm32/src/pac/stm32l071vz.rs deleted file mode 100644 index dffaabe3..00000000 --- a/embassy-stm32/src/pac/stm32l071vz.rs +++ /dev/null @@ -1,338 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - LPUART1 = 29, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(LPUART1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn LPUART1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: LPUART1 }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072cb.rs b/embassy-stm32/src/pac/stm32l072cb.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072cb.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072cz.rs b/embassy-stm32/src/pac/stm32l072cz.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072cz.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072kb.rs b/embassy-stm32/src/pac/stm32l072kb.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072kb.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072kz.rs b/embassy-stm32/src/pac/stm32l072kz.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072kz.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072rb.rs b/embassy-stm32/src/pac/stm32l072rb.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072rb.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072rz.rs b/embassy-stm32/src/pac/stm32l072rz.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072rz.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072v8.rs b/embassy-stm32/src/pac/stm32l072v8.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072v8.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072vb.rs b/embassy-stm32/src/pac/stm32l072vb.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072vb.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l072vz.rs b/embassy-stm32/src/pac/stm32l072vz.rs deleted file mode 100644 index 265a2220..00000000 --- a/embassy-stm32/src/pac/stm32l072vz.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l073cb.rs b/embassy-stm32/src/pac/stm32l073cb.rs deleted file mode 100644 index 7936268c..00000000 --- a/embassy-stm32/src/pac/stm32l073cb.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l073cz.rs b/embassy-stm32/src/pac/stm32l073cz.rs deleted file mode 100644 index 7936268c..00000000 --- a/embassy-stm32/src/pac/stm32l073cz.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l073rb.rs b/embassy-stm32/src/pac/stm32l073rb.rs deleted file mode 100644 index 7936268c..00000000 --- a/embassy-stm32/src/pac/stm32l073rb.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l073rz.rs b/embassy-stm32/src/pac/stm32l073rz.rs deleted file mode 100644 index 7936268c..00000000 --- a/embassy-stm32/src/pac/stm32l073rz.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l073v8.rs b/embassy-stm32/src/pac/stm32l073v8.rs deleted file mode 100644 index 7936268c..00000000 --- a/embassy-stm32/src/pac/stm32l073v8.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l073vb.rs b/embassy-stm32/src/pac/stm32l073vb.rs deleted file mode 100644 index 7936268c..00000000 --- a/embassy-stm32/src/pac/stm32l073vb.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l073vz.rs b/embassy-stm32/src/pac/stm32l073vz.rs deleted file mode 100644 index 7936268c..00000000 --- a/embassy-stm32/src/pac/stm32l073vz.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RNG_LPUART1 = 29, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RNG_LPUART1); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RNG_LPUART1(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l081cb.rs b/embassy-stm32/src/pac/stm32l081cb.rs deleted file mode 100644 index 3b3d4b0a..00000000 --- a/embassy-stm32/src/pac/stm32l081cb.rs +++ /dev/null @@ -1,340 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l081cz.rs b/embassy-stm32/src/pac/stm32l081cz.rs deleted file mode 100644 index 3b3d4b0a..00000000 --- a/embassy-stm32/src/pac/stm32l081cz.rs +++ /dev/null @@ -1,340 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l081kz.rs b/embassy-stm32/src/pac/stm32l081kz.rs deleted file mode 100644 index 3b3d4b0a..00000000 --- a/embassy-stm32/src/pac/stm32l081kz.rs +++ /dev/null @@ -1,340 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, SYSCFG, USART1, USART2, USART4, - USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6 = 17, - TIM7 = 18, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6); - declare!(TIM7); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6(); - fn TIM7(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 30] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6 }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_LPUART1, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l082cz.rs b/embassy-stm32/src/pac/stm32l082cz.rs deleted file mode 100644 index 7de9b7d3..00000000 --- a/embassy-stm32/src/pac/stm32l082cz.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l082kb.rs b/embassy-stm32/src/pac/stm32l082kb.rs deleted file mode 100644 index 7de9b7d3..00000000 --- a/embassy-stm32/src/pac/stm32l082kb.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l082kz.rs b/embassy-stm32/src/pac/stm32l082kz.rs deleted file mode 100644 index 7de9b7d3..00000000 --- a/embassy-stm32/src/pac/stm32l082kz.rs +++ /dev/null @@ -1,351 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _reserved: 0 }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l083cb.rs b/embassy-stm32/src/pac/stm32l083cb.rs deleted file mode 100644 index e2ebad52..00000000 --- a/embassy-stm32/src/pac/stm32l083cb.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l083cz.rs b/embassy-stm32/src/pac/stm32l083cz.rs deleted file mode 100644 index e2ebad52..00000000 --- a/embassy-stm32/src/pac/stm32l083cz.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l083rb.rs b/embassy-stm32/src/pac/stm32l083rb.rs deleted file mode 100644 index e2ebad52..00000000 --- a/embassy-stm32/src/pac/stm32l083rb.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l083rz.rs b/embassy-stm32/src/pac/stm32l083rz.rs deleted file mode 100644 index e2ebad52..00000000 --- a/embassy-stm32/src/pac/stm32l083rz.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l083v8.rs b/embassy-stm32/src/pac/stm32l083v8.rs deleted file mode 100644 index e2ebad52..00000000 --- a/embassy-stm32/src/pac/stm32l083v8.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l083vb.rs b/embassy-stm32/src/pac/stm32l083vb.rs deleted file mode 100644 index e2ebad52..00000000 --- a/embassy-stm32/src/pac/stm32l083vb.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l083vz.rs b/embassy-stm32/src/pac/stm32l083vz.rs deleted file mode 100644 index e2ebad52..00000000 --- a/embassy-stm32/src/pac/stm32l083vz.rs +++ /dev/null @@ -1,354 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x50000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x50000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x50001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x50001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _); -pub const RNG: rng::Rng = rng::Rng(0x40025000 as _); -impl_rng!(RNG, AES_RNG_LPUART1); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 4); -impl_usart_pin!(USART1, CtsPin, PA11, 4); -impl_usart_pin!(USART1, RtsPin, PA12, 4); -impl_usart_pin!(USART1, CkPin, PA8, 4); -impl_usart_pin!(USART1, TxPin, PA9, 4); -impl_usart_pin!(USART1, RtsPin, PB3, 5); -impl_usart_pin!(USART1, CtsPin, PB4, 5); -impl_usart_pin!(USART1, CkPin, PB5, 5); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 4); -impl_usart_pin!(USART2, RtsPin, PA1, 4); -impl_usart_pin!(USART2, TxPin, PA14, 4); -impl_usart_pin!(USART2, RxPin, PA15, 4); -impl_usart_pin!(USART2, TxPin, PA2, 4); -impl_usart_pin!(USART2, RxPin, PA3, 4); -impl_usart_pin!(USART2, CkPin, PA4, 4); -pub const USART4: usart::Usart = usart::Usart(0x40004c00 as _); -impl_usart!(USART4); -impl_usart_pin!(USART4, TxPin, PA0, 6); -impl_usart_pin!(USART4, RxPin, PA1, 6); -impl_usart_pin!(USART4, RtsPin, PA15, 6); -impl_usart_pin!(USART4, CtsPin, PB7, 6); -impl_usart_pin!(USART4, TxPin, PC10, 6); -impl_usart_pin!(USART4, RxPin, PC11, 6); -impl_usart_pin!(USART4, CkPin, PC12, 6); -impl_usart_pin!(USART4, TxPin, PE8, 6); -impl_usart_pin!(USART4, RxPin, PE9, 6); -pub const USART5: usart::Usart = usart::Usart(0x40005000 as _); -impl_usart!(USART5); -impl_usart_pin!(USART5, TxPin, PB3, 6); -impl_usart_pin!(USART5, RxPin, PB4, 6); -impl_usart_pin!(USART5, RtsPin, PB5, 6); -impl_usart_pin!(USART5, CkPin, PB5, 6); -impl_usart_pin!(USART5, TxPin, PC12, 2); -impl_usart_pin!(USART5, RxPin, PD2, 6); -impl_usart_pin!(USART5, TxPin, PE10, 6); -impl_usart_pin!(USART5, RxPin, PE11, 6); -impl_usart_pin!(USART5, RtsPin, PE7, 6); -impl_usart_pin!(USART5, CkPin, PE7, 6); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rcc_l0 as rcc; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l0 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, - PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, - PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, - PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, - PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RCC, RNG, SYSCFG, USART1, USART2, - USART4, USART5 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - _ => DMA1, - } -} -impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_COMP = 12, - AES_RNG_LPUART1 = 29, - DMA1_Channel1 = 9, - DMA1_Channel2_3 = 10, - DMA1_Channel4_5_6_7 = 11, - EXTI0_1 = 5, - EXTI2_3 = 6, - EXTI4_15 = 7, - FLASH = 3, - I2C1 = 23, - I2C2 = 24, - I2C3 = 21, - LCD = 30, - LPTIM1 = 13, - PVD = 1, - RCC_CRS = 4, - RTC = 2, - SPI1 = 25, - SPI2 = 26, - TIM2 = 15, - TIM21 = 20, - TIM22 = 22, - TIM3 = 16, - TIM6_DAC = 17, - TIM7 = 18, - TSC = 8, - USART1 = 27, - USART2 = 28, - USART4_5 = 14, - USB = 31, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_COMP); - declare!(AES_RNG_LPUART1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2_3); - declare!(DMA1_Channel4_5_6_7); - declare!(EXTI0_1); - declare!(EXTI2_3); - declare!(EXTI4_15); - declare!(FLASH); - declare!(I2C1); - declare!(I2C2); - declare!(I2C3); - declare!(LCD); - declare!(LPTIM1); - declare!(PVD); - declare!(RCC_CRS); - declare!(RTC); - declare!(SPI1); - declare!(SPI2); - declare!(TIM2); - declare!(TIM21); - declare!(TIM22); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART4_5); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_COMP(); - fn AES_RNG_LPUART1(); - fn DMA1_Channel1(); - fn DMA1_Channel2_3(); - fn DMA1_Channel4_5_6_7(); - fn EXTI0_1(); - fn EXTI2_3(); - fn EXTI4_15(); - fn FLASH(); - fn I2C1(); - fn I2C2(); - fn I2C3(); - fn LCD(); - fn LPTIM1(); - fn PVD(); - fn RCC_CRS(); - fn RTC(); - fn SPI1(); - fn SPI2(); - fn TIM2(); - fn TIM21(); - fn TIM22(); - fn TIM3(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART4_5(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 32] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD }, - Vector { _handler: RTC }, - Vector { _handler: FLASH }, - Vector { _handler: RCC_CRS }, - Vector { _handler: EXTI0_1 }, - Vector { _handler: EXTI2_3 }, - Vector { _handler: EXTI4_15 }, - Vector { _handler: TSC }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2_3, - }, - Vector { - _handler: DMA1_Channel4_5_6_7, - }, - Vector { - _handler: ADC1_COMP, - }, - Vector { _handler: LPTIM1 }, - Vector { _handler: USART4_5 }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM21 }, - Vector { _handler: I2C3 }, - Vector { _handler: TIM22 }, - Vector { _handler: I2C1 }, - Vector { _handler: I2C2 }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { - _handler: AES_RNG_LPUART1, - }, - Vector { _handler: LCD }, - Vector { _handler: USB }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l412c8.rs b/embassy-stm32/src/pac/stm32l412c8.rs deleted file mode 100644 index cde7692a..00000000 --- a/embassy-stm32/src/pac/stm32l412c8.rs +++ /dev/null @@ -1,495 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l412cb.rs b/embassy-stm32/src/pac/stm32l412cb.rs deleted file mode 100644 index cde7692a..00000000 --- a/embassy-stm32/src/pac/stm32l412cb.rs +++ /dev/null @@ -1,495 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l412k8.rs b/embassy-stm32/src/pac/stm32l412k8.rs deleted file mode 100644 index a5dbc86a..00000000 --- a/embassy-stm32/src/pac/stm32l412k8.rs +++ /dev/null @@ -1,478 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l412kb.rs b/embassy-stm32/src/pac/stm32l412kb.rs deleted file mode 100644 index a5dbc86a..00000000 --- a/embassy-stm32/src/pac/stm32l412kb.rs +++ /dev/null @@ -1,478 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l412r8.rs b/embassy-stm32/src/pac/stm32l412r8.rs deleted file mode 100644 index cde7692a..00000000 --- a/embassy-stm32/src/pac/stm32l412r8.rs +++ /dev/null @@ -1,495 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l412rb.rs b/embassy-stm32/src/pac/stm32l412rb.rs deleted file mode 100644 index cde7692a..00000000 --- a/embassy-stm32/src/pac/stm32l412rb.rs +++ /dev/null @@ -1,495 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l412t8.rs b/embassy-stm32/src/pac/stm32l412t8.rs deleted file mode 100644 index a5dbc86a..00000000 --- a/embassy-stm32/src/pac/stm32l412t8.rs +++ /dev/null @@ -1,478 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l412tb.rs b/embassy-stm32/src/pac/stm32l412tb.rs deleted file mode 100644 index a5dbc86a..00000000 --- a/embassy-stm32/src/pac/stm32l412tb.rs +++ /dev/null @@ -1,478 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l422cb.rs b/embassy-stm32/src/pac/stm32l422cb.rs deleted file mode 100644 index b0ca3b49..00000000 --- a/embassy-stm32/src/pac/stm32l422cb.rs +++ /dev/null @@ -1,498 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l422kb.rs b/embassy-stm32/src/pac/stm32l422kb.rs deleted file mode 100644 index ef64a933..00000000 --- a/embassy-stm32/src/pac/stm32l422kb.rs +++ /dev/null @@ -1,481 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l422rb.rs b/embassy-stm32/src/pac/stm32l422rb.rs deleted file mode 100644 index b0ca3b49..00000000 --- a/embassy-stm32/src/pac/stm32l422rb.rs +++ /dev/null @@ -1,498 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l422tb.rs b/embassy-stm32/src/pac/stm32l422tb.rs deleted file mode 100644 index ef64a933..00000000 --- a/embassy-stm32/src/pac/stm32l422tb.rs +++ /dev/null @@ -1,481 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, - PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SPI1 = 35, - SPI2 = 36, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6 = 54, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SPI1); - declare!(SPI2); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SPI1(); - fn SPI2(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l431cb.rs b/embassy-stm32/src/pac/stm32l431cb.rs deleted file mode 100644 index 2f0dc000..00000000 --- a/embassy-stm32/src/pac/stm32l431cb.rs +++ /dev/null @@ -1,581 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l431cc.rs b/embassy-stm32/src/pac/stm32l431cc.rs deleted file mode 100644 index 2f0dc000..00000000 --- a/embassy-stm32/src/pac/stm32l431cc.rs +++ /dev/null @@ -1,581 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l431kb.rs b/embassy-stm32/src/pac/stm32l431kb.rs deleted file mode 100644 index 8933e049..00000000 --- a/embassy-stm32/src/pac/stm32l431kb.rs +++ /dev/null @@ -1,548 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI3, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l431kc.rs b/embassy-stm32/src/pac/stm32l431kc.rs deleted file mode 100644 index 8933e049..00000000 --- a/embassy-stm32/src/pac/stm32l431kc.rs +++ /dev/null @@ -1,548 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI3, SYSCFG, USART1, USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l431rb.rs b/embassy-stm32/src/pac/stm32l431rb.rs deleted file mode 100644 index 2f0dc000..00000000 --- a/embassy-stm32/src/pac/stm32l431rb.rs +++ /dev/null @@ -1,581 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l431rc.rs b/embassy-stm32/src/pac/stm32l431rc.rs deleted file mode 100644 index 2f0dc000..00000000 --- a/embassy-stm32/src/pac/stm32l431rc.rs +++ /dev/null @@ -1,581 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l431vc.rs b/embassy-stm32/src/pac/stm32l431vc.rs deleted file mode 100644 index 2f0dc000..00000000 --- a/embassy-stm32/src/pac/stm32l431vc.rs +++ /dev/null @@ -1,581 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l432kb.rs b/embassy-stm32/src/pac/stm32l432kb.rs deleted file mode 100644 index 7c5671d3..00000000 --- a/embassy-stm32/src/pac/stm32l432kb.rs +++ /dev/null @@ -1,493 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI3, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SPI1 = 35, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SPI1); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SPI1(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l432kc.rs b/embassy-stm32/src/pac/stm32l432kc.rs deleted file mode 100644 index 7c5671d3..00000000 --- a/embassy-stm32/src/pac/stm32l432kc.rs +++ /dev/null @@ -1,493 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI3, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SPI1 = 35, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SPI1); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SPI1(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l433cb.rs b/embassy-stm32/src/pac/stm32l433cb.rs deleted file mode 100644 index 06b6eba0..00000000 --- a/embassy-stm32/src/pac/stm32l433cb.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l433cc.rs b/embassy-stm32/src/pac/stm32l433cc.rs deleted file mode 100644 index 06b6eba0..00000000 --- a/embassy-stm32/src/pac/stm32l433cc.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l433rb.rs b/embassy-stm32/src/pac/stm32l433rb.rs deleted file mode 100644 index 06b6eba0..00000000 --- a/embassy-stm32/src/pac/stm32l433rb.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l433rc.rs b/embassy-stm32/src/pac/stm32l433rc.rs deleted file mode 100644 index 06b6eba0..00000000 --- a/embassy-stm32/src/pac/stm32l433rc.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l433vc.rs b/embassy-stm32/src/pac/stm32l433vc.rs deleted file mode 100644 index 06b6eba0..00000000 --- a/embassy-stm32/src/pac/stm32l433vc.rs +++ /dev/null @@ -1,587 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l442kc.rs b/embassy-stm32/src/pac/stm32l442kc.rs deleted file mode 100644 index f2bc15b3..00000000 --- a/embassy-stm32/src/pac/stm32l442kc.rs +++ /dev/null @@ -1,496 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PH0, PH1, PH2, PH3, PH4, PH5, - PH6, PH7, PH8, PH9, PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI3, SYSCFG, USART1, - USART2 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SPI1 = 35, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SPI1); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SPI1(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI1 }, - Vector { _reserved: 0 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _reserved: 0 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l443cc.rs b/embassy-stm32/src/pac/stm32l443cc.rs deleted file mode 100644 index 490bfa7d..00000000 --- a/embassy-stm32/src/pac/stm32l443cc.rs +++ /dev/null @@ -1,590 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l443rc.rs b/embassy-stm32/src/pac/stm32l443rc.rs deleted file mode 100644 index 490bfa7d..00000000 --- a/embassy-stm32/src/pac/stm32l443rc.rs +++ /dev/null @@ -1,590 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l443vc.rs b/embassy-stm32/src/pac/stm32l443vc.rs deleted file mode 100644 index 490bfa7d..00000000 --- a/embassy-stm32/src/pac/stm32l443vc.rs +++ /dev/null @@ -1,590 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM6_DAC = 54, - TIM7 = 55, - TSC = 77, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TSC); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM6_DAC(); - fn TIM7(); - fn TSC(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 83] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l451cc.rs b/embassy-stm32/src/pac/stm32l451cc.rs deleted file mode 100644 index fc936321..00000000 --- a/embassy-stm32/src/pac/stm32l451cc.rs +++ /dev/null @@ -1,565 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l451ce.rs b/embassy-stm32/src/pac/stm32l451ce.rs deleted file mode 100644 index fc936321..00000000 --- a/embassy-stm32/src/pac/stm32l451ce.rs +++ /dev/null @@ -1,565 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l451rc.rs b/embassy-stm32/src/pac/stm32l451rc.rs deleted file mode 100644 index fc936321..00000000 --- a/embassy-stm32/src/pac/stm32l451rc.rs +++ /dev/null @@ -1,565 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l451re.rs b/embassy-stm32/src/pac/stm32l451re.rs deleted file mode 100644 index fc936321..00000000 --- a/embassy-stm32/src/pac/stm32l451re.rs +++ /dev/null @@ -1,565 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l451vc.rs b/embassy-stm32/src/pac/stm32l451vc.rs deleted file mode 100644 index fc936321..00000000 --- a/embassy-stm32/src/pac/stm32l451vc.rs +++ /dev/null @@ -1,565 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l451ve.rs b/embassy-stm32/src/pac/stm32l451ve.rs deleted file mode 100644 index fc936321..00000000 --- a/embassy-stm32/src/pac/stm32l451ve.rs +++ /dev/null @@ -1,565 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l452cc.rs b/embassy-stm32/src/pac/stm32l452cc.rs deleted file mode 100644 index 027e2896..00000000 --- a/embassy-stm32/src/pac/stm32l452cc.rs +++ /dev/null @@ -1,568 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l452ce.rs b/embassy-stm32/src/pac/stm32l452ce.rs deleted file mode 100644 index 027e2896..00000000 --- a/embassy-stm32/src/pac/stm32l452ce.rs +++ /dev/null @@ -1,568 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l452rc.rs b/embassy-stm32/src/pac/stm32l452rc.rs deleted file mode 100644 index 027e2896..00000000 --- a/embassy-stm32/src/pac/stm32l452rc.rs +++ /dev/null @@ -1,568 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l452re.rs b/embassy-stm32/src/pac/stm32l452re.rs deleted file mode 100644 index 027e2896..00000000 --- a/embassy-stm32/src/pac/stm32l452re.rs +++ /dev/null @@ -1,568 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l452vc.rs b/embassy-stm32/src/pac/stm32l452vc.rs deleted file mode 100644 index 027e2896..00000000 --- a/embassy-stm32/src/pac/stm32l452vc.rs +++ /dev/null @@ -1,568 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l452ve.rs b/embassy-stm32/src/pac/stm32l452ve.rs deleted file mode 100644 index 027e2896..00000000 --- a/embassy-stm32/src/pac/stm32l452ve.rs +++ /dev/null @@ -1,568 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l462ce.rs b/embassy-stm32/src/pac/stm32l462ce.rs deleted file mode 100644 index c352e870..00000000 --- a/embassy-stm32/src/pac/stm32l462ce.rs +++ /dev/null @@ -1,571 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l462re.rs b/embassy-stm32/src/pac/stm32l462re.rs deleted file mode 100644 index c352e870..00000000 --- a/embassy-stm32/src/pac/stm32l462re.rs +++ /dev/null @@ -1,571 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l462ve.rs b/embassy-stm32/src/pac/stm32l462ve.rs deleted file mode 100644 index c352e870..00000000 --- a/embassy-stm32/src/pac/stm32l462ve.rs +++ /dev/null @@ -1,571 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, - PH10, PH11, PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM6_DAC = 54, - TSC = 77, - UART4 = 52, - USART1 = 37, - USART2 = 38, - USART3 = 39, - USB = 67, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM6_DAC); - declare!(TSC); - declare!(UART4); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(USB); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM6_DAC(); - fn TSC(); - fn UART4(); - fn USART1(); - fn USART2(); - fn USART3(); - fn USB(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 85] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _reserved: 0 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: SDMMC1 }, - Vector { _reserved: 0 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _reserved: 0 }, - Vector { _handler: TIM6_DAC }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: USB }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l471qe.rs b/embassy-stm32/src/pac/stm32l471qe.rs deleted file mode 100644 index 70113ece..00000000 --- a/embassy-stm32/src/pac/stm32l471qe.rs +++ /dev/null @@ -1,640 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l471qg.rs b/embassy-stm32/src/pac/stm32l471qg.rs deleted file mode 100644 index 70113ece..00000000 --- a/embassy-stm32/src/pac/stm32l471qg.rs +++ /dev/null @@ -1,640 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l471re.rs b/embassy-stm32/src/pac/stm32l471re.rs deleted file mode 100644 index 70113ece..00000000 --- a/embassy-stm32/src/pac/stm32l471re.rs +++ /dev/null @@ -1,640 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l471rg.rs b/embassy-stm32/src/pac/stm32l471rg.rs deleted file mode 100644 index 70113ece..00000000 --- a/embassy-stm32/src/pac/stm32l471rg.rs +++ /dev/null @@ -1,640 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l471ve.rs b/embassy-stm32/src/pac/stm32l471ve.rs deleted file mode 100644 index 70113ece..00000000 --- a/embassy-stm32/src/pac/stm32l471ve.rs +++ /dev/null @@ -1,640 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l471vg.rs b/embassy-stm32/src/pac/stm32l471vg.rs deleted file mode 100644 index 70113ece..00000000 --- a/embassy-stm32/src/pac/stm32l471vg.rs +++ /dev/null @@ -1,640 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l471ze.rs b/embassy-stm32/src/pac/stm32l471ze.rs deleted file mode 100644 index 70113ece..00000000 --- a/embassy-stm32/src/pac/stm32l471ze.rs +++ /dev/null @@ -1,640 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l471zg.rs b/embassy-stm32/src/pac/stm32l471zg.rs deleted file mode 100644 index 70113ece..00000000 --- a/embassy-stm32/src/pac/stm32l471zg.rs +++ /dev/null @@ -1,640 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l475rc.rs b/embassy-stm32/src/pac/stm32l475rc.rs deleted file mode 100644 index 82bf9eed..00000000 --- a/embassy-stm32/src/pac/stm32l475rc.rs +++ /dev/null @@ -1,643 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l475re.rs b/embassy-stm32/src/pac/stm32l475re.rs deleted file mode 100644 index 82bf9eed..00000000 --- a/embassy-stm32/src/pac/stm32l475re.rs +++ /dev/null @@ -1,643 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l475rg.rs b/embassy-stm32/src/pac/stm32l475rg.rs deleted file mode 100644 index 82bf9eed..00000000 --- a/embassy-stm32/src/pac/stm32l475rg.rs +++ /dev/null @@ -1,643 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l475vc.rs b/embassy-stm32/src/pac/stm32l475vc.rs deleted file mode 100644 index 82bf9eed..00000000 --- a/embassy-stm32/src/pac/stm32l475vc.rs +++ /dev/null @@ -1,643 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l475ve.rs b/embassy-stm32/src/pac/stm32l475ve.rs deleted file mode 100644 index 82bf9eed..00000000 --- a/embassy-stm32/src/pac/stm32l475ve.rs +++ /dev/null @@ -1,643 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l475vg.rs b/embassy-stm32/src/pac/stm32l475vg.rs deleted file mode 100644 index 82bf9eed..00000000 --- a/embassy-stm32/src/pac/stm32l475vg.rs +++ /dev/null @@ -1,643 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476je.rs b/embassy-stm32/src/pac/stm32l476je.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476je.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476jg.rs b/embassy-stm32/src/pac/stm32l476jg.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476jg.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476me.rs b/embassy-stm32/src/pac/stm32l476me.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476me.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476mg.rs b/embassy-stm32/src/pac/stm32l476mg.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476mg.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476qe.rs b/embassy-stm32/src/pac/stm32l476qe.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476qe.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476qg.rs b/embassy-stm32/src/pac/stm32l476qg.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476qg.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476rc.rs b/embassy-stm32/src/pac/stm32l476rc.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476rc.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476re.rs b/embassy-stm32/src/pac/stm32l476re.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476re.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476rg.rs b/embassy-stm32/src/pac/stm32l476rg.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476rg.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476vc.rs b/embassy-stm32/src/pac/stm32l476vc.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476vc.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476ve.rs b/embassy-stm32/src/pac/stm32l476ve.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476ve.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476vg.rs b/embassy-stm32/src/pac/stm32l476vg.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476vg.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476ze.rs b/embassy-stm32/src/pac/stm32l476ze.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476ze.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l476zg.rs b/embassy-stm32/src/pac/stm32l476zg.rs deleted file mode 100644 index 2752d337..00000000 --- a/embassy-stm32/src/pac/stm32l476zg.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l485jc.rs b/embassy-stm32/src/pac/stm32l485jc.rs deleted file mode 100644 index 13039a44..00000000 --- a/embassy-stm32/src/pac/stm32l485jc.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l485je.rs b/embassy-stm32/src/pac/stm32l485je.rs deleted file mode 100644 index 13039a44..00000000 --- a/embassy-stm32/src/pac/stm32l485je.rs +++ /dev/null @@ -1,646 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l486jg.rs b/embassy-stm32/src/pac/stm32l486jg.rs deleted file mode 100644 index ae5a1005..00000000 --- a/embassy-stm32/src/pac/stm32l486jg.rs +++ /dev/null @@ -1,649 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l486qg.rs b/embassy-stm32/src/pac/stm32l486qg.rs deleted file mode 100644 index ae5a1005..00000000 --- a/embassy-stm32/src/pac/stm32l486qg.rs +++ /dev/null @@ -1,649 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l486rg.rs b/embassy-stm32/src/pac/stm32l486rg.rs deleted file mode 100644 index ae5a1005..00000000 --- a/embassy-stm32/src/pac/stm32l486rg.rs +++ /dev/null @@ -1,649 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l486vg.rs b/embassy-stm32/src/pac/stm32l486vg.rs deleted file mode 100644 index ae5a1005..00000000 --- a/embassy-stm32/src/pac/stm32l486vg.rs +++ /dev/null @@ -1,649 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l486zg.rs b/embassy-stm32/src/pac/stm32l486zg.rs deleted file mode 100644 index ae5a1005..00000000 --- a/embassy-stm32/src/pac/stm32l486zg.rs +++ /dev/null @@ -1,649 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, RNG, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 82] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496ae.rs b/embassy-stm32/src/pac/stm32l496ae.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496ae.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496ag.rs b/embassy-stm32/src/pac/stm32l496ag.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496ag.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496qe.rs b/embassy-stm32/src/pac/stm32l496qe.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496qe.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496qg.rs b/embassy-stm32/src/pac/stm32l496qg.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496qg.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496re.rs b/embassy-stm32/src/pac/stm32l496re.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496re.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496rg.rs b/embassy-stm32/src/pac/stm32l496rg.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496rg.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496ve.rs b/embassy-stm32/src/pac/stm32l496ve.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496ve.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496vg.rs b/embassy-stm32/src/pac/stm32l496vg.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496vg.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496wg.rs b/embassy-stm32/src/pac/stm32l496wg.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496wg.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496ze.rs b/embassy-stm32/src/pac/stm32l496ze.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496ze.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l496zg.rs b/embassy-stm32/src/pac/stm32l496zg.rs deleted file mode 100644 index 483c76fc..00000000 --- a/embassy-stm32/src/pac/stm32l496zg.rs +++ /dev/null @@ -1,748 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4a6ag.rs b/embassy-stm32/src/pac/stm32l4a6ag.rs deleted file mode 100644 index 6b972317..00000000 --- a/embassy-stm32/src/pac/stm32l4a6ag.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4a6qg.rs b/embassy-stm32/src/pac/stm32l4a6qg.rs deleted file mode 100644 index 6b972317..00000000 --- a/embassy-stm32/src/pac/stm32l4a6qg.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4a6rg.rs b/embassy-stm32/src/pac/stm32l4a6rg.rs deleted file mode 100644 index 6b972317..00000000 --- a/embassy-stm32/src/pac/stm32l4a6rg.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4a6vg.rs b/embassy-stm32/src/pac/stm32l4a6vg.rs deleted file mode 100644 index 6b972317..00000000 --- a/embassy-stm32/src/pac/stm32l4a6vg.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4a6zg.rs b/embassy-stm32/src/pac/stm32l4a6zg.rs deleted file mode 100644 index 6b972317..00000000 --- a/embassy-stm32/src/pac/stm32l4a6zg.rs +++ /dev/null @@ -1,751 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, HASH_RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub const USART1: usart::Usart = usart::Usart(0x40013800 as _); -impl_usart!(USART1); -impl_usart_pin!(USART1, RxPin, PA10, 7); -impl_usart_pin!(USART1, CtsPin, PA11, 7); -impl_usart_pin!(USART1, RtsPin, PA12, 7); -impl_usart_pin!(USART1, CkPin, PA8, 7); -impl_usart_pin!(USART1, TxPin, PA9, 7); -impl_usart_pin!(USART1, RtsPin, PB3, 7); -impl_usart_pin!(USART1, CtsPin, PB4, 7); -impl_usart_pin!(USART1, CkPin, PB5, 7); -impl_usart_pin!(USART1, TxPin, PB6, 7); -impl_usart_pin!(USART1, RxPin, PB7, 7); -impl_usart_pin!(USART1, RxPin, PG10, 7); -impl_usart_pin!(USART1, CtsPin, PG11, 7); -impl_usart_pin!(USART1, RtsPin, PG12, 7); -impl_usart_pin!(USART1, CkPin, PG13, 7); -impl_usart_pin!(USART1, TxPin, PG9, 7); -pub const USART2: usart::Usart = usart::Usart(0x40004400 as _); -impl_usart!(USART2); -impl_usart_pin!(USART2, CtsPin, PA0, 7); -impl_usart_pin!(USART2, RtsPin, PA1, 7); -impl_usart_pin!(USART2, RxPin, PA15, 3); -impl_usart_pin!(USART2, TxPin, PA2, 7); -impl_usart_pin!(USART2, RxPin, PA3, 7); -impl_usart_pin!(USART2, CkPin, PA4, 7); -impl_usart_pin!(USART2, CtsPin, PD3, 7); -impl_usart_pin!(USART2, RtsPin, PD4, 7); -impl_usart_pin!(USART2, TxPin, PD5, 7); -impl_usart_pin!(USART2, RxPin, PD6, 7); -impl_usart_pin!(USART2, CkPin, PD7, 7); -pub const USART3: usart::Usart = usart::Usart(0x40004800 as _); -impl_usart!(USART3); -impl_usart_pin!(USART3, RtsPin, PA15, 7); -impl_usart_pin!(USART3, CtsPin, PA6, 7); -impl_usart_pin!(USART3, CkPin, PB0, 7); -impl_usart_pin!(USART3, RtsPin, PB1, 7); -impl_usart_pin!(USART3, TxPin, PB10, 7); -impl_usart_pin!(USART3, RxPin, PB11, 7); -impl_usart_pin!(USART3, CkPin, PB12, 7); -impl_usart_pin!(USART3, CtsPin, PB13, 7); -impl_usart_pin!(USART3, RtsPin, PB14, 7); -impl_usart_pin!(USART3, TxPin, PC10, 7); -impl_usart_pin!(USART3, RxPin, PC11, 7); -impl_usart_pin!(USART3, CkPin, PC12, 7); -impl_usart_pin!(USART3, TxPin, PC4, 7); -impl_usart_pin!(USART3, RxPin, PC5, 7); -impl_usart_pin!(USART3, CkPin, PD10, 7); -impl_usart_pin!(USART3, CtsPin, PD11, 7); -impl_usart_pin!(USART3, RtsPin, PD12, 7); -impl_usart_pin!(USART3, RtsPin, PD2, 7); -impl_usart_pin!(USART3, TxPin, PD8, 7); -impl_usart_pin!(USART3, RxPin, PD9, 7); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -pub use super::regs::usart_v2 as usart; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG, USART1, USART2, USART3 -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - ADC3 = 47, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - CAN2_RX0 = 87, - CAN2_RX1 = 88, - CAN2_SCE = 89, - CAN2_TX = 86, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_RNG = 80, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 84, - I2C4_EV = 83, - LCD = 78, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OTG_FS = 67, - PVD_PVM = 1, - QUADSPI = 71, - RCC = 5, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - SWPMI1 = 76, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(ADC3); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(CAN2_RX0); - declare!(CAN2_RX1); - declare!(CAN2_SCE); - declare!(CAN2_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_RNG); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LCD); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(QUADSPI); - declare!(RCC); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(SWPMI1); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn ADC3(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn CAN2_RX0(); - fn CAN2_RX1(); - fn CAN2_SCE(); - fn CAN2_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_RNG(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LCD(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OTG_FS(); - fn PVD_PVM(); - fn QUADSPI(); - fn RCC(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn SWPMI1(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 91] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: ADC3 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: QUADSPI }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: SWPMI1 }, - Vector { _handler: TSC }, - Vector { _handler: LCD }, - Vector { _handler: AES }, - Vector { _handler: HASH_RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_EV }, - Vector { _handler: I2C4_ER }, - Vector { _handler: DCMI }, - Vector { _handler: CAN2_TX }, - Vector { _handler: CAN2_RX0 }, - Vector { _handler: CAN2_RX1 }, - Vector { _handler: CAN2_SCE }, - Vector { _handler: DMA2D }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5ae.rs b/embassy-stm32/src/pac/stm32l4p5ae.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5ae.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5ag.rs b/embassy-stm32/src/pac/stm32l4p5ag.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5ag.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5ce.rs b/embassy-stm32/src/pac/stm32l4p5ce.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5ce.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5cg.rs b/embassy-stm32/src/pac/stm32l4p5cg.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5cg.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5qe.rs b/embassy-stm32/src/pac/stm32l4p5qe.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5qe.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5qg.rs b/embassy-stm32/src/pac/stm32l4p5qg.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5qg.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5re.rs b/embassy-stm32/src/pac/stm32l4p5re.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5re.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5rg.rs b/embassy-stm32/src/pac/stm32l4p5rg.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5rg.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5ve.rs b/embassy-stm32/src/pac/stm32l4p5ve.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5ve.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5vg.rs b/embassy-stm32/src/pac/stm32l4p5vg.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5vg.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5ze.rs b/embassy-stm32/src/pac/stm32l4p5ze.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5ze.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4p5zg.rs b/embassy-stm32/src/pac/stm32l4p5zg.rs deleted file mode 100644 index ee359d87..00000000 --- a/embassy-stm32/src/pac/stm32l4p5zg.rs +++ /dev/null @@ -1,688 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4q5ag.rs b/embassy-stm32/src/pac/stm32l4q5ag.rs deleted file mode 100644 index 9cb70b53..00000000 --- a/embassy-stm32/src/pac/stm32l4q5ag.rs +++ /dev/null @@ -1,694 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4q5cg.rs b/embassy-stm32/src/pac/stm32l4q5cg.rs deleted file mode 100644 index 9cb70b53..00000000 --- a/embassy-stm32/src/pac/stm32l4q5cg.rs +++ /dev/null @@ -1,694 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4q5qg.rs b/embassy-stm32/src/pac/stm32l4q5qg.rs deleted file mode 100644 index 9cb70b53..00000000 --- a/embassy-stm32/src/pac/stm32l4q5qg.rs +++ /dev/null @@ -1,694 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4q5rg.rs b/embassy-stm32/src/pac/stm32l4q5rg.rs deleted file mode 100644 index 9cb70b53..00000000 --- a/embassy-stm32/src/pac/stm32l4q5rg.rs +++ /dev/null @@ -1,694 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4q5vg.rs b/embassy-stm32/src/pac/stm32l4q5vg.rs deleted file mode 100644 index 9cb70b53..00000000 --- a/embassy-stm32/src/pac/stm32l4q5vg.rs +++ /dev/null @@ -1,694 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4q5zg.rs b/embassy-stm32/src/pac/stm32l4q5zg.rs deleted file mode 100644 index 9cb70b53..00000000 --- a/embassy-stm32/src/pac/stm32l4q5zg.rs +++ /dev/null @@ -1,694 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1_2 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI_PSSI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PKA = 86, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SDMMC2 = 47, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1_2); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI_PSSI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PKA); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SDMMC2); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1_2(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI_PSSI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PKA(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SDMMC2(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1_2 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { _reserved: 0 }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _handler: SDMMC2 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { _reserved: 0 }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { - _handler: DCMI_PSSI, - }, - Vector { _handler: PKA }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r5ag.rs b/embassy-stm32/src/pac/stm32l4r5ag.rs deleted file mode 100644 index a51f2d23..00000000 --- a/embassy-stm32/src/pac/stm32l4r5ag.rs +++ /dev/null @@ -1,687 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r5ai.rs b/embassy-stm32/src/pac/stm32l4r5ai.rs deleted file mode 100644 index a51f2d23..00000000 --- a/embassy-stm32/src/pac/stm32l4r5ai.rs +++ /dev/null @@ -1,687 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r5qg.rs b/embassy-stm32/src/pac/stm32l4r5qg.rs deleted file mode 100644 index a51f2d23..00000000 --- a/embassy-stm32/src/pac/stm32l4r5qg.rs +++ /dev/null @@ -1,687 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r5qi.rs b/embassy-stm32/src/pac/stm32l4r5qi.rs deleted file mode 100644 index a51f2d23..00000000 --- a/embassy-stm32/src/pac/stm32l4r5qi.rs +++ /dev/null @@ -1,687 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r5vg.rs b/embassy-stm32/src/pac/stm32l4r5vg.rs deleted file mode 100644 index a51f2d23..00000000 --- a/embassy-stm32/src/pac/stm32l4r5vg.rs +++ /dev/null @@ -1,687 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r5vi.rs b/embassy-stm32/src/pac/stm32l4r5vi.rs deleted file mode 100644 index a51f2d23..00000000 --- a/embassy-stm32/src/pac/stm32l4r5vi.rs +++ /dev/null @@ -1,687 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r5zg.rs b/embassy-stm32/src/pac/stm32l4r5zg.rs deleted file mode 100644 index a51f2d23..00000000 --- a/embassy-stm32/src/pac/stm32l4r5zg.rs +++ /dev/null @@ -1,687 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r5zi.rs b/embassy-stm32/src/pac/stm32l4r5zi.rs deleted file mode 100644 index a51f2d23..00000000 --- a/embassy-stm32/src/pac/stm32l4r5zi.rs +++ /dev/null @@ -1,687 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r7ai.rs b/embassy-stm32/src/pac/stm32l4r7ai.rs deleted file mode 100644 index f5e850d4..00000000 --- a/embassy-stm32/src/pac/stm32l4r7ai.rs +++ /dev/null @@ -1,696 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r7vi.rs b/embassy-stm32/src/pac/stm32l4r7vi.rs deleted file mode 100644 index f5e850d4..00000000 --- a/embassy-stm32/src/pac/stm32l4r7vi.rs +++ /dev/null @@ -1,696 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r7zi.rs b/embassy-stm32/src/pac/stm32l4r7zi.rs deleted file mode 100644 index f5e850d4..00000000 --- a/embassy-stm32/src/pac/stm32l4r7zi.rs +++ /dev/null @@ -1,696 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r9ag.rs b/embassy-stm32/src/pac/stm32l4r9ag.rs deleted file mode 100644 index e9377e1b..00000000 --- a/embassy-stm32/src/pac/stm32l4r9ag.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r9ai.rs b/embassy-stm32/src/pac/stm32l4r9ai.rs deleted file mode 100644 index e9377e1b..00000000 --- a/embassy-stm32/src/pac/stm32l4r9ai.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r9vg.rs b/embassy-stm32/src/pac/stm32l4r9vg.rs deleted file mode 100644 index e9377e1b..00000000 --- a/embassy-stm32/src/pac/stm32l4r9vg.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r9vi.rs b/embassy-stm32/src/pac/stm32l4r9vi.rs deleted file mode 100644 index e9377e1b..00000000 --- a/embassy-stm32/src/pac/stm32l4r9vi.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r9zg.rs b/embassy-stm32/src/pac/stm32l4r9zg.rs deleted file mode 100644 index e9377e1b..00000000 --- a/embassy-stm32/src/pac/stm32l4r9zg.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4r9zi.rs b/embassy-stm32/src/pac/stm32l4r9zi.rs deleted file mode 100644 index e9377e1b..00000000 --- a/embassy-stm32/src/pac/stm32l4r9zi.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - CRS = 82, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(CRS); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn CRS(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _reserved: 0 }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s5ai.rs b/embassy-stm32/src/pac/stm32l4s5ai.rs deleted file mode 100644 index 35908498..00000000 --- a/embassy-stm32/src/pac/stm32l4s5ai.rs +++ /dev/null @@ -1,690 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s5qi.rs b/embassy-stm32/src/pac/stm32l4s5qi.rs deleted file mode 100644 index 35908498..00000000 --- a/embassy-stm32/src/pac/stm32l4s5qi.rs +++ /dev/null @@ -1,690 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s5vi.rs b/embassy-stm32/src/pac/stm32l4s5vi.rs deleted file mode 100644 index 35908498..00000000 --- a/embassy-stm32/src/pac/stm32l4s5vi.rs +++ /dev/null @@ -1,690 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s5zi.rs b/embassy-stm32/src/pac/stm32l4s5zi.rs deleted file mode 100644 index 35908498..00000000 --- a/embassy-stm32/src/pac/stm32l4s5zi.rs +++ /dev/null @@ -1,690 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s7ai.rs b/embassy-stm32/src/pac/stm32l4s7ai.rs deleted file mode 100644 index 6c25274e..00000000 --- a/embassy-stm32/src/pac/stm32l4s7ai.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s7vi.rs b/embassy-stm32/src/pac/stm32l4s7vi.rs deleted file mode 100644 index 6c25274e..00000000 --- a/embassy-stm32/src/pac/stm32l4s7vi.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s7zi.rs b/embassy-stm32/src/pac/stm32l4s7zi.rs deleted file mode 100644 index 6c25274e..00000000 --- a/embassy-stm32/src/pac/stm32l4s7zi.rs +++ /dev/null @@ -1,699 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _reserved: 0 }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s9ai.rs b/embassy-stm32/src/pac/stm32l4s9ai.rs deleted file mode 100644 index a5991130..00000000 --- a/embassy-stm32/src/pac/stm32l4s9ai.rs +++ /dev/null @@ -1,702 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s9vi.rs b/embassy-stm32/src/pac/stm32l4s9vi.rs deleted file mode 100644 index a5991130..00000000 --- a/embassy-stm32/src/pac/stm32l4s9vi.rs +++ /dev/null @@ -1,702 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pac/stm32l4s9zi.rs b/embassy-stm32/src/pac/stm32l4s9zi.rs deleted file mode 100644 index a5991130..00000000 --- a/embassy-stm32/src/pac/stm32l4s9zi.rs +++ /dev/null @@ -1,702 +0,0 @@ -#![allow(dead_code)] -#![allow(unused_imports)] -#![allow(non_snake_case)] - -pub fn GPIO(n: usize) -> gpio::Gpio { - gpio::Gpio((0x48000000 + 0x400 * n) as _) -} -pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _); -impl_dma_channel!(DMA1_CH0, 0, 0); -impl_dma_channel!(DMA1_CH1, 0, 1); -impl_dma_channel!(DMA1_CH2, 0, 2); -impl_dma_channel!(DMA1_CH3, 0, 3); -impl_dma_channel!(DMA1_CH4, 0, 4); -impl_dma_channel!(DMA1_CH5, 0, 5); -impl_dma_channel!(DMA1_CH6, 0, 6); -impl_dma_channel!(DMA1_CH7, 0, 7); -pub const DMA2: dma::Dma = dma::Dma(0x40020400 as _); -impl_dma_channel!(DMA2_CH0, 1, 0); -impl_dma_channel!(DMA2_CH1, 1, 1); -impl_dma_channel!(DMA2_CH2, 1, 2); -impl_dma_channel!(DMA2_CH3, 1, 3); -impl_dma_channel!(DMA2_CH4, 1, 4); -impl_dma_channel!(DMA2_CH5, 1, 5); -impl_dma_channel!(DMA2_CH6, 1, 6); -impl_dma_channel!(DMA2_CH7, 1, 7); -pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _); -pub const GPIOA: gpio::Gpio = gpio::Gpio(0x48000000 as _); -impl_gpio_pin!(PA0, 0, 0, EXTI0); -impl_gpio_pin!(PA1, 0, 1, EXTI1); -impl_gpio_pin!(PA2, 0, 2, EXTI2); -impl_gpio_pin!(PA3, 0, 3, EXTI3); -impl_gpio_pin!(PA4, 0, 4, EXTI4); -impl_gpio_pin!(PA5, 0, 5, EXTI5); -impl_gpio_pin!(PA6, 0, 6, EXTI6); -impl_gpio_pin!(PA7, 0, 7, EXTI7); -impl_gpio_pin!(PA8, 0, 8, EXTI8); -impl_gpio_pin!(PA9, 0, 9, EXTI9); -impl_gpio_pin!(PA10, 0, 10, EXTI10); -impl_gpio_pin!(PA11, 0, 11, EXTI11); -impl_gpio_pin!(PA12, 0, 12, EXTI12); -impl_gpio_pin!(PA13, 0, 13, EXTI13); -impl_gpio_pin!(PA14, 0, 14, EXTI14); -impl_gpio_pin!(PA15, 0, 15, EXTI15); -pub const GPIOB: gpio::Gpio = gpio::Gpio(0x48000400 as _); -impl_gpio_pin!(PB0, 1, 0, EXTI0); -impl_gpio_pin!(PB1, 1, 1, EXTI1); -impl_gpio_pin!(PB2, 1, 2, EXTI2); -impl_gpio_pin!(PB3, 1, 3, EXTI3); -impl_gpio_pin!(PB4, 1, 4, EXTI4); -impl_gpio_pin!(PB5, 1, 5, EXTI5); -impl_gpio_pin!(PB6, 1, 6, EXTI6); -impl_gpio_pin!(PB7, 1, 7, EXTI7); -impl_gpio_pin!(PB8, 1, 8, EXTI8); -impl_gpio_pin!(PB9, 1, 9, EXTI9); -impl_gpio_pin!(PB10, 1, 10, EXTI10); -impl_gpio_pin!(PB11, 1, 11, EXTI11); -impl_gpio_pin!(PB12, 1, 12, EXTI12); -impl_gpio_pin!(PB13, 1, 13, EXTI13); -impl_gpio_pin!(PB14, 1, 14, EXTI14); -impl_gpio_pin!(PB15, 1, 15, EXTI15); -pub const GPIOC: gpio::Gpio = gpio::Gpio(0x48000800 as _); -impl_gpio_pin!(PC0, 2, 0, EXTI0); -impl_gpio_pin!(PC1, 2, 1, EXTI1); -impl_gpio_pin!(PC2, 2, 2, EXTI2); -impl_gpio_pin!(PC3, 2, 3, EXTI3); -impl_gpio_pin!(PC4, 2, 4, EXTI4); -impl_gpio_pin!(PC5, 2, 5, EXTI5); -impl_gpio_pin!(PC6, 2, 6, EXTI6); -impl_gpio_pin!(PC7, 2, 7, EXTI7); -impl_gpio_pin!(PC8, 2, 8, EXTI8); -impl_gpio_pin!(PC9, 2, 9, EXTI9); -impl_gpio_pin!(PC10, 2, 10, EXTI10); -impl_gpio_pin!(PC11, 2, 11, EXTI11); -impl_gpio_pin!(PC12, 2, 12, EXTI12); -impl_gpio_pin!(PC13, 2, 13, EXTI13); -impl_gpio_pin!(PC14, 2, 14, EXTI14); -impl_gpio_pin!(PC15, 2, 15, EXTI15); -pub const GPIOD: gpio::Gpio = gpio::Gpio(0x48000c00 as _); -impl_gpio_pin!(PD0, 3, 0, EXTI0); -impl_gpio_pin!(PD1, 3, 1, EXTI1); -impl_gpio_pin!(PD2, 3, 2, EXTI2); -impl_gpio_pin!(PD3, 3, 3, EXTI3); -impl_gpio_pin!(PD4, 3, 4, EXTI4); -impl_gpio_pin!(PD5, 3, 5, EXTI5); -impl_gpio_pin!(PD6, 3, 6, EXTI6); -impl_gpio_pin!(PD7, 3, 7, EXTI7); -impl_gpio_pin!(PD8, 3, 8, EXTI8); -impl_gpio_pin!(PD9, 3, 9, EXTI9); -impl_gpio_pin!(PD10, 3, 10, EXTI10); -impl_gpio_pin!(PD11, 3, 11, EXTI11); -impl_gpio_pin!(PD12, 3, 12, EXTI12); -impl_gpio_pin!(PD13, 3, 13, EXTI13); -impl_gpio_pin!(PD14, 3, 14, EXTI14); -impl_gpio_pin!(PD15, 3, 15, EXTI15); -pub const GPIOE: gpio::Gpio = gpio::Gpio(0x48001000 as _); -impl_gpio_pin!(PE0, 4, 0, EXTI0); -impl_gpio_pin!(PE1, 4, 1, EXTI1); -impl_gpio_pin!(PE2, 4, 2, EXTI2); -impl_gpio_pin!(PE3, 4, 3, EXTI3); -impl_gpio_pin!(PE4, 4, 4, EXTI4); -impl_gpio_pin!(PE5, 4, 5, EXTI5); -impl_gpio_pin!(PE6, 4, 6, EXTI6); -impl_gpio_pin!(PE7, 4, 7, EXTI7); -impl_gpio_pin!(PE8, 4, 8, EXTI8); -impl_gpio_pin!(PE9, 4, 9, EXTI9); -impl_gpio_pin!(PE10, 4, 10, EXTI10); -impl_gpio_pin!(PE11, 4, 11, EXTI11); -impl_gpio_pin!(PE12, 4, 12, EXTI12); -impl_gpio_pin!(PE13, 4, 13, EXTI13); -impl_gpio_pin!(PE14, 4, 14, EXTI14); -impl_gpio_pin!(PE15, 4, 15, EXTI15); -pub const GPIOF: gpio::Gpio = gpio::Gpio(0x48001400 as _); -impl_gpio_pin!(PF0, 5, 0, EXTI0); -impl_gpio_pin!(PF1, 5, 1, EXTI1); -impl_gpio_pin!(PF2, 5, 2, EXTI2); -impl_gpio_pin!(PF3, 5, 3, EXTI3); -impl_gpio_pin!(PF4, 5, 4, EXTI4); -impl_gpio_pin!(PF5, 5, 5, EXTI5); -impl_gpio_pin!(PF6, 5, 6, EXTI6); -impl_gpio_pin!(PF7, 5, 7, EXTI7); -impl_gpio_pin!(PF8, 5, 8, EXTI8); -impl_gpio_pin!(PF9, 5, 9, EXTI9); -impl_gpio_pin!(PF10, 5, 10, EXTI10); -impl_gpio_pin!(PF11, 5, 11, EXTI11); -impl_gpio_pin!(PF12, 5, 12, EXTI12); -impl_gpio_pin!(PF13, 5, 13, EXTI13); -impl_gpio_pin!(PF14, 5, 14, EXTI14); -impl_gpio_pin!(PF15, 5, 15, EXTI15); -pub const GPIOG: gpio::Gpio = gpio::Gpio(0x48001800 as _); -impl_gpio_pin!(PG0, 6, 0, EXTI0); -impl_gpio_pin!(PG1, 6, 1, EXTI1); -impl_gpio_pin!(PG2, 6, 2, EXTI2); -impl_gpio_pin!(PG3, 6, 3, EXTI3); -impl_gpio_pin!(PG4, 6, 4, EXTI4); -impl_gpio_pin!(PG5, 6, 5, EXTI5); -impl_gpio_pin!(PG6, 6, 6, EXTI6); -impl_gpio_pin!(PG7, 6, 7, EXTI7); -impl_gpio_pin!(PG8, 6, 8, EXTI8); -impl_gpio_pin!(PG9, 6, 9, EXTI9); -impl_gpio_pin!(PG10, 6, 10, EXTI10); -impl_gpio_pin!(PG11, 6, 11, EXTI11); -impl_gpio_pin!(PG12, 6, 12, EXTI12); -impl_gpio_pin!(PG13, 6, 13, EXTI13); -impl_gpio_pin!(PG14, 6, 14, EXTI14); -impl_gpio_pin!(PG15, 6, 15, EXTI15); -pub const GPIOH: gpio::Gpio = gpio::Gpio(0x48001c00 as _); -impl_gpio_pin!(PH0, 7, 0, EXTI0); -impl_gpio_pin!(PH1, 7, 1, EXTI1); -impl_gpio_pin!(PH2, 7, 2, EXTI2); -impl_gpio_pin!(PH3, 7, 3, EXTI3); -impl_gpio_pin!(PH4, 7, 4, EXTI4); -impl_gpio_pin!(PH5, 7, 5, EXTI5); -impl_gpio_pin!(PH6, 7, 6, EXTI6); -impl_gpio_pin!(PH7, 7, 7, EXTI7); -impl_gpio_pin!(PH8, 7, 8, EXTI8); -impl_gpio_pin!(PH9, 7, 9, EXTI9); -impl_gpio_pin!(PH10, 7, 10, EXTI10); -impl_gpio_pin!(PH11, 7, 11, EXTI11); -impl_gpio_pin!(PH12, 7, 12, EXTI12); -impl_gpio_pin!(PH13, 7, 13, EXTI13); -impl_gpio_pin!(PH14, 7, 14, EXTI14); -impl_gpio_pin!(PH15, 7, 15, EXTI15); -pub const GPIOI: gpio::Gpio = gpio::Gpio(0x48002000 as _); -impl_gpio_pin!(PI0, 8, 0, EXTI0); -impl_gpio_pin!(PI1, 8, 1, EXTI1); -impl_gpio_pin!(PI2, 8, 2, EXTI2); -impl_gpio_pin!(PI3, 8, 3, EXTI3); -impl_gpio_pin!(PI4, 8, 4, EXTI4); -impl_gpio_pin!(PI5, 8, 5, EXTI5); -impl_gpio_pin!(PI6, 8, 6, EXTI6); -impl_gpio_pin!(PI7, 8, 7, EXTI7); -impl_gpio_pin!(PI8, 8, 8, EXTI8); -impl_gpio_pin!(PI9, 8, 9, EXTI9); -impl_gpio_pin!(PI10, 8, 10, EXTI10); -impl_gpio_pin!(PI11, 8, 11, EXTI11); -impl_gpio_pin!(PI12, 8, 12, EXTI12); -impl_gpio_pin!(PI13, 8, 13, EXTI13); -impl_gpio_pin!(PI14, 8, 14, EXTI14); -impl_gpio_pin!(PI15, 8, 15, EXTI15); -pub const RNG: rng::Rng = rng::Rng(0x50060800 as _); -impl_rng!(RNG, RNG); -pub const SPI1: spi::Spi = spi::Spi(0x40013000 as _); -impl_spi!(SPI1, APB2); -impl_spi_pin!(SPI1, SckPin, PA1, 5); -impl_spi_pin!(SPI1, MisoPin, PA11, 5); -impl_spi_pin!(SPI1, MosiPin, PA12, 5); -impl_spi_pin!(SPI1, SckPin, PA5, 5); -impl_spi_pin!(SPI1, MisoPin, PA6, 5); -impl_spi_pin!(SPI1, MosiPin, PA7, 5); -impl_spi_pin!(SPI1, SckPin, PB3, 5); -impl_spi_pin!(SPI1, MisoPin, PB4, 5); -impl_spi_pin!(SPI1, MosiPin, PB5, 5); -impl_spi_pin!(SPI1, SckPin, PE13, 5); -impl_spi_pin!(SPI1, MisoPin, PE14, 5); -impl_spi_pin!(SPI1, MosiPin, PE15, 5); -impl_spi_pin!(SPI1, SckPin, PG2, 5); -impl_spi_pin!(SPI1, MisoPin, PG3, 5); -impl_spi_pin!(SPI1, MosiPin, PG4, 5); -pub const SPI2: spi::Spi = spi::Spi(0x40003800 as _); -impl_spi!(SPI2, APB1); -impl_spi_pin!(SPI2, SckPin, PA9, 3); -impl_spi_pin!(SPI2, SckPin, PB10, 5); -impl_spi_pin!(SPI2, SckPin, PB13, 5); -impl_spi_pin!(SPI2, MisoPin, PB14, 5); -impl_spi_pin!(SPI2, MosiPin, PB15, 5); -impl_spi_pin!(SPI2, MosiPin, PC1, 3); -impl_spi_pin!(SPI2, MisoPin, PC2, 5); -impl_spi_pin!(SPI2, MosiPin, PC3, 5); -impl_spi_pin!(SPI2, SckPin, PD1, 5); -impl_spi_pin!(SPI2, SckPin, PD3, 3); -impl_spi_pin!(SPI2, MisoPin, PD3, 5); -impl_spi_pin!(SPI2, MosiPin, PD4, 5); -impl_spi_pin!(SPI2, SckPin, PI1, 5); -impl_spi_pin!(SPI2, MisoPin, PI2, 5); -impl_spi_pin!(SPI2, MosiPin, PI3, 5); -pub const SPI3: spi::Spi = spi::Spi(0x40003c00 as _); -impl_spi!(SPI3, APB1); -impl_spi_pin!(SPI3, SckPin, PB3, 6); -impl_spi_pin!(SPI3, MisoPin, PB4, 6); -impl_spi_pin!(SPI3, MosiPin, PB5, 6); -impl_spi_pin!(SPI3, SckPin, PC10, 6); -impl_spi_pin!(SPI3, MisoPin, PC11, 6); -impl_spi_pin!(SPI3, MosiPin, PC12, 6); -impl_spi_pin!(SPI3, MosiPin, PD6, 5); -impl_spi_pin!(SPI3, MisoPin, PG10, 6); -impl_spi_pin!(SPI3, MosiPin, PG11, 6); -impl_spi_pin!(SPI3, SckPin, PG9, 6); -pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _); -pub use super::regs::dma_v1 as dma; -pub use super::regs::exti_v1 as exti; -pub use super::regs::gpio_v2 as gpio; -pub use super::regs::rng_v1 as rng; -pub use super::regs::spi_v2 as spi; -pub use super::regs::syscfg_l4 as syscfg; -embassy_extras::peripherals!( - EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12, - EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6, - DMA1_CH7, DMA2_CH0, DMA2_CH1, DMA2_CH2, DMA2_CH3, DMA2_CH4, DMA2_CH5, DMA2_CH6, DMA2_CH7, EXTI, - PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, - PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, - PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, - PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, - PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, - PF10, PF11, PF12, PF13, PF14, PF15, PG0, PG1, PG2, PG3, PG4, PG5, PG6, PG7, PG8, PG9, PG10, - PG11, PG12, PG13, PG14, PG15, PH0, PH1, PH2, PH3, PH4, PH5, PH6, PH7, PH8, PH9, PH10, PH11, - PH12, PH13, PH14, PH15, PI0, PI1, PI2, PI3, PI4, PI5, PI6, PI7, PI8, PI9, PI10, PI11, PI12, - PI13, PI14, PI15, RNG, SPI1, SPI2, SPI3, SYSCFG -); -pub fn DMA(n: u8) -> dma::Dma { - match n { - 0 => DMA1, - _ => DMA2, - } -} -impl_exti_irq!(EXTI0, EXTI1, EXTI15_10, EXTI2, EXTI3, EXTI4, EXTI9_5); -pub mod interrupt { - pub use bare_metal::Mutex; - pub use critical_section::CriticalSection; - pub use embassy::interrupt::{declare, take, Interrupt}; - pub use embassy_extras::interrupt::Priority4 as Priority; - - #[derive(Copy, Clone, Debug, PartialEq, Eq)] - #[allow(non_camel_case_types)] - pub enum InterruptEnum { - ADC1 = 18, - AES = 79, - CAN1_RX0 = 20, - CAN1_RX1 = 21, - CAN1_SCE = 22, - CAN1_TX = 19, - COMP = 64, - DCMI = 85, - DFSDM1_FLT0 = 61, - DFSDM1_FLT1 = 62, - DFSDM1_FLT2 = 63, - DFSDM1_FLT3 = 42, - DMA1_Channel1 = 11, - DMA1_Channel2 = 12, - DMA1_Channel3 = 13, - DMA1_Channel4 = 14, - DMA1_Channel5 = 15, - DMA1_Channel6 = 16, - DMA1_Channel7 = 17, - DMA2D = 90, - DMA2_Channel1 = 56, - DMA2_Channel2 = 57, - DMA2_Channel3 = 58, - DMA2_Channel4 = 59, - DMA2_Channel5 = 60, - DMA2_Channel6 = 68, - DMA2_Channel7 = 69, - DMAMUX1_OVR = 94, - DSI = 78, - EXTI0 = 6, - EXTI1 = 7, - EXTI15_10 = 40, - EXTI2 = 8, - EXTI3 = 9, - EXTI4 = 10, - EXTI9_5 = 23, - FLASH = 4, - FMC = 48, - FPU = 81, - GFXMMU = 93, - HASH_CRS = 82, - I2C1_ER = 32, - I2C1_EV = 31, - I2C2_ER = 34, - I2C2_EV = 33, - I2C3_ER = 73, - I2C3_EV = 72, - I2C4_ER = 83, - I2C4_EV = 84, - LPTIM1 = 65, - LPTIM2 = 66, - LPUART1 = 70, - LTDC = 91, - LTDC_ER = 92, - OCTOSPI1 = 71, - OCTOSPI2 = 76, - OTG_FS = 67, - PVD_PVM = 1, - RCC = 5, - RNG = 80, - RTC_Alarm = 41, - RTC_WKUP = 3, - SAI1 = 74, - SAI2 = 75, - SDMMC1 = 49, - SPI1 = 35, - SPI2 = 36, - SPI3 = 51, - TAMP_STAMP = 2, - TIM1_BRK_TIM15 = 24, - TIM1_CC = 27, - TIM1_TRG_COM_TIM17 = 26, - TIM1_UP_TIM16 = 25, - TIM2 = 28, - TIM3 = 29, - TIM4 = 30, - TIM5 = 50, - TIM6_DAC = 54, - TIM7 = 55, - TIM8_BRK = 43, - TIM8_CC = 46, - TIM8_TRG_COM = 45, - TIM8_UP = 44, - TSC = 77, - UART4 = 52, - UART5 = 53, - USART1 = 37, - USART2 = 38, - USART3 = 39, - WWDG = 0, - } - unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum { - #[inline(always)] - fn number(self) -> u16 { - self as u16 - } - } - - declare!(ADC1); - declare!(AES); - declare!(CAN1_RX0); - declare!(CAN1_RX1); - declare!(CAN1_SCE); - declare!(CAN1_TX); - declare!(COMP); - declare!(DCMI); - declare!(DFSDM1_FLT0); - declare!(DFSDM1_FLT1); - declare!(DFSDM1_FLT2); - declare!(DFSDM1_FLT3); - declare!(DMA1_Channel1); - declare!(DMA1_Channel2); - declare!(DMA1_Channel3); - declare!(DMA1_Channel4); - declare!(DMA1_Channel5); - declare!(DMA1_Channel6); - declare!(DMA1_Channel7); - declare!(DMA2D); - declare!(DMA2_Channel1); - declare!(DMA2_Channel2); - declare!(DMA2_Channel3); - declare!(DMA2_Channel4); - declare!(DMA2_Channel5); - declare!(DMA2_Channel6); - declare!(DMA2_Channel7); - declare!(DMAMUX1_OVR); - declare!(DSI); - declare!(EXTI0); - declare!(EXTI1); - declare!(EXTI15_10); - declare!(EXTI2); - declare!(EXTI3); - declare!(EXTI4); - declare!(EXTI9_5); - declare!(FLASH); - declare!(FMC); - declare!(FPU); - declare!(GFXMMU); - declare!(HASH_CRS); - declare!(I2C1_ER); - declare!(I2C1_EV); - declare!(I2C2_ER); - declare!(I2C2_EV); - declare!(I2C3_ER); - declare!(I2C3_EV); - declare!(I2C4_ER); - declare!(I2C4_EV); - declare!(LPTIM1); - declare!(LPTIM2); - declare!(LPUART1); - declare!(LTDC); - declare!(LTDC_ER); - declare!(OCTOSPI1); - declare!(OCTOSPI2); - declare!(OTG_FS); - declare!(PVD_PVM); - declare!(RCC); - declare!(RNG); - declare!(RTC_Alarm); - declare!(RTC_WKUP); - declare!(SAI1); - declare!(SAI2); - declare!(SDMMC1); - declare!(SPI1); - declare!(SPI2); - declare!(SPI3); - declare!(TAMP_STAMP); - declare!(TIM1_BRK_TIM15); - declare!(TIM1_CC); - declare!(TIM1_TRG_COM_TIM17); - declare!(TIM1_UP_TIM16); - declare!(TIM2); - declare!(TIM3); - declare!(TIM4); - declare!(TIM5); - declare!(TIM6_DAC); - declare!(TIM7); - declare!(TIM8_BRK); - declare!(TIM8_CC); - declare!(TIM8_TRG_COM); - declare!(TIM8_UP); - declare!(TSC); - declare!(UART4); - declare!(UART5); - declare!(USART1); - declare!(USART2); - declare!(USART3); - declare!(WWDG); -} -mod interrupt_vector { - extern "C" { - fn ADC1(); - fn AES(); - fn CAN1_RX0(); - fn CAN1_RX1(); - fn CAN1_SCE(); - fn CAN1_TX(); - fn COMP(); - fn DCMI(); - fn DFSDM1_FLT0(); - fn DFSDM1_FLT1(); - fn DFSDM1_FLT2(); - fn DFSDM1_FLT3(); - fn DMA1_Channel1(); - fn DMA1_Channel2(); - fn DMA1_Channel3(); - fn DMA1_Channel4(); - fn DMA1_Channel5(); - fn DMA1_Channel6(); - fn DMA1_Channel7(); - fn DMA2D(); - fn DMA2_Channel1(); - fn DMA2_Channel2(); - fn DMA2_Channel3(); - fn DMA2_Channel4(); - fn DMA2_Channel5(); - fn DMA2_Channel6(); - fn DMA2_Channel7(); - fn DMAMUX1_OVR(); - fn DSI(); - fn EXTI0(); - fn EXTI1(); - fn EXTI15_10(); - fn EXTI2(); - fn EXTI3(); - fn EXTI4(); - fn EXTI9_5(); - fn FLASH(); - fn FMC(); - fn FPU(); - fn GFXMMU(); - fn HASH_CRS(); - fn I2C1_ER(); - fn I2C1_EV(); - fn I2C2_ER(); - fn I2C2_EV(); - fn I2C3_ER(); - fn I2C3_EV(); - fn I2C4_ER(); - fn I2C4_EV(); - fn LPTIM1(); - fn LPTIM2(); - fn LPUART1(); - fn LTDC(); - fn LTDC_ER(); - fn OCTOSPI1(); - fn OCTOSPI2(); - fn OTG_FS(); - fn PVD_PVM(); - fn RCC(); - fn RNG(); - fn RTC_Alarm(); - fn RTC_WKUP(); - fn SAI1(); - fn SAI2(); - fn SDMMC1(); - fn SPI1(); - fn SPI2(); - fn SPI3(); - fn TAMP_STAMP(); - fn TIM1_BRK_TIM15(); - fn TIM1_CC(); - fn TIM1_TRG_COM_TIM17(); - fn TIM1_UP_TIM16(); - fn TIM2(); - fn TIM3(); - fn TIM4(); - fn TIM5(); - fn TIM6_DAC(); - fn TIM7(); - fn TIM8_BRK(); - fn TIM8_CC(); - fn TIM8_TRG_COM(); - fn TIM8_UP(); - fn TSC(); - fn UART4(); - fn UART5(); - fn USART1(); - fn USART2(); - fn USART3(); - fn WWDG(); - } - pub union Vector { - _handler: unsafe extern "C" fn(), - _reserved: u32, - } - #[link_section = ".vector_table.interrupts"] - #[no_mangle] - pub static __INTERRUPTS: [Vector; 95] = [ - Vector { _handler: WWDG }, - Vector { _handler: PVD_PVM }, - Vector { - _handler: TAMP_STAMP, - }, - Vector { _handler: RTC_WKUP }, - Vector { _handler: FLASH }, - Vector { _handler: RCC }, - Vector { _handler: EXTI0 }, - Vector { _handler: EXTI1 }, - Vector { _handler: EXTI2 }, - Vector { _handler: EXTI3 }, - Vector { _handler: EXTI4 }, - Vector { - _handler: DMA1_Channel1, - }, - Vector { - _handler: DMA1_Channel2, - }, - Vector { - _handler: DMA1_Channel3, - }, - Vector { - _handler: DMA1_Channel4, - }, - Vector { - _handler: DMA1_Channel5, - }, - Vector { - _handler: DMA1_Channel6, - }, - Vector { - _handler: DMA1_Channel7, - }, - Vector { _handler: ADC1 }, - Vector { _handler: CAN1_TX }, - Vector { _handler: CAN1_RX0 }, - Vector { _handler: CAN1_RX1 }, - Vector { _handler: CAN1_SCE }, - Vector { _handler: EXTI9_5 }, - Vector { - _handler: TIM1_BRK_TIM15, - }, - Vector { - _handler: TIM1_UP_TIM16, - }, - Vector { - _handler: TIM1_TRG_COM_TIM17, - }, - Vector { _handler: TIM1_CC }, - Vector { _handler: TIM2 }, - Vector { _handler: TIM3 }, - Vector { _handler: TIM4 }, - Vector { _handler: I2C1_EV }, - Vector { _handler: I2C1_ER }, - Vector { _handler: I2C2_EV }, - Vector { _handler: I2C2_ER }, - Vector { _handler: SPI1 }, - Vector { _handler: SPI2 }, - Vector { _handler: USART1 }, - Vector { _handler: USART2 }, - Vector { _handler: USART3 }, - Vector { - _handler: EXTI15_10, - }, - Vector { - _handler: RTC_Alarm, - }, - Vector { - _handler: DFSDM1_FLT3, - }, - Vector { _handler: TIM8_BRK }, - Vector { _handler: TIM8_UP }, - Vector { - _handler: TIM8_TRG_COM, - }, - Vector { _handler: TIM8_CC }, - Vector { _reserved: 0 }, - Vector { _handler: FMC }, - Vector { _handler: SDMMC1 }, - Vector { _handler: TIM5 }, - Vector { _handler: SPI3 }, - Vector { _handler: UART4 }, - Vector { _handler: UART5 }, - Vector { _handler: TIM6_DAC }, - Vector { _handler: TIM7 }, - Vector { - _handler: DMA2_Channel1, - }, - Vector { - _handler: DMA2_Channel2, - }, - Vector { - _handler: DMA2_Channel3, - }, - Vector { - _handler: DMA2_Channel4, - }, - Vector { - _handler: DMA2_Channel5, - }, - Vector { - _handler: DFSDM1_FLT0, - }, - Vector { - _handler: DFSDM1_FLT1, - }, - Vector { - _handler: DFSDM1_FLT2, - }, - Vector { _handler: COMP }, - Vector { _handler: LPTIM1 }, - Vector { _handler: LPTIM2 }, - Vector { _handler: OTG_FS }, - Vector { - _handler: DMA2_Channel6, - }, - Vector { - _handler: DMA2_Channel7, - }, - Vector { _handler: LPUART1 }, - Vector { _handler: OCTOSPI1 }, - Vector { _handler: I2C3_EV }, - Vector { _handler: I2C3_ER }, - Vector { _handler: SAI1 }, - Vector { _handler: SAI2 }, - Vector { _handler: OCTOSPI2 }, - Vector { _handler: TSC }, - Vector { _handler: DSI }, - Vector { _handler: AES }, - Vector { _handler: RNG }, - Vector { _handler: FPU }, - Vector { _handler: HASH_CRS }, - Vector { _handler: I2C4_ER }, - Vector { _handler: I2C4_EV }, - Vector { _handler: DCMI }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _reserved: 0 }, - Vector { _handler: DMA2D }, - Vector { _handler: LTDC }, - Vector { _handler: LTDC_ER }, - Vector { _handler: GFXMMU }, - Vector { - _handler: DMAMUX1_OVR, - }, - ]; -} diff --git a/embassy-stm32/src/pwr/mod.rs b/embassy-stm32/src/pwr/mod.rs index 0bf62ef7..0fe7030e 100644 --- a/embassy-stm32/src/pwr/mod.rs +++ b/embassy-stm32/src/pwr/mod.rs @@ -1,4 +1,4 @@ -#[cfg(feature = "_stm32h7")] -mod h7; -#[cfg(feature = "_stm32h7")] -pub use h7::*; +#[cfg_attr(pwr_h7, path = "h7.rs")] +mod _version; + +pub use _version::*; diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index cb878034..7112ad02 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -31,10 +31,10 @@ pub unsafe fn get_freqs() -> &'static Clocks { } cfg_if::cfg_if! { - if #[cfg(feature = "_stm32h7")] { + if #[cfg(rcc_h7)] { mod h7; pub use h7::*; - } else if #[cfg(feature = "_stm32l0")] { + } else if #[cfg(rcc_l0)] { mod l0; pub use l0::*; } else { diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs index 701039b0..694ad4a1 100644 --- a/embassy-stm32/src/rng.rs +++ b/embassy-stm32/src/rng.rs @@ -137,7 +137,7 @@ pub trait Instance: sealed::Instance {} macro_rules! impl_rng { ($inst:ident, $irq:ident) => { impl crate::rng::sealed::Instance for peripherals::RNG { - fn regs() -> crate::pac::chip::rng::Rng { + fn regs() -> crate::pac::rng::Rng { crate::pac::RNG } } diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs index 6d62eaee..087cb4c4 100644 --- a/embassy-stm32/src/sdmmc/mod.rs +++ b/embassy-stm32/src/sdmmc/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -#[cfg_attr(feature = "_sdmmc_v1", path = "v1.rs")] -#[cfg_attr(feature = "_sdmmc_v2", path = "v2.rs")] +#[cfg_attr(sdmmc_v1, path = "v1.rs")] +#[cfg_attr(sdmmc_v2, path = "v2.rs")] mod _version; pub use _version::*; diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 72276535..d8bd66d9 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,8 +1,8 @@ #![macro_use] -#[cfg_attr(feature = "_spi_v1", path = "v1.rs")] -#[cfg_attr(feature = "_spi_v2", path = "v2.rs")] -#[cfg_attr(feature = "_spi_v3", path = "v3.rs")] +#[cfg_attr(spi_v1, path = "v1.rs")] +#[cfg_attr(spi_v2, path = "v2.rs")] +#[cfg_attr(spi_v3, path = "v3.rs")] mod _version; pub use _version::*; diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 02ef9c4b..77b217c3 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -#[cfg_attr(feature = "_usart_v1", path = "v1.rs")] -#[cfg_attr(feature = "_usart_v2", path = "v2.rs")] +#[cfg_attr(usart_v1, path = "v1.rs")] +#[cfg_attr(usart_v2, path = "v2.rs")] mod _version; pub use _version::*; diff --git a/embassy-stm32/src/usart/v1.rs b/embassy-stm32/src/usart/v1.rs index 9cd54790..1ec1f5b3 100644 --- a/embassy-stm32/src/usart/v1.rs +++ b/embassy-stm32/src/usart/v1.rs @@ -101,7 +101,7 @@ impl<'d, T: Instance> Uart<'d, T> { } } - #[cfg(feature = "_dma_v2")] + #[cfg(dma_v2)] pub async fn write_dma( &mut self, ch: &mut impl crate::dma::Channel, diff --git a/stm32-data b/stm32-data new file mode 160000 index 00000000..c5db875e --- /dev/null +++ b/stm32-data @@ -0,0 +1 @@ +Subproject commit c5db875ec2ce8568cfac018ecbdf288fc4b63ba0 diff --git a/stm32-metapac/Cargo.toml b/stm32-metapac/Cargo.toml new file mode 100644 index 00000000..c32c6690 --- /dev/null +++ b/stm32-metapac/Cargo.toml @@ -0,0 +1,1227 @@ +[package] +name = "stm32-metapac" +version = "0.1.0" +edition = "2018" +links = "stm32-metapac-v0.1" + +[dependencies] +cortex-m = "0.7.2" + +[build-dependencies] +regex = "1.4.6" +chiptool = { git = "https://github.com/embassy-rs/chiptool", rev = "86b77165078065058098e981d49d2dd213b2feba" } +serde = { version = "1.0.123", features = [ "derive" ]} +serde_yaml = "0.8.15" +cortex-m-rt = { version = "0.6.8", optional = true } + +[features] +rt = ["cortex-m-rt/device"] + + +# BEGIN GENERATED FEATURES +# Generated by gen_features.py. DO NOT EDIT. +stm32f030c6 = [] +stm32f030c8 = [] +stm32f030cc = [] +stm32f030f4 = [] +stm32f030k6 = [] +stm32f030r8 = [] +stm32f030rc = [] +stm32f031c4 = [] +stm32f031c6 = [] +stm32f031e6 = [] +stm32f031f4 = [] +stm32f031f6 = [] +stm32f031g4 = [] +stm32f031g6 = [] +stm32f031k4 = [] +stm32f031k6 = [] +stm32f038c6 = [] +stm32f038e6 = [] +stm32f038f6 = [] +stm32f038g6 = [] +stm32f038k6 = [] +stm32f042c4 = [] +stm32f042c6 = [] +stm32f042f4 = [] +stm32f042f6 = [] +stm32f042g4 = [] +stm32f042g6 = [] +stm32f042k4 = [] +stm32f042k6 = [] +stm32f042t6 = [] +stm32f048c6 = [] +stm32f048g6 = [] +stm32f048t6 = [] +stm32f051c4 = [] +stm32f051c6 = [] +stm32f051c8 = [] +stm32f051k4 = [] +stm32f051k6 = [] +stm32f051k8 = [] +stm32f051r4 = [] +stm32f051r6 = [] +stm32f051r8 = [] +stm32f051t8 = [] +stm32f058c8 = [] +stm32f058r8 = [] +stm32f058t8 = [] +stm32f070c6 = [] +stm32f070cb = [] +stm32f070f6 = [] +stm32f070rb = [] +stm32f071c8 = [] +stm32f071cb = [] +stm32f071rb = [] +stm32f071v8 = [] +stm32f071vb = [] +stm32f072c8 = [] +stm32f072cb = [] +stm32f072r8 = [] +stm32f072rb = [] +stm32f072v8 = [] +stm32f072vb = [] +stm32f078cb = [] +stm32f078rb = [] +stm32f078vb = [] +stm32f091cb = [] +stm32f091cc = [] +stm32f091rb = [] +stm32f091rc = [] +stm32f091vb = [] +stm32f091vc = [] +stm32f098cc = [] +stm32f098rc = [] +stm32f098vc = [] +stm32f100c4 = [] +stm32f100c6 = [] +stm32f100c8 = [] +stm32f100cb = [] +stm32f100r4 = [] +stm32f100r6 = [] +stm32f100r8 = [] +stm32f100rb = [] +stm32f100rc = [] +stm32f100rd = [] +stm32f100re = [] +stm32f100v8 = [] +stm32f100vb = [] +stm32f100vc = [] +stm32f100vd = [] +stm32f100ve = [] +stm32f100zc = [] +stm32f100zd = [] +stm32f100ze = [] +stm32f101c4 = [] +stm32f101c6 = [] +stm32f101c8 = [] +stm32f101cb = [] +stm32f101r4 = [] +stm32f101r6 = [] +stm32f101r8 = [] +stm32f101rb = [] +stm32f101rc = [] +stm32f101rd = [] +stm32f101re = [] +stm32f101rf = [] +stm32f101rg = [] +stm32f101t4 = [] +stm32f101t6 = [] +stm32f101t8 = [] +stm32f101tb = [] +stm32f101v8 = [] +stm32f101vb = [] +stm32f101vc = [] +stm32f101vd = [] +stm32f101ve = [] +stm32f101vf = [] +stm32f101vg = [] +stm32f101zc = [] +stm32f101zd = [] +stm32f101ze = [] +stm32f101zf = [] +stm32f101zg = [] +stm32f102c4 = [] +stm32f102c6 = [] +stm32f102c8 = [] +stm32f102cb = [] +stm32f102r4 = [] +stm32f102r6 = [] +stm32f102r8 = [] +stm32f102rb = [] +stm32f103c4 = [] +stm32f103c6 = [] +stm32f103c8 = [] +stm32f103cb = [] +stm32f103r4 = [] +stm32f103r6 = [] +stm32f103r8 = [] +stm32f103rb = [] +stm32f103rc = [] +stm32f103rd = [] +stm32f103re = [] +stm32f103rf = [] +stm32f103rg = [] +stm32f103t4 = [] +stm32f103t6 = [] +stm32f103t8 = [] +stm32f103tb = [] +stm32f103v8 = [] +stm32f103vb = [] +stm32f103vc = [] +stm32f103vd = [] +stm32f103ve = [] +stm32f103vf = [] +stm32f103vg = [] +stm32f103zc = [] +stm32f103zd = [] +stm32f103ze = [] +stm32f103zf = [] +stm32f103zg = [] +stm32f105r8 = [] +stm32f105rb = [] +stm32f105rc = [] +stm32f105v8 = [] +stm32f105vb = [] +stm32f105vc = [] +stm32f107rb = [] +stm32f107rc = [] +stm32f107vb = [] +stm32f107vc = [] +stm32f205rb = [] +stm32f205rc = [] +stm32f205re = [] +stm32f205rf = [] +stm32f205rg = [] +stm32f205vb = [] +stm32f205vc = [] +stm32f205ve = [] +stm32f205vf = [] +stm32f205vg = [] +stm32f205zc = [] +stm32f205ze = [] +stm32f205zf = [] +stm32f205zg = [] +stm32f207ic = [] +stm32f207ie = [] +stm32f207if = [] +stm32f207ig = [] +stm32f207vc = [] +stm32f207ve = [] +stm32f207vf = [] +stm32f207vg = [] +stm32f207zc = [] +stm32f207ze = [] +stm32f207zf = [] +stm32f207zg = [] +stm32f215re = [] +stm32f215rg = [] +stm32f215ve = [] +stm32f215vg = [] +stm32f215ze = [] +stm32f215zg = [] +stm32f217ie = [] +stm32f217ig = [] +stm32f217ve = [] +stm32f217vg = [] +stm32f217ze = [] +stm32f217zg = [] +stm32f301c6 = [] +stm32f301c8 = [] +stm32f301k6 = [] +stm32f301k8 = [] +stm32f301r6 = [] +stm32f301r8 = [] +stm32f302c6 = [] +stm32f302c8 = [] +stm32f302cb = [] +stm32f302cc = [] +stm32f302k6 = [] +stm32f302k8 = [] +stm32f302r6 = [] +stm32f302r8 = [] +stm32f302rb = [] +stm32f302rc = [] +stm32f302rd = [] +stm32f302re = [] +stm32f302vb = [] +stm32f302vc = [] +stm32f302vd = [] +stm32f302ve = [] +stm32f302zd = [] +stm32f302ze = [] +stm32f303c6 = [] +stm32f303c8 = [] +stm32f303cb = [] +stm32f303cc = [] +stm32f303k6 = [] +stm32f303k8 = [] +stm32f303r6 = [] +stm32f303r8 = [] +stm32f303rb = [] +stm32f303rc = [] +stm32f303rd = [] +stm32f303re = [] +stm32f303vb = [] +stm32f303vc = [] +stm32f303vd = [] +stm32f303ve = [] +stm32f303zd = [] +stm32f303ze = [] +stm32f318c8 = [] +stm32f318k8 = [] +stm32f328c8 = [] +stm32f334c4 = [] +stm32f334c6 = [] +stm32f334c8 = [] +stm32f334k4 = [] +stm32f334k6 = [] +stm32f334k8 = [] +stm32f334r6 = [] +stm32f334r8 = [] +stm32f358cc = [] +stm32f358rc = [] +stm32f358vc = [] +stm32f373c8 = [] +stm32f373cb = [] +stm32f373cc = [] +stm32f373r8 = [] +stm32f373rb = [] +stm32f373rc = [] +stm32f373v8 = [] +stm32f373vb = [] +stm32f373vc = [] +stm32f378cc = [] +stm32f378rc = [] +stm32f378vc = [] +stm32f398ve = [] +stm32f401cb = [] +stm32f401cc = [] +stm32f401cd = [] +stm32f401ce = [] +stm32f401rb = [] +stm32f401rc = [] +stm32f401rd = [] +stm32f401re = [] +stm32f401vb = [] +stm32f401vc = [] +stm32f401vd = [] +stm32f401ve = [] +stm32f405oe = [] +stm32f405og = [] +stm32f405rg = [] +stm32f405vg = [] +stm32f405zg = [] +stm32f407ie = [] +stm32f407ig = [] +stm32f407ve = [] +stm32f407vg = [] +stm32f407ze = [] +stm32f407zg = [] +stm32f410c8 = [] +stm32f410cb = [] +stm32f410r8 = [] +stm32f410rb = [] +stm32f410t8 = [] +stm32f410tb = [] +stm32f411cc = [] +stm32f411ce = [] +stm32f411rc = [] +stm32f411re = [] +stm32f411vc = [] +stm32f411ve = [] +stm32f412ce = [] +stm32f412cg = [] +stm32f412re = [] +stm32f412rg = [] +stm32f412ve = [] +stm32f412vg = [] +stm32f412ze = [] +stm32f412zg = [] +stm32f413cg = [] +stm32f413ch = [] +stm32f413mg = [] +stm32f413mh = [] +stm32f413rg = [] +stm32f413rh = [] +stm32f413vg = [] +stm32f413vh = [] +stm32f413zg = [] +stm32f413zh = [] +stm32f415og = [] +stm32f415rg = [] +stm32f415vg = [] +stm32f415zg = [] +stm32f417ie = [] +stm32f417ig = [] +stm32f417ve = [] +stm32f417vg = [] +stm32f417ze = [] +stm32f417zg = [] +stm32f423ch = [] +stm32f423mh = [] +stm32f423rh = [] +stm32f423vh = [] +stm32f423zh = [] +stm32f427ag = [] +stm32f427ai = [] +stm32f427ig = [] +stm32f427ii = [] +stm32f427vg = [] +stm32f427vi = [] +stm32f427zg = [] +stm32f427zi = [] +stm32f429ag = [] +stm32f429ai = [] +stm32f429be = [] +stm32f429bg = [] +stm32f429bi = [] +stm32f429ie = [] +stm32f429ig = [] +stm32f429ii = [] +stm32f429ne = [] +stm32f429ng = [] +stm32f429ni = [] +stm32f429ve = [] +stm32f429vg = [] +stm32f429vi = [] +stm32f429ze = [] +stm32f429zg = [] +stm32f429zi = [] +stm32f437ai = [] +stm32f437ig = [] +stm32f437ii = [] +stm32f437vg = [] +stm32f437vi = [] +stm32f437zg = [] +stm32f437zi = [] +stm32f439ai = [] +stm32f439bg = [] +stm32f439bi = [] +stm32f439ig = [] +stm32f439ii = [] +stm32f439ng = [] +stm32f439ni = [] +stm32f439vg = [] +stm32f439vi = [] +stm32f439zg = [] +stm32f439zi = [] +stm32f446mc = [] +stm32f446me = [] +stm32f446rc = [] +stm32f446re = [] +stm32f446vc = [] +stm32f446ve = [] +stm32f446zc = [] +stm32f446ze = [] +stm32f469ae = [] +stm32f469ag = [] +stm32f469ai = [] +stm32f469be = [] +stm32f469bg = [] +stm32f469bi = [] +stm32f469ie = [] +stm32f469ig = [] +stm32f469ii = [] +stm32f469ne = [] +stm32f469ng = [] +stm32f469ni = [] +stm32f469ve = [] +stm32f469vg = [] +stm32f469vi = [] +stm32f469ze = [] +stm32f469zg = [] +stm32f469zi = [] +stm32f479ag = [] +stm32f479ai = [] +stm32f479bg = [] +stm32f479bi = [] +stm32f479ig = [] +stm32f479ii = [] +stm32f479ng = [] +stm32f479ni = [] +stm32f479vg = [] +stm32f479vi = [] +stm32f479zg = [] +stm32f479zi = [] +stm32f722ic = [] +stm32f722ie = [] +stm32f722rc = [] +stm32f722re = [] +stm32f722vc = [] +stm32f722ve = [] +stm32f722zc = [] +stm32f722ze = [] +stm32f723ic = [] +stm32f723ie = [] +stm32f723vc = [] +stm32f723ve = [] +stm32f723zc = [] +stm32f723ze = [] +stm32f730i8 = [] +stm32f730r8 = [] +stm32f730v8 = [] +stm32f730z8 = [] +stm32f732ie = [] +stm32f732re = [] +stm32f732ve = [] +stm32f732ze = [] +stm32f733ie = [] +stm32f733ve = [] +stm32f733ze = [] +stm32f745ie = [] +stm32f745ig = [] +stm32f745ve = [] +stm32f745vg = [] +stm32f745ze = [] +stm32f745zg = [] +stm32f746be = [] +stm32f746bg = [] +stm32f746ie = [] +stm32f746ig = [] +stm32f746ne = [] +stm32f746ng = [] +stm32f746ve = [] +stm32f746vg = [] +stm32f746ze = [] +stm32f746zg = [] +stm32f750n8 = [] +stm32f750v8 = [] +stm32f750z8 = [] +stm32f756bg = [] +stm32f756ig = [] +stm32f756ng = [] +stm32f756vg = [] +stm32f756zg = [] +stm32f765bg = [] +stm32f765bi = [] +stm32f765ig = [] +stm32f765ii = [] +stm32f765ng = [] +stm32f765ni = [] +stm32f765vg = [] +stm32f765vi = [] +stm32f765zg = [] +stm32f765zi = [] +stm32f767bg = [] +stm32f767bi = [] +stm32f767ig = [] +stm32f767ii = [] +stm32f767ng = [] +stm32f767ni = [] +stm32f767vg = [] +stm32f767vi = [] +stm32f767zg = [] +stm32f767zi = [] +stm32f768ai = [] +stm32f769ag = [] +stm32f769ai = [] +stm32f769bg = [] +stm32f769bi = [] +stm32f769ig = [] +stm32f769ii = [] +stm32f769ng = [] +stm32f769ni = [] +stm32f777bi = [] +stm32f777ii = [] +stm32f777ni = [] +stm32f777vi = [] +stm32f777zi = [] +stm32f778ai = [] +stm32f779ai = [] +stm32f779bi = [] +stm32f779ii = [] +stm32f779ni = [] +stm32g030c6 = [] +stm32g030c8 = [] +stm32g030f6 = [] +stm32g030j6 = [] +stm32g030k6 = [] +stm32g030k8 = [] +stm32g031c4 = [] +stm32g031c6 = [] +stm32g031c8 = [] +stm32g031f4 = [] +stm32g031f6 = [] +stm32g031f8 = [] +stm32g031g4 = [] +stm32g031g6 = [] +stm32g031g8 = [] +stm32g031j4 = [] +stm32g031j6 = [] +stm32g031k4 = [] +stm32g031k6 = [] +stm32g031k8 = [] +stm32g031y8 = [] +stm32g041c6 = [] +stm32g041c8 = [] +stm32g041f6 = [] +stm32g041f8 = [] +stm32g041g6 = [] +stm32g041g8 = [] +stm32g041j6 = [] +stm32g041k6 = [] +stm32g041k8 = [] +stm32g041y8 = [] +stm32g050c6 = [] +stm32g050c8 = [] +stm32g050f6 = [] +stm32g050k6 = [] +stm32g050k8 = [] +stm32g051c6 = [] +stm32g051c8 = [] +stm32g051f6 = [] +stm32g051f8 = [] +stm32g051g6 = [] +stm32g051g8 = [] +stm32g051k6 = [] +stm32g051k8 = [] +stm32g061c6 = [] +stm32g061c8 = [] +stm32g061f6 = [] +stm32g061f8 = [] +stm32g061g6 = [] +stm32g061g8 = [] +stm32g061k6 = [] +stm32g061k8 = [] +stm32g070cb = [] +stm32g070kb = [] +stm32g070rb = [] +stm32g071c6 = [] +stm32g071c8 = [] +stm32g071cb = [] +stm32g071eb = [] +stm32g071g6 = [] +stm32g071g8 = [] +stm32g071gb = [] +stm32g071k6 = [] +stm32g071k8 = [] +stm32g071kb = [] +stm32g071r6 = [] +stm32g071r8 = [] +stm32g071rb = [] +stm32g081cb = [] +stm32g081eb = [] +stm32g081gb = [] +stm32g081kb = [] +stm32g081rb = [] +stm32g0b0ce = [] +stm32g0b0ke = [] +stm32g0b0re = [] +stm32g0b0ve = [] +stm32g0b1cb = [] +stm32g0b1cc = [] +stm32g0b1ce = [] +stm32g0b1kb = [] +stm32g0b1kc = [] +stm32g0b1ke = [] +stm32g0b1mb = [] +stm32g0b1mc = [] +stm32g0b1me = [] +stm32g0b1ne = [] +stm32g0b1rb = [] +stm32g0b1rc = [] +stm32g0b1re = [] +stm32g0b1vb = [] +stm32g0b1vc = [] +stm32g0b1ve = [] +stm32g0c1cc = [] +stm32g0c1ce = [] +stm32g0c1kc = [] +stm32g0c1ke = [] +stm32g0c1mc = [] +stm32g0c1me = [] +stm32g0c1ne = [] +stm32g0c1rc = [] +stm32g0c1re = [] +stm32g0c1vc = [] +stm32g0c1ve = [] +stm32g431c6 = [] +stm32g431c8 = [] +stm32g431cb = [] +stm32g431k6 = [] +stm32g431k8 = [] +stm32g431kb = [] +stm32g431m6 = [] +stm32g431m8 = [] +stm32g431mb = [] +stm32g431r6 = [] +stm32g431r8 = [] +stm32g431rb = [] +stm32g431v6 = [] +stm32g431v8 = [] +stm32g431vb = [] +stm32g441cb = [] +stm32g441kb = [] +stm32g441mb = [] +stm32g441rb = [] +stm32g441vb = [] +stm32g471cc = [] +stm32g471ce = [] +stm32g471mc = [] +stm32g471me = [] +stm32g471qc = [] +stm32g471qe = [] +stm32g471rc = [] +stm32g471re = [] +stm32g471vc = [] +stm32g471ve = [] +stm32g473cb = [] +stm32g473cc = [] +stm32g473ce = [] +stm32g473mb = [] +stm32g473mc = [] +stm32g473me = [] +stm32g473pb = [] +stm32g473pc = [] +stm32g473pe = [] +stm32g473qb = [] +stm32g473qc = [] +stm32g473qe = [] +stm32g473rb = [] +stm32g473rc = [] +stm32g473re = [] +stm32g473vb = [] +stm32g473vc = [] +stm32g473ve = [] +stm32g474cb = [] +stm32g474cc = [] +stm32g474ce = [] +stm32g474mb = [] +stm32g474mc = [] +stm32g474me = [] +stm32g474pb = [] +stm32g474pc = [] +stm32g474pe = [] +stm32g474qb = [] +stm32g474qc = [] +stm32g474qe = [] +stm32g474rb = [] +stm32g474rc = [] +stm32g474re = [] +stm32g474vb = [] +stm32g474vc = [] +stm32g474ve = [] +stm32g483ce = [] +stm32g483me = [] +stm32g483pe = [] +stm32g483qe = [] +stm32g483re = [] +stm32g483ve = [] +stm32g484ce = [] +stm32g484me = [] +stm32g484pe = [] +stm32g484qe = [] +stm32g484re = [] +stm32g484ve = [] +stm32g491cc = [] +stm32g491ce = [] +stm32g491kc = [] +stm32g491ke = [] +stm32g491mc = [] +stm32g491me = [] +stm32g491rc = [] +stm32g491re = [] +stm32g491vc = [] +stm32g491ve = [] +stm32g4a1ce = [] +stm32g4a1ke = [] +stm32g4a1me = [] +stm32g4a1re = [] +stm32g4a1ve = [] +stm32gbk1cb = [] +stm32h723ve = [] +stm32h723vg = [] +stm32h723ze = [] +stm32h723zg = [] +stm32h725ae = [] +stm32h725ag = [] +stm32h725ie = [] +stm32h725ig = [] +stm32h725re = [] +stm32h725rg = [] +stm32h725ve = [] +stm32h725vg = [] +stm32h725ze = [] +stm32h725zg = [] +stm32h730ab = [] +stm32h730ib = [] +stm32h730vb = [] +stm32h730zb = [] +stm32h733vg = [] +stm32h733zg = [] +stm32h735ag = [] +stm32h735ig = [] +stm32h735rg = [] +stm32h735vg = [] +stm32h735zg = [] +stm32h742ag = [] +stm32h742ai = [] +stm32h742bg = [] +stm32h742bi = [] +stm32h742ig = [] +stm32h742ii = [] +stm32h742vg = [] +stm32h742vi = [] +stm32h742xg = [] +stm32h742xi = [] +stm32h742zg = [] +stm32h742zi = [] +stm32h743ag = [] +stm32h743ai = [] +stm32h743bg = [] +stm32h743bi = [] +stm32h743ig = [] +stm32h743ii = [] +stm32h743vg = [] +stm32h743vi = [] +stm32h743xg = [] +stm32h743xi = [] +stm32h743zg = [] +stm32h743zi = [] +stm32h745bg = [] +stm32h745bi = [] +stm32h745ig = [] +stm32h745ii = [] +stm32h745xg = [] +stm32h745xi = [] +stm32h745zg = [] +stm32h745zi = [] +stm32h747ag = [] +stm32h747ai = [] +stm32h747bg = [] +stm32h747bi = [] +stm32h747ig = [] +stm32h747ii = [] +stm32h747xg = [] +stm32h747xi = [] +stm32h747zi = [] +stm32h750ib = [] +stm32h750vb = [] +stm32h750xb = [] +stm32h750zb = [] +stm32h753ai = [] +stm32h753bi = [] +stm32h753ii = [] +stm32h753vi = [] +stm32h753xi = [] +stm32h753zi = [] +stm32h755bi = [] +stm32h755ii = [] +stm32h755xi = [] +stm32h755zi = [] +stm32h757ai = [] +stm32h757bi = [] +stm32h757ii = [] +stm32h757xi = [] +stm32h757zi = [] +stm32h7a3ag = [] +stm32h7a3ai = [] +stm32h7a3ig = [] +stm32h7a3ii = [] +stm32h7a3lg = [] +stm32h7a3li = [] +stm32h7a3ng = [] +stm32h7a3ni = [] +stm32h7a3qi = [] +stm32h7a3rg = [] +stm32h7a3ri = [] +stm32h7a3vg = [] +stm32h7a3vi = [] +stm32h7a3zg = [] +stm32h7a3zi = [] +stm32h7b0ab = [] +stm32h7b0ib = [] +stm32h7b0rb = [] +stm32h7b0vb = [] +stm32h7b0zb = [] +stm32h7b3ai = [] +stm32h7b3ii = [] +stm32h7b3li = [] +stm32h7b3ni = [] +stm32h7b3qi = [] +stm32h7b3ri = [] +stm32h7b3vi = [] +stm32h7b3zi = [] +stm32l010c6 = [] +stm32l010f4 = [] +stm32l010k4 = [] +stm32l010k8 = [] +stm32l010r8 = [] +stm32l010rb = [] +stm32l011d3 = [] +stm32l011d4 = [] +stm32l011e3 = [] +stm32l011e4 = [] +stm32l011f3 = [] +stm32l011f4 = [] +stm32l011g3 = [] +stm32l011g4 = [] +stm32l011k3 = [] +stm32l011k4 = [] +stm32l021d4 = [] +stm32l021f4 = [] +stm32l021g4 = [] +stm32l021k4 = [] +stm32l031c4 = [] +stm32l031c6 = [] +stm32l031e4 = [] +stm32l031e6 = [] +stm32l031f4 = [] +stm32l031f6 = [] +stm32l031g4 = [] +stm32l031g6 = [] +stm32l031k4 = [] +stm32l031k6 = [] +stm32l041c4 = [] +stm32l041c6 = [] +stm32l041e6 = [] +stm32l041f6 = [] +stm32l041g6 = [] +stm32l041k6 = [] +stm32l051c6 = [] +stm32l051c8 = [] +stm32l051k6 = [] +stm32l051k8 = [] +stm32l051r6 = [] +stm32l051r8 = [] +stm32l051t6 = [] +stm32l051t8 = [] +stm32l052c6 = [] +stm32l052c8 = [] +stm32l052k6 = [] +stm32l052k8 = [] +stm32l052r6 = [] +stm32l052r8 = [] +stm32l052t6 = [] +stm32l052t8 = [] +stm32l053c6 = [] +stm32l053c8 = [] +stm32l053r6 = [] +stm32l053r8 = [] +stm32l062c8 = [] +stm32l062k8 = [] +stm32l063c8 = [] +stm32l063r8 = [] +stm32l071c8 = [] +stm32l071cb = [] +stm32l071cz = [] +stm32l071k8 = [] +stm32l071kb = [] +stm32l071kz = [] +stm32l071rb = [] +stm32l071rz = [] +stm32l071v8 = [] +stm32l071vb = [] +stm32l071vz = [] +stm32l072cb = [] +stm32l072cz = [] +stm32l072kb = [] +stm32l072kz = [] +stm32l072rb = [] +stm32l072rz = [] +stm32l072v8 = [] +stm32l072vb = [] +stm32l072vz = [] +stm32l073cb = [] +stm32l073cz = [] +stm32l073rb = [] +stm32l073rz = [] +stm32l073v8 = [] +stm32l073vb = [] +stm32l073vz = [] +stm32l081cb = [] +stm32l081cz = [] +stm32l081kz = [] +stm32l082cz = [] +stm32l082kb = [] +stm32l082kz = [] +stm32l083cb = [] +stm32l083cz = [] +stm32l083rb = [] +stm32l083rz = [] +stm32l083v8 = [] +stm32l083vb = [] +stm32l083vz = [] +stm32l100c6-a = [] +stm32l100c6 = [] +stm32l100r8-a = [] +stm32l100r8 = [] +stm32l100rb-a = [] +stm32l100rb = [] +stm32l100rc = [] +stm32l151c6-a = [] +stm32l151c6 = [] +stm32l151c8-a = [] +stm32l151c8 = [] +stm32l151cb-a = [] +stm32l151cb = [] +stm32l151cc = [] +stm32l151qc = [] +stm32l151qd = [] +stm32l151qe = [] +stm32l151r6-a = [] +stm32l151r6 = [] +stm32l151r8-a = [] +stm32l151r8 = [] +stm32l151rb-a = [] +stm32l151rb = [] +stm32l151rc-a = [] +stm32l151rc = [] +stm32l151rd = [] +stm32l151re = [] +stm32l151uc = [] +stm32l151v8-a = [] +stm32l151v8 = [] +stm32l151vb-a = [] +stm32l151vb = [] +stm32l151vc-a = [] +stm32l151vc = [] +stm32l151vd-x = [] +stm32l151vd = [] +stm32l151ve = [] +stm32l151zc = [] +stm32l151zd = [] +stm32l151ze = [] +stm32l152c6-a = [] +stm32l152c6 = [] +stm32l152c8-a = [] +stm32l152c8 = [] +stm32l152cb-a = [] +stm32l152cb = [] +stm32l152cc = [] +stm32l152qc = [] +stm32l152qd = [] +stm32l152qe = [] +stm32l152r6-a = [] +stm32l152r6 = [] +stm32l152r8-a = [] +stm32l152r8 = [] +stm32l152rb-a = [] +stm32l152rb = [] +stm32l152rc-a = [] +stm32l152rc = [] +stm32l152rd = [] +stm32l152re = [] +stm32l152uc = [] +stm32l152v8-a = [] +stm32l152v8 = [] +stm32l152vb-a = [] +stm32l152vb = [] +stm32l152vc-a = [] +stm32l152vc = [] +stm32l152vd-x = [] +stm32l152vd = [] +stm32l152ve = [] +stm32l152zc = [] +stm32l152zd = [] +stm32l152ze = [] +stm32l162qc = [] +stm32l162qd = [] +stm32l162rc-a = [] +stm32l162rc = [] +stm32l162rd = [] +stm32l162re = [] +stm32l162vc-a = [] +stm32l162vc = [] +stm32l162vd-x = [] +stm32l162vd = [] +stm32l162ve = [] +stm32l162zc = [] +stm32l162zd = [] +stm32l162ze = [] +stm32l412c8 = [] +stm32l412cb = [] +stm32l412k8 = [] +stm32l412kb = [] +stm32l412r8 = [] +stm32l412rb = [] +stm32l412t8 = [] +stm32l412tb = [] +stm32l422cb = [] +stm32l422kb = [] +stm32l422rb = [] +stm32l422tb = [] +stm32l431cb = [] +stm32l431cc = [] +stm32l431kb = [] +stm32l431kc = [] +stm32l431rb = [] +stm32l431rc = [] +stm32l431vc = [] +stm32l432kb = [] +stm32l432kc = [] +stm32l433cb = [] +stm32l433cc = [] +stm32l433rb = [] +stm32l433rc = [] +stm32l433vc = [] +stm32l442kc = [] +stm32l443cc = [] +stm32l443rc = [] +stm32l443vc = [] +stm32l451cc = [] +stm32l451ce = [] +stm32l451rc = [] +stm32l451re = [] +stm32l451vc = [] +stm32l451ve = [] +stm32l452cc = [] +stm32l452ce = [] +stm32l452rc = [] +stm32l452re = [] +stm32l452vc = [] +stm32l452ve = [] +stm32l462ce = [] +stm32l462re = [] +stm32l462ve = [] +stm32l471qe = [] +stm32l471qg = [] +stm32l471re = [] +stm32l471rg = [] +stm32l471ve = [] +stm32l471vg = [] +stm32l471ze = [] +stm32l471zg = [] +stm32l475rc = [] +stm32l475re = [] +stm32l475rg = [] +stm32l475vc = [] +stm32l475ve = [] +stm32l475vg = [] +stm32l476je = [] +stm32l476jg = [] +stm32l476me = [] +stm32l476mg = [] +stm32l476qe = [] +stm32l476qg = [] +stm32l476rc = [] +stm32l476re = [] +stm32l476rg = [] +stm32l476vc = [] +stm32l476ve = [] +stm32l476vg = [] +stm32l476ze = [] +stm32l476zg = [] +stm32l485jc = [] +stm32l485je = [] +stm32l486jg = [] +stm32l486qg = [] +stm32l486rg = [] +stm32l486vg = [] +stm32l486zg = [] +stm32l496ae = [] +stm32l496ag = [] +stm32l496qe = [] +stm32l496qg = [] +stm32l496re = [] +stm32l496rg = [] +stm32l496ve = [] +stm32l496vg = [] +stm32l496wg = [] +stm32l496ze = [] +stm32l496zg = [] +stm32l4a6ag = [] +stm32l4a6qg = [] +stm32l4a6rg = [] +stm32l4a6vg = [] +stm32l4a6zg = [] +stm32l4p5ae = [] +stm32l4p5ag = [] +stm32l4p5ce = [] +stm32l4p5cg = [] +stm32l4p5qe = [] +stm32l4p5qg = [] +stm32l4p5re = [] +stm32l4p5rg = [] +stm32l4p5ve = [] +stm32l4p5vg = [] +stm32l4p5ze = [] +stm32l4p5zg = [] +stm32l4q5ag = [] +stm32l4q5cg = [] +stm32l4q5qg = [] +stm32l4q5rg = [] +stm32l4q5vg = [] +stm32l4q5zg = [] +stm32l4r5ag = [] +stm32l4r5ai = [] +stm32l4r5qg = [] +stm32l4r5qi = [] +stm32l4r5vg = [] +stm32l4r5vi = [] +stm32l4r5zg = [] +stm32l4r5zi = [] +stm32l4r7ai = [] +stm32l4r7vi = [] +stm32l4r7zi = [] +stm32l4r9ag = [] +stm32l4r9ai = [] +stm32l4r9vg = [] +stm32l4r9vi = [] +stm32l4r9zg = [] +stm32l4r9zi = [] +stm32l4s5ai = [] +stm32l4s5qi = [] +stm32l4s5vi = [] +stm32l4s5zi = [] +stm32l4s7ai = [] +stm32l4s7vi = [] +stm32l4s7zi = [] +stm32l4s9ai = [] +stm32l4s9vi = [] +stm32l4s9zi = [] +stm32l552cc = [] +stm32l552ce = [] +stm32l552me = [] +stm32l552qc = [] +stm32l552qe = [] +stm32l552rc = [] +stm32l552re = [] +stm32l552vc = [] +stm32l552ve = [] +stm32l552zc = [] +stm32l552ze = [] +stm32l562ce = [] +stm32l562me = [] +stm32l562qe = [] +stm32l562re = [] +stm32l562ve = [] +stm32l562ze = [] +stm32wb10cc = [] +stm32wb15cc = [] +stm32wb30ce = [] +stm32wb35cc = [] +stm32wb35ce = [] +stm32wb50cg = [] +stm32wb55cc = [] +stm32wb55ce = [] +stm32wb55cg = [] +stm32wb55rc = [] +stm32wb55re = [] +stm32wb55rg = [] +stm32wb55vc = [] +stm32wb55ve = [] +stm32wb55vg = [] +stm32wb55vy = [] +stm32wb5mmg = [] +stm32wl54cc = [] +stm32wl54jc = [] +stm32wl55cc = [] +stm32wl55jc = [] +stm32wl55uc = [] +stm32wle4c8 = [] +stm32wle4cb = [] +stm32wle4cc = [] +stm32wle4j8 = [] +stm32wle4jb = [] +stm32wle4jc = [] +stm32wle5c8 = [] +stm32wle5cb = [] +stm32wle5cc = [] +stm32wle5j8 = [] +stm32wle5jb = [] +stm32wle5jc = [] +stm32wle5u8 = [] +stm32wle5ub = [] +# END GENERATED FEATURES diff --git a/stm32-metapac/build.rs b/stm32-metapac/build.rs new file mode 100644 index 00000000..ffea82d5 --- /dev/null +++ b/stm32-metapac/build.rs @@ -0,0 +1,294 @@ +use regex::Regex; +use serde::Deserialize; +use std::collections::{HashMap, HashSet}; +use std::env; +use std::fmt::Write as _; +use std::fs; +use std::fs::File; +use std::io::Write; +use std::path::Path; +use std::path::PathBuf; + +use chiptool::{generate, ir, transform}; + +#[derive(Debug, Eq, PartialEq, Clone, Deserialize)] +pub struct Chip { + pub name: String, + pub family: String, + pub line: String, + pub core: String, + pub flash: u32, + pub ram: u32, + pub gpio_af: String, + pub packages: Vec, + pub peripherals: HashMap, + pub interrupts: HashMap, +} + +#[derive(Debug, Eq, PartialEq, Clone, Deserialize)] +pub struct Package { + pub name: String, + pub package: String, +} + +#[derive(Debug, Eq, PartialEq, Clone, Deserialize)] +pub struct Peripheral { + pub address: u32, + #[serde(default)] + pub kind: Option, + #[serde(default)] + pub block: Option, + #[serde(default)] + pub clock: Option, +} + +struct BlockInfo { + module: String, // usart_v1/USART -> usart + version: String, // usart_v1/USART -> v1 + block: String, // usart_v1/USART -> USART +} + +impl BlockInfo { + fn parse(s: &str) -> Self { + let mut s = s.split("/"); + let module = s.next().unwrap(); + let block = s.next().unwrap(); + assert!(s.next().is_none()); + let mut s = module.split("_"); + let module = s.next().unwrap(); + let version = s.next().unwrap(); + assert!(s.next().is_none()); + Self { + module: module.to_string(), + version: version.to_string(), + block: block.to_string(), + } + } +} + +fn make_table(out: &mut String, name: &str, data: &Vec>) { + write!( + out, + "#[macro_export] +macro_rules! {} {{ + ($($pat:tt => $code:tt;)*) => {{ + macro_rules! __{}_inner {{ + $(($pat) => $code;)* + ($_:tt) => {{}} + }} +", + name, name + ) + .unwrap(); + + for row in data { + write!(out, " __{}_inner!(({}));\n", name, row.join(",")).unwrap(); + } + + write!( + out, + " }}; +}}" + ) + .unwrap(); +} + +fn main() { + let dir = "../stm32-data/data"; + + println!("cwd: {:?}", env::current_dir()); + + let chip_name = env::vars_os() + .map(|(a, _)| a.to_string_lossy().to_string()) + .find(|x| x.starts_with("CARGO_FEATURE_STM32")) + .expect("No stm32xx Cargo feature enabled") + .strip_prefix("CARGO_FEATURE_") + .unwrap() + .to_ascii_uppercase(); + + let chip_path = Path::new(&dir) + .join("chips") + .join(&format!("{}.yaml", chip_name)); + let chip = fs::read(chip_path).unwrap(); + let chip: Chip = serde_yaml::from_slice(&chip).unwrap(); + + let mut ir = ir::IR::new(); + + let mut dev = ir::Device { + interrupts: Vec::new(), + peripherals: Vec::new(), + }; + + let mut peripheral_versions: HashMap = HashMap::new(); + let mut cfgs: HashSet = HashSet::new(); + let mut pin_table: Vec> = Vec::new(); + let mut interrupt_table: Vec> = Vec::new(); + + let dma_base = chip + .peripherals + .get(&"DMA".to_string()) + .unwrap_or_else(|| chip.peripherals.get(&"DMA1".to_string()).unwrap()) + .address; + let dma_stride = 0x400; + + let gpio_base = chip.peripherals.get(&"GPIOA".to_string()).unwrap().address; + let gpio_stride = 0x400; + + cfgs.insert(chip.family.to_ascii_lowercase()); + + for (name, p) in &chip.peripherals { + let mut ir_peri = ir::Peripheral { + name: name.clone(), + array: None, + base_address: p.address, + block: None, + description: None, + interrupts: HashMap::new(), + }; + + if let Some(block) = &p.block { + let bi = BlockInfo::parse(block); + + cfgs.insert(bi.module.clone()); + cfgs.insert(format!("{}_{}", bi.module, bi.version)); + + if let Some(old_version) = + peripheral_versions.insert(bi.module.clone(), bi.version.clone()) + { + if old_version != bi.version { + panic!( + "Peripheral {} has multiple versions: {} and {}", + bi.module, old_version, bi.version + ); + } + } + ir_peri.block = Some(format!("{}::{}", bi.module, bi.block)); + + match bi.module.as_str() { + "gpio" => { + let port_letter = name.chars().skip(4).next().unwrap(); + let port_num = port_letter as u32 - 'A' as u32; + assert_eq!(p.address, gpio_base + gpio_stride * port_num); + + for pin_num in 0..16 { + let pin_name = format!("P{}{}", port_letter, pin_num); + pin_table.push(vec![ + pin_name.clone(), + name.clone(), + port_num.to_string(), + pin_num.to_string(), + format!("EXTI{}", pin_num), + ]); + } + } + "dma" => { + let dma_num = if name == "DMA" { + 0 + } else { + let dma_letter = name.chars().skip(3).next().unwrap(); + dma_letter as u32 - '1' as u32 + }; + assert_eq!(p.address, dma_base + dma_stride * dma_num); + } + _ => {} + } + } + + dev.peripherals.push(ir_peri); + } + + for (name, &num) in &chip.interrupts { + dev.interrupts.push(ir::Interrupt { + name: name.clone(), + description: None, + value: num, + }); + + interrupt_table.push(vec![name.to_ascii_uppercase()]); + } + + ir.devices.insert("".to_string(), dev); + + let mut extra = format!( + "pub fn GPIO(n: usize) -> gpio::Gpio {{ + gpio::Gpio(({} + {}*n) as _) + }} + pub fn DMA(n: usize) -> dma::Dma {{ + dma::Dma(({} + {}*n) as _) + }}", + gpio_base, gpio_stride, dma_base, dma_stride, + ); + + let peripheral_version_table = peripheral_versions + .iter() + .map(|(kind, version)| vec![kind.clone(), version.clone()]) + .collect(); + + make_table(&mut extra, "pins", &pin_table); + make_table(&mut extra, "interrupts", &interrupt_table); + make_table(&mut extra, "peripheral_versions", &peripheral_version_table); + + for (module, version) in peripheral_versions { + println!("loading {} {}", module, version); + + let regs_path = Path::new(&dir) + .join("registers") + .join(&format!("{}_{}.yaml", module, version)); + + let mut peri: ir::IR = serde_yaml::from_reader(File::open(regs_path).unwrap()).unwrap(); + + transform::expand_extends::ExpandExtends {} + .run(&mut peri) + .unwrap(); + + let prefix = module; + transform::map_names(&mut peri, |s, k| match k { + transform::NameKind::Block => format!("{}::{}", prefix, s), + transform::NameKind::Fieldset => format!("{}::regs::{}", prefix, s), + transform::NameKind::Enum => format!("{}::vals::{}", prefix, s), + _ => s.to_string(), + }) + .unwrap(); + + ir.merge(peri); + } + + // Cleanups! + transform::sort::Sort {}.run(&mut ir).unwrap(); + transform::Sanitize {}.run(&mut ir).unwrap(); + + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + + let items = generate::render(&ir).unwrap(); + let mut file = File::create(out.join("pac.rs")).unwrap(); + let data = items.to_string().replace("] ", "]\n"); + + // Remove inner attributes like #![no_std] + let re = Regex::new("# *! *\\[.*\\]").unwrap(); + let data = re.replace_all(&data, ""); + file.write_all(data.as_bytes()).unwrap(); + file.write_all(extra.as_bytes()).unwrap(); + + let mut device_x = String::new(); + + for (name, _) in &chip.interrupts { + write!( + &mut device_x, + "PROVIDE({} = DefaultHandler);\n", + name.to_ascii_uppercase() + ) + .unwrap(); + } + + File::create(out.join("device.x")) + .unwrap() + .write_all(device_x.as_bytes()) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + println!("cargo:rerun-if-changed=build.rs"); + + println!( + "cargo:cfgs={}", + cfgs.into_iter().collect::>().join(",") + ); +} diff --git a/stm32-metapac/gen_features.py b/stm32-metapac/gen_features.py new file mode 100644 index 00000000..ee92bd76 --- /dev/null +++ b/stm32-metapac/gen_features.py @@ -0,0 +1,37 @@ +import xmltodict +import yaml +import re +import json +import os +import re +import toml +from collections import OrderedDict +from glob import glob + +abspath = os.path.abspath(__file__) +dname = os.path.dirname(abspath) +os.chdir(dname) + +# ======= load chip list + +features = {} + +for f in sorted(glob('../stm32-data/data/chips/*.yaml')): + # Use the filename to get the chip name. Ultra fast, we don't have to read YAML! + name = os.path.splitext(os.path.basename(f))[0].lower() + features[name] = [] + + +# ========= Update Cargo features + +SEPARATOR_START = '# BEGIN GENERATED FEATURES\n' +SEPARATOR_END = '# END GENERATED FEATURES\n' +HELP = '# Generated by gen_features.py. DO NOT EDIT.\n' +with open('Cargo.toml', 'r') as f: + cargo = f.read() +before, cargo = cargo.split(SEPARATOR_START, maxsplit=1) +_, after = cargo.split(SEPARATOR_END, maxsplit=1) +cargo = before + SEPARATOR_START + HELP + \ + toml.dumps(features) + SEPARATOR_END + after +with open('Cargo.toml', 'w') as f: + f.write(cargo) diff --git a/stm32-metapac/src/lib.rs b/stm32-metapac/src/lib.rs new file mode 100644 index 00000000..cf8ff378 --- /dev/null +++ b/stm32-metapac/src/lib.rs @@ -0,0 +1,6 @@ +#![no_std] +#![allow(non_snake_case)] +#![allow(unused)] +#![allow(non_camel_case_types)] + +include!(concat!(env!("OUT_DIR"), "/pac.rs"));